From: Andreas Herrmann <andreas.herrmann3@amd.com>
To: Ingo Molnar <mingo@elte.hu>, "H. Peter Anvin" <hpa@zytor.com>
Cc: Andrew Morton <akpm@linux-foundation.org>,
linux-kernel@vger.kernel.org,
Mark Langsdorf <mark.langsdorf@amd.com>
Subject: [PATCH 5/8] x86: cacheinfo: use cached K8 NB_MISC devices instead of scanning for it
Date: Thu, 9 Apr 2009 15:16:17 +0200 [thread overview]
Message-ID: <20090409131617.GI31527@alberich.amd.com> (raw)
In-Reply-To: <20090409125659.GD31527@alberich.amd.com>
Impact: avoid code duplication
CC: Mark Langsdorf <mark.langsdorf@amd.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
---
arch/x86/include/asm/k8.h | 8 +++++++
arch/x86/kernel/cpu/intel_cacheinfo.c | 37 ++------------------------------
2 files changed, 11 insertions(+), 34 deletions(-)
Ingo,
you have asked for a function to replace the exported
k8_northbridges array.
Actually this is a good idea and I'll look at it.
But this also requires additional changes in pci-gart_64.c
And I don't like to mix such changes with this cache_disable stuff.
For the time beeing I provide a small macro to access the array.
Regards,
Andreas
diff --git a/arch/x86/include/asm/k8.h b/arch/x86/include/asm/k8.h
index 54c8cc5..c23b3d1 100644
--- a/arch/x86/include/asm/k8.h
+++ b/arch/x86/include/asm/k8.h
@@ -12,4 +12,12 @@ extern int cache_k8_northbridges(void);
extern void k8_flush_garts(void);
extern int k8_scan_nodes(unsigned long start, unsigned long end);
+#ifdef CONFIG_K8_NB
+#define node_to_k8_nb_misc(node) \
+ (node < num_k8_northbridges) ? k8_northbridges[node] : NULL
+#else
+#define node_to_k8_nb_misc(node) NULL
+#endif
+
+
#endif /* _ASM_X86_K8_H */
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 9dac235..50f7b88 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -17,6 +17,7 @@
#include <asm/processor.h>
#include <asm/smp.h>
+#include <asm/k8.h>
#define LVL_1_INST 1
#define LVL_1_DATA 2
@@ -159,14 +160,6 @@ struct _cpuid4_info_regs {
unsigned long can_disable;
};
-#ifdef CONFIG_PCI
-static struct pci_device_id k8_nb_id[] = {
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x1103) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x1203) },
- {}
-};
-#endif
-
unsigned short num_cache_leaves;
/* AMD doesn't have CPUID4. Emulate it here to report the same
@@ -704,30 +697,6 @@ static ssize_t show_type(struct _cpuid4_info *this_leaf, char *buf)
#define to_object(k) container_of(k, struct _index_kobject, kobj)
#define to_attr(a) container_of(a, struct _cache_attr, attr)
-#ifdef CONFIG_PCI
-static struct pci_dev *get_k8_northbridge(int node)
-{
- struct pci_dev *dev = NULL;
- int i;
-
- for (i = 0; i <= node; i++) {
- do {
- dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
- if (!dev)
- break;
- } while (!pci_match_id(&k8_nb_id[0], dev));
- if (!dev)
- break;
- }
- return dev;
-}
-#else
-static struct pci_dev *get_k8_northbridge(int node)
-{
- return NULL;
-}
-#endif
-
static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf)
{
const struct cpumask *mask = to_cpumask(this_leaf->shared_cpu_map);
@@ -739,7 +708,7 @@ static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf)
if (!this_leaf->can_disable)
return sprintf(buf, "Feature not enabled\n");
- dev = get_k8_northbridge(node);
+ dev = node_to_k8_nb_misc(node);
if (!dev) {
printk(KERN_ERR "Attempting AMD northbridge operation on a system with no northbridge\n");
return -EINVAL;
@@ -783,7 +752,7 @@ store_cache_disable(struct _cpuid4_info *this_leaf, const char *buf,
return -EINVAL;
val |= 0xc0000000;
- dev = get_k8_northbridge(node);
+ dev = node_to_k8_nb_misc(node);
if (!dev) {
printk(KERN_ERR "Attempting AMD northbridge operation on a system with no northbridge\n");
return -EINVAL;
--
1.6.2
next prev parent reply other threads:[~2009-04-09 13:17 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-04-09 12:56 [PATCH 0/8] x86: cacheinfo: cache_disable fixes/cleanup Andreas Herrmann
2009-04-09 12:59 ` [PATCH 1/8] Revert "x86, cpu: intel_cacheinfo.c: use cpumask_first(to_cpumask())" Andreas Herrmann
2009-04-09 13:02 ` [PATCH 2/8] Revert "x86, cpu: conform L3 Cache Index Disable to Linux standards" Andreas Herrmann
2009-04-09 13:05 ` [PATCH 3/8] x86: cacheinfo: use L3 cache index disable feature only for CPUs that support it Andreas Herrmann
2009-04-10 12:36 ` [tip:x86/cpu] " Andreas Herrmann
2009-04-09 13:07 ` [PATCH 4/8] x86: cacheinfo: correct return value when cache_disable feature is not active Andreas Herrmann
2009-04-10 12:36 ` [tip:x86/cpu] " Andreas Herrmann
2009-04-09 13:16 ` Andreas Herrmann [this message]
2009-04-10 12:36 ` [tip:x86/cpu] x86: cacheinfo: use cached K8 NB_MISC devices instead of scanning for it Andreas Herrmann
2009-04-09 13:18 ` [PATCH 6/8] x86: cacheinfo: replace sysfs interface for cache_disable feature Andreas Herrmann
2009-04-10 12:37 ` [tip:x86/cpu] " Mark Langsdorf
2009-04-13 4:52 ` Jaswinder Singh Rajput
2009-04-13 4:56 ` Jaswinder Singh Rajput
2009-04-14 11:58 ` Ingo Molnar
2009-04-14 12:48 ` Jaswinder Singh Rajput
2009-04-14 13:28 ` Ingo Molnar
2009-04-09 13:24 ` [PATCH 7/8] x86: cacheinfo: disable L3 ECC scrubbing when L3 cache index is disabled Andreas Herrmann
2009-04-10 12:37 ` [tip:x86/cpu] " Mark Langsdorf
2009-04-09 13:31 ` [PATCH 8/8] x86/docs: add description for cache_disable sysfs interface Andreas Herrmann
2009-04-10 12:37 ` [tip:x86/cpu] " Mark Langsdorf
2009-04-10 12:28 ` [PATCH 0/8] x86: cacheinfo: cache_disable fixes/cleanup Ingo Molnar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20090409131617.GI31527@alberich.amd.com \
--to=andreas.herrmann3@amd.com \
--cc=akpm@linux-foundation.org \
--cc=hpa@zytor.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.langsdorf@amd.com \
--cc=mingo@elte.hu \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.