From: Ingo Molnar <mingo@elte.hu>
To: Jack Steiner <steiner@sgi.com>
Cc: tglx@linutronix.de, linux-mm@kvack.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] x86, UV: Fix nacros for multiple coherency domains
Date: Mon, 8 Jun 2009 18:03:24 +0200 [thread overview]
Message-ID: <20090608160324.GA4355@elte.hu> (raw)
In-Reply-To: <20090608154405.GA16395@sgi.com>
* Jack Steiner <steiner@sgi.com> wrote:
> Fix bug in the SGI UV macros that support systems with multiple
> coherency domains. The macros used for referencing global MMR
> (chipset registers) are failing to correctly "or" the NASID (node
> identifier) bits that reside above M+N. These high bits are
> supplied automatically by the chipset for memory accesses coming
> from the processor socket. However, the bits must be present for
> references to the special global MMR space used to map chipset
> registers. (See uv_hub.h for more details ...)
>
> The bug results in references to invalid/incorrect nodes.
>
> Signed-off-by: Jack Steiner <steiner@sgi.com>
>
> ---
> arch/x86/include/asm/uv/uv_hub.h | 6 ++++--
> arch/x86/kernel/apic/x2apic_uv_x.c | 15 +++++++++------
> 2 files changed, 13 insertions(+), 8 deletions(-)
Applied, thanks Jack. Note - this has missed .30 but i marked it for
.30.1 backporting, because it obviously only affects UV code.
Ingo
WARNING: multiple messages have this Message-ID (diff)
From: Ingo Molnar <mingo@elte.hu>
To: Jack Steiner <steiner@sgi.com>
Cc: tglx@linutronix.de, linux-mm@kvack.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] x86, UV: Fix nacros for multiple coherency domains
Date: Mon, 8 Jun 2009 18:03:24 +0200 [thread overview]
Message-ID: <20090608160324.GA4355@elte.hu> (raw)
In-Reply-To: <20090608154405.GA16395@sgi.com>
* Jack Steiner <steiner@sgi.com> wrote:
> Fix bug in the SGI UV macros that support systems with multiple
> coherency domains. The macros used for referencing global MMR
> (chipset registers) are failing to correctly "or" the NASID (node
> identifier) bits that reside above M+N. These high bits are
> supplied automatically by the chipset for memory accesses coming
> from the processor socket. However, the bits must be present for
> references to the special global MMR space used to map chipset
> registers. (See uv_hub.h for more details ...)
>
> The bug results in references to invalid/incorrect nodes.
>
> Signed-off-by: Jack Steiner <steiner@sgi.com>
>
> ---
> arch/x86/include/asm/uv/uv_hub.h | 6 ++++--
> arch/x86/kernel/apic/x2apic_uv_x.c | 15 +++++++++------
> 2 files changed, 13 insertions(+), 8 deletions(-)
Applied, thanks Jack. Note - this has missed .30 but i marked it for
.30.1 backporting, because it obviously only affects UV code.
Ingo
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next prev parent reply other threads:[~2009-06-08 16:03 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-06-08 15:44 [PATCH] x86, UV: Fix nacros for multiple coherency domains Jack Steiner
2009-06-08 15:44 ` Jack Steiner
2009-06-08 16:03 ` Ingo Molnar [this message]
2009-06-08 16:03 ` Ingo Molnar
2009-06-08 16:03 ` [tip:x86/urgent] " tip-bot for Jack Steiner
2009-06-08 17:00 ` [tip:x86/urgent] x86, UV: Fix macros " tip-bot for Jack Steiner
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