DMA HW bug in MX2x platforms?

DMA HW bug in MX2x platforms?

[javier Martin]

I am currently working on an ASoC driver for mx2x platforms. I am
porting an old working ASoC driver for 2.6.22 + Freescale BSP kernel
to current 2.6.30 kernel.

Among other things, I had to translate old Freescale's DMA api to the
one provided in 2.6.30 for i.mx2x platforms.

Here I will describe the problem that I am having:
in "aplay" I am using (buffer_size/period_size=4), each
(2*period_size) samples I have some erroneous ones that should come
(buffer_size) samples later, and this relation is valid for several
values with (buffer_size/period_size=4).

I have a trace log with all details for DMA transfers that I have
compared for both 2.6.22 and new 2.6.30 and they are identical. Some
people has also told me that there could be a problem with DMA in mx2x
platforms.

Do you have knowledge of this kind of problem? Is there a new DMA
version for mx2x in any git repository?

-- 
Javier Martin
Vista Silicon S.L.
Universidad de Cantabria
CDTUC - FASE C - Oficina S-345
Avda de los Castros s/n
39005- Santander. Cantabria. Spain
+34 942 25 32 60
www.vista-silicon.com

Re: DMA HW bug in MX2x platforms?

[Daniel Mack]

On Fri, Jul 24, 2009 at 09:37:33AM +0200, javier Martin wrote:
> I am currently working on an ASoC driver for mx2x platforms. I am
> porting an old working ASoC driver for 2.6.22 + Freescale BSP kernel
> to current 2.6.30 kernel.

Will the SSI/I2S part be compatible to mx3 platforms or are the register
set too different?

Daniel

Re: DMA HW bug in MX2x platforms?

[Mark Brown]

On Fri, Jul 31, 2009 at 11:52:51AM +0200, Daniel Mack wrote:
> On Fri, Jul 24, 2009 at 09:37:33AM +0200, javier Martin wrote:
> > I am currently working on an ASoC driver for mx2x platforms. I am
> > porting an old working ASoC driver for 2.6.22 + Freescale BSP kernel
> > to current 2.6.30 kernel.

> Will the SSI/I2S part be compatible to mx3 platforms or are the register
> set too different?

They should be able to share the same SSI driver; the DMA is radically
different so there'll be some per-CPU code to interact with the DMA
driver but the bulk of it should be transferrable.