Re: [PATCH 0/2]: Get perf counters working on D-cache aliasing cpus.

[Ingo Molnar <mingo@elte.hu>]

* David Miller <davem@davemloft.net> wrote:

> With Jen's Axboe's basic sparc counter patch in my tree I started 
> playing with it on sparc64.  Turns out it won't work on anything 
> pre-Niagara.
> 
> The issue is D-cache aliasing between the kernel side mapping and 
> the user side mapping of the perf event ring buffer.
> 
> The following two patches attempt to address this issue and are 
> working properly on my test machine.

Oh, great!

The only (small) worry would be that this uses vmalloc space on 
32-bit platforms which is generally a scarce resource.

IMHO it's not a big issue as the typical workflow would be to have 
just a handful of perf ring-buffers around and most of the 
performance work happens in the 64-bit space anyway.

One practical complication is lots of tracepoints and perf trace: 
but we can solve that via output buffer multiplexing: 
PERF_COUNTER_IOC_SET_OUTPUT - which is implemented in 
tip:perfcounters/core but not yet propagated to the tools. That 
would be desirable to do anyway, to enable time-coherent trace 
entries, etc.

	Ingo