From: Jack Steiner <steiner@sgi.com>
To: "H. Peter Anvin" <hpa@zytor.com>
Cc: Chris Friesen <cfriesen@nortel.com>,
Daniel Walker <dwalker@fifo99.com>,
mingo@elte.hu, tglx@linutronix.de, linux-kernel@vger.kernel.org
Subject: Re: [PATCH V2] x86: SGU UV Add volatile semantics to macros that access chipset registers
Date: Wed, 9 Sep 2009 22:23:30 -0500 [thread overview]
Message-ID: <20090910032330.GA10878@sgi.com> (raw)
In-Reply-To: <4AA86CFA.8090000@zytor.com>
On Wed, Sep 09, 2009 at 08:05:30PM -0700, H. Peter Anvin wrote:
> On 09/09/2009 07:22 PM, Jack Steiner wrote:
> > Add volatile-semantics to the SGI UV read/write macros that are
> > used to access chipset memory mapped registers. No direct
> > references to volatile are made. Instead the readq/writeq
> > macros are used.
> >
> > Signed-off-by: Jack Steiner <steiner@sgi.com>
>
> The -q part of readq/writeq is qword, 64 bits. It looks like you're
> replacing references of other sizes with qword references; was that
> intended?
No, it was not. Most macros are quad-word but I see one that should have been
"char".
Thanks for catching that. New patch in the morning.
--- jack
next prev parent reply other threads:[~2009-09-10 3:23 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-09-09 15:42 [PATCH] x86: SGU UV Add volatile to macros that access chipset registers Jack Steiner
2009-09-09 16:10 ` Daniel Walker
2009-09-09 18:01 ` Jack Steiner
2009-09-09 18:11 ` Daniel Walker
2009-09-09 18:54 ` Chris Friesen
2009-09-09 19:38 ` Jack Steiner
2009-09-10 0:44 ` H. Peter Anvin
2009-09-10 2:21 ` Jack Steiner
2009-09-10 2:22 ` [PATCH V2] x86: SGU UV Add volatile semantics " Jack Steiner
2009-09-10 3:05 ` H. Peter Anvin
2009-09-10 3:23 ` Jack Steiner [this message]
2009-09-10 14:31 ` [PATCH V3] " Jack Steiner
2009-09-10 14:31 ` Jack Steiner
2009-09-18 12:06 ` [tip:x86/urgent] x86: SGI UV: " tip-bot for Jack Steiner
2009-09-09 19:20 ` [PATCH] x86: SGU UV Add volatile " Jack Steiner
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