* RE: [PATCH] OMAP3: Fix McBSP poll read and write for 32bit reg access
[not found] ` <19F8576C6E063C45BE387C64729E73940436DB248C@dbde02.ent.ti.com>
@ 2009-10-15 5:29 ` Varadarajan, Charu Latha
2009-10-15 6:10 ` Shilimkar, Santosh
0 siblings, 1 reply; 11+ messages in thread
From: Varadarajan, Charu Latha @ 2009-10-15 5:29 UTC (permalink / raw)
To: Shilimkar, Santosh, linux-omap@vger.kernel.org; +Cc: Syed, Rafiuddin
______________________
> > > Subject: RE: [PATCH] OMAP3: Fix McBSP poll read and write for
> > > 32bit reg access
> > >
> > > Charu,
> > >
> > > > -----Original Message-----
> > > > From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
> > > > owner@vger.kernel.org] On Behalf Of Varadarajan, Charu Latha
> > > > Sent: Wednesday, October 14, 2009 3:00 PM
> > > > To: linux-omap@vger.kernel.org
> > > > Cc: Varadarajan, Charu Latha; Syed, Rafiuddin
> > > > Subject: [PATCH] OMAP3: Fix McBSP poll read and write for
> > > 32bit reg access
> > > >
> > > > omap_mcbsp_pollwrite and omap_mcbsp_pollread functions access
> > > > McBSP registers as 16-bit registers.
> > > >
> > > > The McBSP registers (DRR_REG and DXR_REG) are limited to
> > > > 32-bit data accesses (L4 Interconnect). 16-bit and 8-bit is
> > > > not allowed and can corrupt register content.
> > > >
> > > > This patch modifies omap_mcbsp_pollwrite and
> > > > omap_mcbsp_pollread functions to do 32 bit access for above
> > > > mentioned McBSP registers. Data accepted by these
> > > > functions is also modified to 32-bit.
> > > >
> > > > Signed-off-by: Charulatha V <charu@ti.com>
> > > > Signed-off-by: Syed Rafiuddin <rafiuddin.syed@ti.com>
> > > > ---
> > > > arch/arm/plat-omap/include/mach/mcbsp.h | 4 +-
> > > > arch/arm/plat-omap/mcbsp.c | 46
> > > ++++++++++++++------------
> > > > -----
> > > > 2 files changed, 23 insertions(+), 27 deletions(-)
> > > >
> > > > diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h
> > > b/arch/arm/plat-
> > > > omap/include/mach/mcbsp.h
> > > > index 7e9cae3..05b0d8d 100644
> > > > --- a/arch/arm/plat-omap/include/mach/mcbsp.h
> > > > +++ b/arch/arm/plat-omap/include/mach/mcbsp.h
> > > > @@ -455,8 +455,8 @@ int
> > > omap_mcbsp_spi_master_recv_word_poll(unsigned int
> > > > id, u32 * word);
> > > > void omap_mcbsp_set_spi_mode(unsigned int id, const struct
> > > > omap_mcbsp_spi_cfg * spi_cfg);
> > > >
> > > > /* Polled read/write functions */
> > > > -int omap_mcbsp_pollread(unsigned int id, u16 * buf);
> > > > -int omap_mcbsp_pollwrite(unsigned int id, u16 buf);
> > > > +int omap_mcbsp_pollread(unsigned int id, u32 *buf);
> > > > +int omap_mcbsp_pollwrite(unsigned int id, u32 buf);
> > > If the issue is with DRR_REG and DXR_REG, why are you
> > > changing the signature of the generic API. You can handle
> > > these registers as a exceptions in the code.
> > If 32 bit data could be read and written on McBSP, why should we restrict
> > poll read and
> > poll write functions only for 16 bit data read and write?
> If these API's are only accessing the DXR and DRR regs then this is OK.
>
> > > > int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t
> > > > io_type);
> > > >
> > > > #endif
> > > > diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
> > > > index 88ac976..1f278a2 100644
> > > > --- a/arch/arm/plat-omap/mcbsp.c
> > > > +++ b/arch/arm/plat-omap/mcbsp.c
> > > > @@ -613,7 +613,7 @@ void omap_mcbsp_stop(unsigned int id,
> > > int tx, int rx)
> > > > EXPORT_SYMBOL(omap_mcbsp_stop);
> > > >
> > > > /* polled mcbsp i/o operations */
> > > > -int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
> > > > +int omap_mcbsp_pollwrite(unsigned int id, u32 buf)
> > > > {
> > > > struct omap_mcbsp *mcbsp;
> > > > void __iomem *base;
> > > > @@ -626,26 +626,24 @@ int omap_mcbsp_pollwrite(unsigned int
> > > id, u16 buf)
> > > > mcbsp = id_to_mcbsp_ptr(id);
> > > > base = mcbsp->io_base;
> > > >
> > > > - writew(buf, base + OMAP_MCBSP_REG_DXR1);
> > > > + OMAP_MCBSP_WRITE(base, DXR, buf);
> > > Why do you need this? Is writew()/readw() not doing 16 bit
> > > operations ?
> > The intension is to use 32 bit access and not 16 bit access
> Use readl() / writel() then.
>
Yes, OMAP_MCBSP_WRITE macro makes use of readl() / writel() for OMAP3
> > > > /* if frame sync error - clear the error */
> > > > - if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
> > > > + if (OMAP_MCBSP_READ(base, SPCR2) & XSYNC_ERR) {
> > > > /* clear error */
> > > > - writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
> > > (~XSYNC_ERR),
> > > > - base + OMAP_MCBSP_REG_SPCR2);
> > > > + OMAP_MCBSP_WRITE(base, SPCR2,
> > > OMAP_MCBSP_READ(base , SPCR2)
> > > > + & (~XSYNC_ERR));
> > > > /* resend */
> > > > return -1;
> > > > } else {
> > > > /* wait for transmit confirmation */
> > > > int attemps = 0;
> > > > - while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
> > > > + while (!(OMAP_MCBSP_READ(base, SPCR2) & XRDY)) {
> > > > if (attemps++ > 1000) {
> > > > - writew(readw(base +
> > > OMAP_MCBSP_REG_SPCR2) &
> > > > - (~XRST),
> > > > - base + OMAP_MCBSP_REG_SPCR2);
> > > > + OMAP_MCBSP_WRITE(base, SPCR2,
> > > > + OMAP_MCBSP_READ(base,
> > > SPCR2) & (~XRST));
> > > > udelay(10);
> > > > - writew(readw(base +
> > > OMAP_MCBSP_REG_SPCR2) |
> > > > - (XRST),
> > > > - base + OMAP_MCBSP_REG_SPCR2);
> > > > + OMAP_MCBSP_WRITE(base, SPCR2,
> > > > + OMAP_MCBSP_READ(base,
> > > SPCR2) | (XRST));
> > > > udelay(10);
> > > > dev_err(mcbsp->dev, "Could not write to"
> > > > " McBSP%d Register\n",
> > > mcbsp->id);
> > > > @@ -658,7 +656,7 @@ int omap_mcbsp_pollwrite(unsigned int
> > > id, u16 buf)
> > > > }
> > > > EXPORT_SYMBOL(omap_mcbsp_pollwrite);
> > > >
> > > > -int omap_mcbsp_pollread(unsigned int id, u16 *buf)
> > > > +int omap_mcbsp_pollread(unsigned int id, u32 *buf)
> > > > {
> > > > struct omap_mcbsp *mcbsp;
> > > > void __iomem *base;
> > > > @@ -671,24 +669,22 @@ int omap_mcbsp_pollread(unsigned int
> > > id, u16 *buf)
> > > >
> > > > base = mcbsp->io_base;
> > > > /* if frame sync error - clear the error */
> > > > - if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
> > > > + if (OMAP_MCBSP_READ(base, SPCR1) & RSYNC_ERR) {
> > > > /* clear error */
> > > > - writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
> > > (~RSYNC_ERR),
> > > > - base + OMAP_MCBSP_REG_SPCR1);
> > > > + OMAP_MCBSP_WRITE(base, SPCR1,
> > > OMAP_MCBSP_READ(base, SPCR1)
> > > > + & (~RSYNC_ERR));
> > > > /* resend */
> > > > return -1;
> > > > } else {
> > > > /* wait for recieve confirmation */
> > > > int attemps = 0;
> > > > - while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
> > > > - if (attemps++ > 1000) {
> > > > - writew(readw(base +
> > > OMAP_MCBSP_REG_SPCR1) &
> > > > - (~RRST),
> > > > - base + OMAP_MCBSP_REG_SPCR1);
> > > > + while (!(OMAP_MCBSP_READ(base, SPCR1) & RRDY)) {
> > > > + if (attemps++ > 10000) {
> > > > + OMAP_MCBSP_WRITE(base, SPCR1,
> > > > + OMAP_MCBSP_READ(base,
> > > SPCR1) & (~RRST));
> > > > udelay(10);
> > > > - writew(readw(base +
> > > OMAP_MCBSP_REG_SPCR1) |
> > > > - (RRST),
> > > > - base + OMAP_MCBSP_REG_SPCR1);
> > > > + OMAP_MCBSP_WRITE(base, SPCR1,
> > > > + OMAP_MCBSP_READ(base,
> > > SPCR1) | (RRST));
> > > > udelay(10);
> > > > dev_err(mcbsp->dev, "Could not
> > > read from"
> > > > " McBSP%d Register\n",
> > > mcbsp->id);
> > > > @@ -696,7 +692,7 @@ int omap_mcbsp_pollread(unsigned int
> > > id, u16 *buf)
> > > > }
> > > > }
> > > > }
> > > > - *buf = readw(base + OMAP_MCBSP_REG_DRR1);
> > > > + *buf = OMAP_MCBSP_READ(base, DRR);
> > > >
> > > > return 0;
> > > > }
>
>
> Regards,
> Santosh
^ permalink raw reply [flat|nested] 11+ messages in thread* RE: [PATCH] OMAP3: Fix McBSP poll read and write for 32bit reg access
2009-10-15 5:29 ` [PATCH] OMAP3: Fix McBSP poll read and write for 32bit reg access Varadarajan, Charu Latha
@ 2009-10-15 6:10 ` Shilimkar, Santosh
2009-10-15 7:25 ` Peter Ujfalusi
0 siblings, 1 reply; 11+ messages in thread
From: Shilimkar, Santosh @ 2009-10-15 6:10 UTC (permalink / raw)
To: Varadarajan, Charu Latha, linux-omap@vger.kernel.org; +Cc: Syed, Rafiuddin
<snip>
> -----Original Message-----
> From: Varadarajan, Charu Latha
> Sent: Thursday, October 15, 2009 10:59 AM
> To: Shilimkar, Santosh; linux-omap@vger.kernel.org
> Cc: Syed, Rafiuddin
> Subject: RE: [PATCH] OMAP3: Fix McBSP poll read and write for 32bit reg
> access
>
> ______________________
>
> > > > Subject: RE: [PATCH] OMAP3: Fix McBSP poll read and write for
> > > > 32bit reg access
> > > >
> > > > Charu,
> > > >
> > > > > -----Original Message-----
> > > > > From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
> > > > > owner@vger.kernel.org] On Behalf Of Varadarajan, Charu Latha
> > > > > Sent: Wednesday, October 14, 2009 3:00 PM
> > > > > To: linux-omap@vger.kernel.org
> > > > > Cc: Varadarajan, Charu Latha; Syed, Rafiuddin
> > > > > Subject: [PATCH] OMAP3: Fix McBSP poll read and write for
> > > > 32bit reg access
> > > > >
> > > > > omap_mcbsp_pollwrite and omap_mcbsp_pollread functions access
> > > > > McBSP registers as 16-bit registers.
> > > > >
> > > > > The McBSP registers (DRR_REG and DXR_REG) are limited to
> > > > > 32-bit data accesses (L4 Interconnect). 16-bit and 8-bit is
> > > > > not allowed and can corrupt register content.
> > > > >
> > > > > This patch modifies omap_mcbsp_pollwrite and
> > > > > omap_mcbsp_pollread functions to do 32 bit access for above
> > > > > mentioned McBSP registers. Data accepted by these
> > > > > functions is also modified to 32-bit.
> > > > >
> > > > > Signed-off-by: Charulatha V <charu@ti.com>
> > > > > Signed-off-by: Syed Rafiuddin <rafiuddin.syed@ti.com>
> > > > > ---
> > > > > arch/arm/plat-omap/include/mach/mcbsp.h | 4 +-
> > > > > arch/arm/plat-omap/mcbsp.c | 46
> > > > ++++++++++++++------------
> > > > > -----
> > > > > 2 files changed, 23 insertions(+), 27 deletions(-)
> > > > >
> > > > > diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h
> > > > b/arch/arm/plat-
> > > > > omap/include/mach/mcbsp.h
> > > > > index 7e9cae3..05b0d8d 100644
> > > > > --- a/arch/arm/plat-omap/include/mach/mcbsp.h
> > > > > +++ b/arch/arm/plat-omap/include/mach/mcbsp.h
> > > > > @@ -455,8 +455,8 @@ int
> > > > omap_mcbsp_spi_master_recv_word_poll(unsigned int
> > > > > id, u32 * word);
> > > > > void omap_mcbsp_set_spi_mode(unsigned int id, const struct
> > > > > omap_mcbsp_spi_cfg * spi_cfg);
> > > > >
> > > > > /* Polled read/write functions */
> > > > > -int omap_mcbsp_pollread(unsigned int id, u16 * buf);
> > > > > -int omap_mcbsp_pollwrite(unsigned int id, u16 buf);
> > > > > +int omap_mcbsp_pollread(unsigned int id, u32 *buf);
> > > > > +int omap_mcbsp_pollwrite(unsigned int id, u32 buf);
> > > > If the issue is with DRR_REG and DXR_REG, why are you
> > > > changing the signature of the generic API. You can handle
> > > > these registers as a exceptions in the code.
> > > If 32 bit data could be read and written on McBSP, why should we
> restrict
> > > poll read and
> > > poll write functions only for 16 bit data read and write?
> > If these API's are only accessing the DXR and DRR regs then this is OK.
> >
> > > > > int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t
> > > > > io_type);
> > > > >
> > > > > #endif
> > > > > diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-
> omap/mcbsp.c
> > > > > index 88ac976..1f278a2 100644
> > > > > --- a/arch/arm/plat-omap/mcbsp.c
> > > > > +++ b/arch/arm/plat-omap/mcbsp.c
> > > > > @@ -613,7 +613,7 @@ void omap_mcbsp_stop(unsigned int id,
> > > > int tx, int rx)
> > > > > EXPORT_SYMBOL(omap_mcbsp_stop);
> > > > >
> > > > > /* polled mcbsp i/o operations */
> > > > > -int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
> > > > > +int omap_mcbsp_pollwrite(unsigned int id, u32 buf)
> > > > > {
> > > > > struct omap_mcbsp *mcbsp;
> > > > > void __iomem *base;
> > > > > @@ -626,26 +626,24 @@ int omap_mcbsp_pollwrite(unsigned int
> > > > id, u16 buf)
> > > > > mcbsp = id_to_mcbsp_ptr(id);
> > > > > base = mcbsp->io_base;
> > > > >
> > > > > - writew(buf, base + OMAP_MCBSP_REG_DXR1);
> > > > > + OMAP_MCBSP_WRITE(base, DXR, buf);
> > > > Why do you need this? Is writew()/readw() not doing 16 bit
> > > > operations ?
> > > The intension is to use 32 bit access and not 16 bit access
> > Use readl() / writel() then.
> >
> Yes, OMAP_MCBSP_WRITE macro makes use of readl() / writel() for OMAP3
Good!! Then get rid of this macro and directly use kernel standard API- readl() / writel()
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH] OMAP3: Fix McBSP poll read and write for 32bit reg access
2009-10-15 6:10 ` Shilimkar, Santosh
@ 2009-10-15 7:25 ` Peter Ujfalusi
2009-10-15 7:30 ` Shilimkar, Santosh
0 siblings, 1 reply; 11+ messages in thread
From: Peter Ujfalusi @ 2009-10-15 7:25 UTC (permalink / raw)
To: ext Shilimkar, Santosh
Cc: Varadarajan, Charu Latha, linux-omap@vger.kernel.org,
Syed, Rafiuddin
On Thursday 15 October 2009 09:10:54 ext Shilimkar, Santosh wrote:
> > > > > > - writew(buf, base + OMAP_MCBSP_REG_DXR1);
> > > > > > + OMAP_MCBSP_WRITE(base, DXR, buf);
> > > > >
> > > > > Why do you need this? Is writew()/readw() not doing 16 bit
> > > > > operations ?
> > > >
> > > > The intension is to use 32 bit access and not 16 bit access
> > >
> > > Use readl() / writel() then.
> >
> > Yes, OMAP_MCBSP_WRITE macro makes use of readl() / writel() for OMAP3
>
> Good!! Then get rid of this macro and directly use kernel standard
> API- readl() / writel() --
Well, OMAP1 and OMAP2 still has 16 bit registers in McBSP.
--
Péter
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 11+ messages in thread
* RE: [PATCH] OMAP3: Fix McBSP poll read and write for 32bit reg access
2009-10-15 7:25 ` Peter Ujfalusi
@ 2009-10-15 7:30 ` Shilimkar, Santosh
[not found] ` <5A47E75E594F054BAF48C5E4FC4B92AB030A46D070@dbde02.ent.ti.com>
0 siblings, 1 reply; 11+ messages in thread
From: Shilimkar, Santosh @ 2009-10-15 7:30 UTC (permalink / raw)
To: Peter Ujfalusi
Cc: Varadarajan, Charu Latha, linux-omap@vger.kernel.org,
Syed, Rafiuddin
Charu,
> -----Original Message-----
> From: Peter Ujfalusi [mailto:peter.ujfalusi@nokia.com]
> Sent: Thursday, October 15, 2009 12:56 PM
> To: Shilimkar, Santosh
> Cc: Varadarajan, Charu Latha; linux-omap@vger.kernel.org; Syed, Rafiuddin
> Subject: Re: [PATCH] OMAP3: Fix McBSP poll read and write for 32bit reg
> access
>
> On Thursday 15 October 2009 09:10:54 ext Shilimkar, Santosh wrote:
> > > > > > > - writew(buf, base + OMAP_MCBSP_REG_DXR1);
> > > > > > > + OMAP_MCBSP_WRITE(base, DXR, buf);
> > > > > >
> > > > > > Why do you need this? Is writew()/readw() not doing 16 bit
> > > > > > operations ?
> > > > >
> > > > > The intension is to use 32 bit access and not 16 bit access
> > > >
> > > > Use readl() / writel() then.
> > >
> > > Yes, OMAP_MCBSP_WRITE macro makes use of readl() / writel() for OMAP3
> >
> > Good!! Then get rid of this macro and directly use kernel standard
> > API- readl() / writel() --
>
> Well, OMAP1 and OMAP2 still has 16 bit registers in McBSP.
Please look at this comment from Peter. So please reconsider your patch and decision of changing the signature of the API since it breaks OMAP1 and OMAP2.
Regards,
Santosh
^ permalink raw reply [flat|nested] 11+ messages in thread
[parent not found: <E0D41E29EB0DAC4E9F3FF173962E9E940253DAF724@dbde02.ent.ti.com>]
[parent not found: <E0D41E29EB0DAC4E9F3FF173962E9E940253DAF770@dbde02.ent.ti.com>]
* RE: [PATCH] OMAP3: Fix McBSP poll read and write for 32bit reg access
[not found] <E0D41E29EB0DAC4E9F3FF173962E9E940253DAF770@dbde02.ent.ti.com>
@ 2009-10-14 11:01 ` Varadarajan, Charu Latha
0 siblings, 0 replies; 11+ messages in thread
From: Varadarajan, Charu Latha @ 2009-10-14 11:01 UTC (permalink / raw)
To: G, Manjunath Kondaiah, linux-omap@vger.kernel.org; +Cc: Syed, Rafiuddin
> -----Original Message-----
> From: G, Manjunath Kondaiah
> Sent: Wednesday, October 14, 2009 4:01 PM
> To: 'vimal singh'; Varadarajan, Charu Latha
> Cc: linux-omap@vger.kernel.org; Syed, Rafiuddin
> Subject: RE: [PATCH] OMAP3: Fix McBSP poll read and write for
> 32bit reg access
>
>
>
> > -----Original Message-----
> > From: linux-omap-owner@vger.kernel.org
> > [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of vimal singh
> > Sent: Wednesday, October 14, 2009 3:23 PM
> > To: Varadarajan, Charu Latha
> > Cc: linux-omap@vger.kernel.org; Syed, Rafiuddin
> > Subject: Re: [PATCH] OMAP3: Fix McBSP poll read and write for
> > 32bit reg access
>
> > >
> > > base = mcbsp->io_base;
> > > /* if frame sync error - clear the error */
> > > - if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
> > > + if (OMAP_MCBSP_READ(base, SPCR1) & RSYNC_ERR) {
> > > /* clear error */
> > > - writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
> > (~RSYNC_ERR),
> > > - base + OMAP_MCBSP_REG_SPCR1);
> > > + OMAP_MCBSP_WRITE(base, SPCR1,
> > OMAP_MCBSP_READ(base, SPCR1)
> > > + & (~RSYNC_ERR));
> > > /* resend */
> > > return -1;
>
> Return value can be a meaningful macro with proper value?
>
> > > } else {
> > > /* wait for recieve confirmation */
> > > int attemps = 0;
> > > - while (!(readw(base + OMAP_MCBSP_REG_SPCR1)
> > & RRDY)) {
> > > - if (attemps++ > 1000) {
> > > - writew(readw(base +
> > OMAP_MCBSP_REG_SPCR1) &
> > > - (~RRST),
> > > - base +
> OMAP_MCBSP_REG_SPCR1);
> > > + while (!(OMAP_MCBSP_READ(base, SPCR1) & RRDY)) {
> > > + if (attemps++ > 10000) {
> > > + OMAP_MCBSP_WRITE(base, SPCR1,
> > > +
>
> Why attemps changed from 1000 to 10000?
Ooops.. That's a typo, but critical error. Will do the needful.
>
> -Manjunath
>
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH] OMAP3: Fix McBSP poll read and write for 32bit reg access
@ 2009-10-14 9:30 charu
2009-10-14 9:52 ` vimal singh
2009-10-14 10:05 ` Shilimkar, Santosh
0 siblings, 2 replies; 11+ messages in thread
From: charu @ 2009-10-14 9:30 UTC (permalink / raw)
To: linux-omap; +Cc: Charulatha V, Syed Rafiuddin
omap_mcbsp_pollwrite and omap_mcbsp_pollread functions access
McBSP registers as 16-bit registers.
The McBSP registers (DRR_REG and DXR_REG) are limited to
32-bit data accesses (L4 Interconnect). 16-bit and 8-bit is
not allowed and can corrupt register content.
This patch modifies omap_mcbsp_pollwrite and
omap_mcbsp_pollread functions to do 32 bit access for above
mentioned McBSP registers. Data accepted by these
functions is also modified to 32-bit.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Syed Rafiuddin <rafiuddin.syed@ti.com>
---
arch/arm/plat-omap/include/mach/mcbsp.h | 4 +-
arch/arm/plat-omap/mcbsp.c | 46 ++++++++++++++-----------------
2 files changed, 23 insertions(+), 27 deletions(-)
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h
index 7e9cae3..05b0d8d 100644
--- a/arch/arm/plat-omap/include/mach/mcbsp.h
+++ b/arch/arm/plat-omap/include/mach/mcbsp.h
@@ -455,8 +455,8 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word);
void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg);
/* Polled read/write functions */
-int omap_mcbsp_pollread(unsigned int id, u16 * buf);
-int omap_mcbsp_pollwrite(unsigned int id, u16 buf);
+int omap_mcbsp_pollread(unsigned int id, u32 *buf);
+int omap_mcbsp_pollwrite(unsigned int id, u32 buf);
int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type);
#endif
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 88ac976..1f278a2 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -613,7 +613,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
EXPORT_SYMBOL(omap_mcbsp_stop);
/* polled mcbsp i/o operations */
-int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
+int omap_mcbsp_pollwrite(unsigned int id, u32 buf)
{
struct omap_mcbsp *mcbsp;
void __iomem *base;
@@ -626,26 +626,24 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
mcbsp = id_to_mcbsp_ptr(id);
base = mcbsp->io_base;
- writew(buf, base + OMAP_MCBSP_REG_DXR1);
+ OMAP_MCBSP_WRITE(base, DXR, buf);
/* if frame sync error - clear the error */
- if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
+ if (OMAP_MCBSP_READ(base, SPCR2) & XSYNC_ERR) {
/* clear error */
- writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
- base + OMAP_MCBSP_REG_SPCR2);
+ OMAP_MCBSP_WRITE(base, SPCR2, OMAP_MCBSP_READ(base , SPCR2)
+ & (~XSYNC_ERR));
/* resend */
return -1;
} else {
/* wait for transmit confirmation */
int attemps = 0;
- while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
+ while (!(OMAP_MCBSP_READ(base, SPCR2) & XRDY)) {
if (attemps++ > 1000) {
- writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
- (~XRST),
- base + OMAP_MCBSP_REG_SPCR2);
+ OMAP_MCBSP_WRITE(base, SPCR2,
+ OMAP_MCBSP_READ(base, SPCR2) & (~XRST));
udelay(10);
- writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
- (XRST),
- base + OMAP_MCBSP_REG_SPCR2);
+ OMAP_MCBSP_WRITE(base, SPCR2,
+ OMAP_MCBSP_READ(base, SPCR2) | (XRST));
udelay(10);
dev_err(mcbsp->dev, "Could not write to"
" McBSP%d Register\n", mcbsp->id);
@@ -658,7 +656,7 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
}
EXPORT_SYMBOL(omap_mcbsp_pollwrite);
-int omap_mcbsp_pollread(unsigned int id, u16 *buf)
+int omap_mcbsp_pollread(unsigned int id, u32 *buf)
{
struct omap_mcbsp *mcbsp;
void __iomem *base;
@@ -671,24 +669,22 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf)
base = mcbsp->io_base;
/* if frame sync error - clear the error */
- if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
+ if (OMAP_MCBSP_READ(base, SPCR1) & RSYNC_ERR) {
/* clear error */
- writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
- base + OMAP_MCBSP_REG_SPCR1);
+ OMAP_MCBSP_WRITE(base, SPCR1, OMAP_MCBSP_READ(base, SPCR1)
+ & (~RSYNC_ERR));
/* resend */
return -1;
} else {
/* wait for recieve confirmation */
int attemps = 0;
- while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
- if (attemps++ > 1000) {
- writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
- (~RRST),
- base + OMAP_MCBSP_REG_SPCR1);
+ while (!(OMAP_MCBSP_READ(base, SPCR1) & RRDY)) {
+ if (attemps++ > 10000) {
+ OMAP_MCBSP_WRITE(base, SPCR1,
+ OMAP_MCBSP_READ(base, SPCR1) & (~RRST));
udelay(10);
- writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
- (RRST),
- base + OMAP_MCBSP_REG_SPCR1);
+ OMAP_MCBSP_WRITE(base, SPCR1,
+ OMAP_MCBSP_READ(base, SPCR1) | (RRST));
udelay(10);
dev_err(mcbsp->dev, "Could not read from"
" McBSP%d Register\n", mcbsp->id);
@@ -696,7 +692,7 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf)
}
}
}
- *buf = readw(base + OMAP_MCBSP_REG_DRR1);
+ *buf = OMAP_MCBSP_READ(base, DRR);
return 0;
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH] OMAP3: Fix McBSP poll read and write for 32bit reg access
2009-10-14 9:30 charu
@ 2009-10-14 9:52 ` vimal singh
2009-10-14 10:31 ` G, Manjunath Kondaiah
2009-10-14 10:05 ` Shilimkar, Santosh
1 sibling, 1 reply; 11+ messages in thread
From: vimal singh @ 2009-10-14 9:52 UTC (permalink / raw)
To: charu; +Cc: linux-omap, Syed Rafiuddin
On Wed, Oct 14, 2009 at 3:00 PM, <charu@ti.com> wrote:
> omap_mcbsp_pollwrite and omap_mcbsp_pollread functions access
> McBSP registers as 16-bit registers.
>
> The McBSP registers (DRR_REG and DXR_REG) are limited to
> 32-bit data accesses (L4 Interconnect). 16-bit and 8-bit is
> not allowed and can corrupt register content.
>
> This patch modifies omap_mcbsp_pollwrite and
> omap_mcbsp_pollread functions to do 32 bit access for above
> mentioned McBSP registers. Data accepted by these
> functions is also modified to 32-bit.
>
> Signed-off-by: Charulatha V <charu@ti.com>
> Signed-off-by: Syed Rafiuddin <rafiuddin.syed@ti.com>
> ---
> arch/arm/plat-omap/include/mach/mcbsp.h | 4 +-
> arch/arm/plat-omap/mcbsp.c | 46 ++++++++++++++-----------------
> 2 files changed, 23 insertions(+), 27 deletions(-)
>
> diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h
> index 7e9cae3..05b0d8d 100644
> --- a/arch/arm/plat-omap/include/mach/mcbsp.h
> +++ b/arch/arm/plat-omap/include/mach/mcbsp.h
> @@ -455,8 +455,8 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word);
> void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg);
>
> /* Polled read/write functions */
> -int omap_mcbsp_pollread(unsigned int id, u16 * buf);
> -int omap_mcbsp_pollwrite(unsigned int id, u16 buf);
> +int omap_mcbsp_pollread(unsigned int id, u32 *buf);
> +int omap_mcbsp_pollwrite(unsigned int id, u32 buf);
> int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type);
>
> #endif
> diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
> index 88ac976..1f278a2 100644
> --- a/arch/arm/plat-omap/mcbsp.c
> +++ b/arch/arm/plat-omap/mcbsp.c
> @@ -613,7 +613,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
> EXPORT_SYMBOL(omap_mcbsp_stop);
>
> /* polled mcbsp i/o operations */
> -int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
> +int omap_mcbsp_pollwrite(unsigned int id, u32 buf)
> {
> struct omap_mcbsp *mcbsp;
> void __iomem *base;
> @@ -626,26 +626,24 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
> mcbsp = id_to_mcbsp_ptr(id);
> base = mcbsp->io_base;
>
> - writew(buf, base + OMAP_MCBSP_REG_DXR1);
> + OMAP_MCBSP_WRITE(base, DXR, buf);
> /* if frame sync error - clear the error */
> - if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
> + if (OMAP_MCBSP_READ(base, SPCR2) & XSYNC_ERR) {
> /* clear error */
> - writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
> - base + OMAP_MCBSP_REG_SPCR2);
> + OMAP_MCBSP_WRITE(base, SPCR2, OMAP_MCBSP_READ(base , SPCR2)
remove extra space: 'base ,'
checkpatch.pl should catch these kind of issues.
-vimal
> + & (~XSYNC_ERR));
> /* resend */
> return -1;
> } else {
> /* wait for transmit confirmation */
> int attemps = 0;
> - while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
> + while (!(OMAP_MCBSP_READ(base, SPCR2) & XRDY)) {
> if (attemps++ > 1000) {
> - writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
> - (~XRST),
> - base + OMAP_MCBSP_REG_SPCR2);
> + OMAP_MCBSP_WRITE(base, SPCR2,
> + OMAP_MCBSP_READ(base, SPCR2) & (~XRST));
> udelay(10);
> - writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
> - (XRST),
> - base + OMAP_MCBSP_REG_SPCR2);
> + OMAP_MCBSP_WRITE(base, SPCR2,
> + OMAP_MCBSP_READ(base, SPCR2) | (XRST));
> udelay(10);
> dev_err(mcbsp->dev, "Could not write to"
> " McBSP%d Register\n", mcbsp->id);
> @@ -658,7 +656,7 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
> }
> EXPORT_SYMBOL(omap_mcbsp_pollwrite);
>
> -int omap_mcbsp_pollread(unsigned int id, u16 *buf)
> +int omap_mcbsp_pollread(unsigned int id, u32 *buf)
> {
> struct omap_mcbsp *mcbsp;
> void __iomem *base;
> @@ -671,24 +669,22 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf)
>
> base = mcbsp->io_base;
> /* if frame sync error - clear the error */
> - if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
> + if (OMAP_MCBSP_READ(base, SPCR1) & RSYNC_ERR) {
> /* clear error */
> - writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
> - base + OMAP_MCBSP_REG_SPCR1);
> + OMAP_MCBSP_WRITE(base, SPCR1, OMAP_MCBSP_READ(base, SPCR1)
> + & (~RSYNC_ERR));
> /* resend */
> return -1;
> } else {
> /* wait for recieve confirmation */
> int attemps = 0;
> - while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
> - if (attemps++ > 1000) {
> - writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
> - (~RRST),
> - base + OMAP_MCBSP_REG_SPCR1);
> + while (!(OMAP_MCBSP_READ(base, SPCR1) & RRDY)) {
> + if (attemps++ > 10000) {
> + OMAP_MCBSP_WRITE(base, SPCR1,
> + OMAP_MCBSP_READ(base, SPCR1) & (~RRST));
> udelay(10);
> - writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
> - (RRST),
> - base + OMAP_MCBSP_REG_SPCR1);
> + OMAP_MCBSP_WRITE(base, SPCR1,
> + OMAP_MCBSP_READ(base, SPCR1) | (RRST));
> udelay(10);
> dev_err(mcbsp->dev, "Could not read from"
> " McBSP%d Register\n", mcbsp->id);
> @@ -696,7 +692,7 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf)
> }
> }
> }
> - *buf = readw(base + OMAP_MCBSP_REG_DRR1);
> + *buf = OMAP_MCBSP_READ(base, DRR);
>
> return 0;
> }
> --
> 1.6.0.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
--
Regards,
Vimal Singh
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 11+ messages in thread* RE: [PATCH] OMAP3: Fix McBSP poll read and write for 32bit reg access
2009-10-14 9:52 ` vimal singh
@ 2009-10-14 10:31 ` G, Manjunath Kondaiah
0 siblings, 0 replies; 11+ messages in thread
From: G, Manjunath Kondaiah @ 2009-10-14 10:31 UTC (permalink / raw)
To: vimal singh, Varadarajan, Charu Latha
Cc: linux-omap@vger.kernel.org, Syed, Rafiuddin
> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org
> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of vimal singh
> Sent: Wednesday, October 14, 2009 3:23 PM
> To: Varadarajan, Charu Latha
> Cc: linux-omap@vger.kernel.org; Syed, Rafiuddin
> Subject: Re: [PATCH] OMAP3: Fix McBSP poll read and write for
> 32bit reg access
> >
> > base = mcbsp->io_base;
> > /* if frame sync error - clear the error */
> > - if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
> > + if (OMAP_MCBSP_READ(base, SPCR1) & RSYNC_ERR) {
> > /* clear error */
> > - writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
> (~RSYNC_ERR),
> > - base + OMAP_MCBSP_REG_SPCR1);
> > + OMAP_MCBSP_WRITE(base, SPCR1,
> OMAP_MCBSP_READ(base, SPCR1)
> > + & (~RSYNC_ERR));
> > /* resend */
> > return -1;
Return value can be a meaningful macro with proper value?
> > } else {
> > /* wait for recieve confirmation */
> > int attemps = 0;
> > - while (!(readw(base + OMAP_MCBSP_REG_SPCR1)
> & RRDY)) {
> > - if (attemps++ > 1000) {
> > - writew(readw(base +
> OMAP_MCBSP_REG_SPCR1) &
> > - (~RRST),
> > - base + OMAP_MCBSP_REG_SPCR1);
> > + while (!(OMAP_MCBSP_READ(base, SPCR1) & RRDY)) {
> > + if (attemps++ > 10000) {
> > + OMAP_MCBSP_WRITE(base, SPCR1,
> > +
Why attemps changed from 1000 to 10000?
-Manjunath
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 11+ messages in thread
* RE: [PATCH] OMAP3: Fix McBSP poll read and write for 32bit reg access
2009-10-14 9:30 charu
2009-10-14 9:52 ` vimal singh
@ 2009-10-14 10:05 ` Shilimkar, Santosh
1 sibling, 0 replies; 11+ messages in thread
From: Shilimkar, Santosh @ 2009-10-14 10:05 UTC (permalink / raw)
To: Varadarajan, Charu Latha, linux-omap@vger.kernel.org; +Cc: Syed, Rafiuddin
Charu,
> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
> owner@vger.kernel.org] On Behalf Of Varadarajan, Charu Latha
> Sent: Wednesday, October 14, 2009 3:00 PM
> To: linux-omap@vger.kernel.org
> Cc: Varadarajan, Charu Latha; Syed, Rafiuddin
> Subject: [PATCH] OMAP3: Fix McBSP poll read and write for 32bit reg access
>
> omap_mcbsp_pollwrite and omap_mcbsp_pollread functions access
> McBSP registers as 16-bit registers.
>
> The McBSP registers (DRR_REG and DXR_REG) are limited to
> 32-bit data accesses (L4 Interconnect). 16-bit and 8-bit is
> not allowed and can corrupt register content.
>
> This patch modifies omap_mcbsp_pollwrite and
> omap_mcbsp_pollread functions to do 32 bit access for above
> mentioned McBSP registers. Data accepted by these
> functions is also modified to 32-bit.
>
> Signed-off-by: Charulatha V <charu@ti.com>
> Signed-off-by: Syed Rafiuddin <rafiuddin.syed@ti.com>
> ---
> arch/arm/plat-omap/include/mach/mcbsp.h | 4 +-
> arch/arm/plat-omap/mcbsp.c | 46 ++++++++++++++------------
> -----
> 2 files changed, 23 insertions(+), 27 deletions(-)
>
> diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-
> omap/include/mach/mcbsp.h
> index 7e9cae3..05b0d8d 100644
> --- a/arch/arm/plat-omap/include/mach/mcbsp.h
> +++ b/arch/arm/plat-omap/include/mach/mcbsp.h
> @@ -455,8 +455,8 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int
> id, u32 * word);
> void omap_mcbsp_set_spi_mode(unsigned int id, const struct
> omap_mcbsp_spi_cfg * spi_cfg);
>
> /* Polled read/write functions */
> -int omap_mcbsp_pollread(unsigned int id, u16 * buf);
> -int omap_mcbsp_pollwrite(unsigned int id, u16 buf);
> +int omap_mcbsp_pollread(unsigned int id, u32 *buf);
> +int omap_mcbsp_pollwrite(unsigned int id, u32 buf);
If the issue is with DRR_REG and DXR_REG, why are you changing the signature of the generic API. You can handle these registers as a exceptions in the code.
> int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t
> io_type);
>
> #endif
> diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
> index 88ac976..1f278a2 100644
> --- a/arch/arm/plat-omap/mcbsp.c
> +++ b/arch/arm/plat-omap/mcbsp.c
> @@ -613,7 +613,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
> EXPORT_SYMBOL(omap_mcbsp_stop);
>
> /* polled mcbsp i/o operations */
> -int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
> +int omap_mcbsp_pollwrite(unsigned int id, u32 buf)
> {
> struct omap_mcbsp *mcbsp;
> void __iomem *base;
> @@ -626,26 +626,24 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
> mcbsp = id_to_mcbsp_ptr(id);
> base = mcbsp->io_base;
>
> - writew(buf, base + OMAP_MCBSP_REG_DXR1);
> + OMAP_MCBSP_WRITE(base, DXR, buf);
Why do you need this? Is writew()/readw() not doing 16 bit operations ?
> /* if frame sync error - clear the error */
> - if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
> + if (OMAP_MCBSP_READ(base, SPCR2) & XSYNC_ERR) {
> /* clear error */
> - writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
> - base + OMAP_MCBSP_REG_SPCR2);
> + OMAP_MCBSP_WRITE(base, SPCR2, OMAP_MCBSP_READ(base , SPCR2)
> + & (~XSYNC_ERR));
> /* resend */
> return -1;
> } else {
> /* wait for transmit confirmation */
> int attemps = 0;
> - while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
> + while (!(OMAP_MCBSP_READ(base, SPCR2) & XRDY)) {
> if (attemps++ > 1000) {
> - writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
> - (~XRST),
> - base + OMAP_MCBSP_REG_SPCR2);
> + OMAP_MCBSP_WRITE(base, SPCR2,
> + OMAP_MCBSP_READ(base, SPCR2) & (~XRST));
> udelay(10);
> - writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
> - (XRST),
> - base + OMAP_MCBSP_REG_SPCR2);
> + OMAP_MCBSP_WRITE(base, SPCR2,
> + OMAP_MCBSP_READ(base, SPCR2) | (XRST));
> udelay(10);
> dev_err(mcbsp->dev, "Could not write to"
> " McBSP%d Register\n", mcbsp->id);
> @@ -658,7 +656,7 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
> }
> EXPORT_SYMBOL(omap_mcbsp_pollwrite);
>
> -int omap_mcbsp_pollread(unsigned int id, u16 *buf)
> +int omap_mcbsp_pollread(unsigned int id, u32 *buf)
> {
> struct omap_mcbsp *mcbsp;
> void __iomem *base;
> @@ -671,24 +669,22 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf)
>
> base = mcbsp->io_base;
> /* if frame sync error - clear the error */
> - if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
> + if (OMAP_MCBSP_READ(base, SPCR1) & RSYNC_ERR) {
> /* clear error */
> - writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
> - base + OMAP_MCBSP_REG_SPCR1);
> + OMAP_MCBSP_WRITE(base, SPCR1, OMAP_MCBSP_READ(base, SPCR1)
> + & (~RSYNC_ERR));
> /* resend */
> return -1;
> } else {
> /* wait for recieve confirmation */
> int attemps = 0;
> - while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
> - if (attemps++ > 1000) {
> - writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
> - (~RRST),
> - base + OMAP_MCBSP_REG_SPCR1);
> + while (!(OMAP_MCBSP_READ(base, SPCR1) & RRDY)) {
> + if (attemps++ > 10000) {
> + OMAP_MCBSP_WRITE(base, SPCR1,
> + OMAP_MCBSP_READ(base, SPCR1) & (~RRST));
> udelay(10);
> - writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
> - (RRST),
> - base + OMAP_MCBSP_REG_SPCR1);
> + OMAP_MCBSP_WRITE(base, SPCR1,
> + OMAP_MCBSP_READ(base, SPCR1) | (RRST));
> udelay(10);
> dev_err(mcbsp->dev, "Could not read from"
> " McBSP%d Register\n", mcbsp->id);
> @@ -696,7 +692,7 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf)
> }
> }
> }
> - *buf = readw(base + OMAP_MCBSP_REG_DRR1);
> + *buf = OMAP_MCBSP_READ(base, DRR);
>
> return 0;
> }
> --
> 1.6.0.4
Regards,
Santosh
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2009-10-15 11:57 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
[not found] <E0D41E29EB0DAC4E9F3FF173962E9E940253DAF74A@dbde02.ent.ti.com>
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02BA31ADB2@dbde02.ent.ti.com>
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02BB255576@dbde02.ent.ti.com>
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02BA31ADB7@dbde02.ent.ti.com>
[not found] ` <19F8576C6E063C45BE387C64729E73940436DB248C@dbde02.ent.ti.com>
2009-10-15 5:29 ` [PATCH] OMAP3: Fix McBSP poll read and write for 32bit reg access Varadarajan, Charu Latha
2009-10-15 6:10 ` Shilimkar, Santosh
2009-10-15 7:25 ` Peter Ujfalusi
2009-10-15 7:30 ` Shilimkar, Santosh
[not found] ` <5A47E75E594F054BAF48C5E4FC4B92AB030A46D070@dbde02.ent.ti.com>
2009-10-15 11:57 ` Varadarajan, Charu Latha
[not found] <E0D41E29EB0DAC4E9F3FF173962E9E940253DAF724@dbde02.ent.ti.com>
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02BA31ADB4@dbde02.ent.ti.com>
[not found] ` <EAF47CD23C76F840A9E7FCE10091EFAB02BA31ADB8@dbde02.ent.ti.com>
[not found] ` <19F8576C6E063C45BE387C64729E73940436DB248F@dbde02.ent.ti.com>
2009-10-15 5:32 ` Varadarajan, Charu Latha
[not found] <E0D41E29EB0DAC4E9F3FF173962E9E940253DAF770@dbde02.ent.ti.com>
2009-10-14 11:01 ` Varadarajan, Charu Latha
2009-10-14 9:30 charu
2009-10-14 9:52 ` vimal singh
2009-10-14 10:31 ` G, Manjunath Kondaiah
2009-10-14 10:05 ` Shilimkar, Santosh
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.