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From: Wei Wang2 <wei.wang2@amd.com>
To: Keir Fraser <keir.fraser@eu.citrix.com>
Cc: "xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>
Subject: Re: [PATCH] AMD IOMMU: Parse IVRS table early to prevent iommu_enabled from being disabled
Date: Wed, 28 Oct 2009 18:46:23 +0100	[thread overview]
Message-ID: <200910281846.24292.wei.wang2@amd.com> (raw)
In-Reply-To: <C70E3037.18AF6%keir.fraser@eu.citrix.com>

On Wednesday 28 October 2009 18:30:31 Keir Fraser wrote:
> On 28/10/2009 16:31, "Wei Wang2" <wei.wang2@amd.com> wrote:
> > This patch moves IVRS table parsing functions into an early position,
> > which prevent iommu_enabled from being disabled by failure dmar table
> > detection.
>
> Not nice. See if c/s 20381 fixes your problem. It's justa  cleanup of some
> VT-d code which should avoid the problem altogether.
>
>  -- Keir

Thanks, I have not checked 20381 while creating this patch. I will test it 
again and send something new if necessary.
-Wei

  reply	other threads:[~2009-10-28 17:46 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-10-28 16:31 [PATCH] AMD IOMMU: Parse IVRS table early to prevent iommu_enabled from being disabled Wei Wang2
2009-10-28 17:30 ` Keir Fraser
2009-10-28 17:46   ` Wei Wang2 [this message]
2009-10-28 18:03     ` Keir Fraser
2009-10-29 13:51       ` Wei Wang2

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