L4 interconnect memory mapping

L4 interconnect memory mapping

[Felipe Balbi]

Hi Tony and Paul,

maybe a silly question, but here it goes:

Do we have any piece of code handling the L4 interconnect memory space ?
I mean, looking at omap3 TRM pages 212 - 219, I see that e.g. for the
musb block we have:

HS USB OTG	0x480AB000 - 0x480ABFFF	4KB	Module
		0x480AC000 - 0x480ACFFF	4KB	L4 interconnect

So the first 4K is what we pass down to drivers via struct resource and
the second 4K ? What do we do with that ?

-- 
balbi

Re: L4 interconnect memory mapping

[Felipe Balbi]

Hi,

On Wed, 2009-12-30 at 01:25 +0200, Felipe Balbi wrote:
> Hi Tony and Paul,
> 
> maybe a silly question, but here it goes:
> 
> Do we have any piece of code handling the L4 interconnect memory space ?
> I mean, looking at omap3 TRM pages 212 - 219, I see that e.g. for the
> musb block we have:
> 
> HS USB OTG	0x480AB000 - 0x480ABFFF	4KB	Module
> 		0x480AC000 - 0x480ACFFF	4KB	L4 interconnect
> 
> So the first 4K is what we pass down to drivers via struct resource and
> the second 4K ? What do we do with that ?

no with Paul's address correct.

-- 
balbi

Re: L4 interconnect memory mapping

[Tony Lindgren]

* Felipe Balbi <me@felipebalbi.com> [091229 15:26]:
> Hi,
> 
> On Wed, 2009-12-30 at 01:25 +0200, Felipe Balbi wrote:
> > Hi Tony and Paul,
> > 
> > maybe a silly question, but here it goes:
> > 
> > Do we have any piece of code handling the L4 interconnect memory space ?
> > I mean, looking at omap3 TRM pages 212 - 219, I see that e.g. for the
> > musb block we have:
> > 
> > HS USB OTG	0x480AB000 - 0x480ABFFF	4KB	Module
> > 		0x480AC000 - 0x480ACFFF	4KB	L4 interconnect
> > 
> > So the first 4K is what we pass down to drivers via struct resource and
> > the second 4K ? What do we do with that ?
> 
> no with Paul's address correct.

Looks like you might want to update your earlier patch to just comment
that the 8K address space for musb is 4K + 4K for L4 interconnect :)

Tony

Re: L4 interconnect memory mapping

[Felipe Balbi]

On Tue, 2009-12-29 at 15:46 -0800, Tony Lindgren wrote:
> * Felipe Balbi <me@felipebalbi.com> [091229 15:26]:
> > Hi,
> > 
> > On Wed, 2009-12-30 at 01:25 +0200, Felipe Balbi wrote:
> > > Hi Tony and Paul,
> > > 
> > > maybe a silly question, but here it goes:
> > > 
> > > Do we have any piece of code handling the L4 interconnect memory space ?
> > > I mean, looking at omap3 TRM pages 212 - 219, I see that e.g. for the
> > > musb block we have:
> > > 
> > > HS USB OTG	0x480AB000 - 0x480ABFFF	4KB	Module
> > > 		0x480AC000 - 0x480ACFFF	4KB	L4 interconnect
> > > 
> > > So the first 4K is what we pass down to drivers via struct resource and
> > > the second 4K ? What do we do with that ?
> > 
> > no with Paul's address correct.
> 
> Looks like you might want to update your earlier patch to just comment
> that the 8K address space for musb is 4K + 4K for L4 interconnect :)

was thinking about that just now heh, but what do we do with the extra
4k ? It's the same for all other modules. Is omap_hwmod taking care of
that ?

-- 
balbi

RE: L4 interconnect memory mapping

[Shilimkar, Santosh]

> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of Felipe
> Balbi
> Sent: Wednesday, December 30, 2009 5:20 AM
> To: Tony Lindgren
> Cc: paul@pwsan.com; linux-omap@vger.kernel.org
> Subject: Re: L4 interconnect memory mapping
> 
> On Tue, 2009-12-29 at 15:46 -0800, Tony Lindgren wrote:
> > * Felipe Balbi <me@felipebalbi.com> [091229 15:26]:
> > > Hi,
> > >
> > > On Wed, 2009-12-30 at 01:25 +0200, Felipe Balbi wrote:
> > > > Hi Tony and Paul,
> > > >
> > > > maybe a silly question, but here it goes:
> > > >
> > > > Do we have any piece of code handling the L4 interconnect memory space ?
> > > > I mean, looking at omap3 TRM pages 212 - 219, I see that e.g. for the
> > > > musb block we have:
> > > >
> > > > HS USB OTG	0x480AB000 - 0x480ABFFF	4KB	Module
> > > > 		0x480AC000 - 0x480ACFFF	4KB	L4 interconnect
> > > >
> > > > So the first 4K is what we pass down to drivers via struct resource and
> > > > the second 4K ? What do we do with that ?
> > >
> > > no with Paul's address correct.
> >
> > Looks like you might want to update your earlier patch to just comment
> > that the 8K address space for musb is 4K + 4K for L4 interconnect :)
> 
> was thinking about that just now heh, but what do we do with the extra
> 4k ? It's the same for all other modules. Is omap_hwmod taking care of
> that ?
I don't think you need to map 8k if there is no additional register in upper 4K.
All memory spaces described as modules provide direct access to the module registers outside the L4 interconnect. All other accesses are internal to the L4 interconnect ( L4_CFG, L4_PER). 

Regards,
Santosh

Re: L4 interconnect memory mapping

[Paul Walmsley]

On Wed, 30 Dec 2009, Felipe Balbi wrote:

> On Tue, 2009-12-29 at 15:46 -0800, Tony Lindgren wrote:
> > * Felipe Balbi <me@felipebalbi.com> [091229 15:26]:
> > > Hi,
> > > 
> > > On Wed, 2009-12-30 at 01:25 +0200, Felipe Balbi wrote:
> > > > Hi Tony and Paul,
> > > > 
> > > > maybe a silly question, but here it goes:
> > > > 
> > > > Do we have any piece of code handling the L4 interconnect memory space ?
> > > > I mean, looking at omap3 TRM pages 212 - 219, I see that e.g. for the
> > > > musb block we have:
> > > > 
> > > > HS USB OTG	0x480AB000 - 0x480ABFFF	4KB	Module
> > > > 		0x480AC000 - 0x480ACFFF	4KB	L4 interconnect
> > > > 
> > > > So the first 4K is what we pass down to drivers via struct resource and
> > > > the second 4K ? What do we do with that ?
> > > 
> > > no with Paul's address correct.
> > 
> > Looks like you might want to update your earlier patch to just comment
> > that the 8K address space for musb is 4K + 4K for L4 interconnect :)
> 
> was thinking about that just now heh, but what do we do with the extra
> 4k ? It's the same for all other modules. Is omap_hwmod taking care of
> that ?

That second 4KiB range is the interconnect target agent between the 
interconnect and the HS USB OTG IP block.  No need to deal with it.  At 
some point either omap_hwmod or an interconnect driver will probably 
reserve it for bookkeeping purposes.


- Paul

Re: L4 interconnect memory mapping

[Felipe Balbi]

Hi,

On Wed, 2009-12-30 at 02:16 -0700, Paul Walmsley wrote:
> That second 4KiB range is the interconnect target agent between the 
> interconnect and the HS USB OTG IP block.  No need to deal with it.  At 
> some point either omap_hwmod or an interconnect driver will probably 
> reserve it for bookkeeping purposes.

Ok, got it. Thanks for the info.

-- 
balbi