From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Conor.Dooley@microchip.com, mturquette@baylibre.com,
sboyd@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, palmer@dabbelt.com,
Daire.McNamara@microchip.com
Cc: paul.walmsley@sifive.com, aou@eecs.berkeley.edu,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH 6/6] riscv: dts: microchip: add the mpfs' fabric clock control
Date: Fri, 19 Aug 2022 17:35:12 +0300 [thread overview]
Message-ID: <200e3faf-e377-9fab-7cb2-bbea07be00cf@linaro.org> (raw)
In-Reply-To: <560e80df-4819-1062-50ee-eb1d1d19bae1@microchip.com>
On 19/08/2022 17:32, Conor.Dooley@microchip.com wrote:
>> The clock names should not really matter, so if you have conflict of
>> names among multiple controllers, I think driver should embed unit
>> address in the name (as fallback of clock-output-name) and the binding
>> should not enforce specific pattern.
>
> Not sure if you just passed over it, but I agree:
>>> Truncated base address I suppose would be a meaningful thing
>>> to fall back to afterwards.
Yeah, indeed, you mentioned it.
>
> But if the names aren't an ABI, then either there's not much point in
> having the regex at all for clock-output-names or failing the check for
> it does not matter. I'll have a think over the weekend about what
> exactly to do, but I think the driver side of this is clear to me now &
> what not to do in the binding is too.
Yes.
>
>> I can easily imagine a real hardware board design with
>> "sexy_duck_ccc_pll1_out3" clock names. :)
>
> If Alestorm made a board with our FPGA, I could see that..
> I'd buy the t-shirt too!
>
Best regards,
Krzysztof
WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Conor.Dooley@microchip.com, mturquette@baylibre.com,
sboyd@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, palmer@dabbelt.com,
Daire.McNamara@microchip.com
Cc: paul.walmsley@sifive.com, aou@eecs.berkeley.edu,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH 6/6] riscv: dts: microchip: add the mpfs' fabric clock control
Date: Fri, 19 Aug 2022 17:35:12 +0300 [thread overview]
Message-ID: <200e3faf-e377-9fab-7cb2-bbea07be00cf@linaro.org> (raw)
In-Reply-To: <560e80df-4819-1062-50ee-eb1d1d19bae1@microchip.com>
On 19/08/2022 17:32, Conor.Dooley@microchip.com wrote:
>> The clock names should not really matter, so if you have conflict of
>> names among multiple controllers, I think driver should embed unit
>> address in the name (as fallback of clock-output-name) and the binding
>> should not enforce specific pattern.
>
> Not sure if you just passed over it, but I agree:
>>> Truncated base address I suppose would be a meaningful thing
>>> to fall back to afterwards.
Yeah, indeed, you mentioned it.
>
> But if the names aren't an ABI, then either there's not much point in
> having the regex at all for clock-output-names or failing the check for
> it does not matter. I'll have a think over the weekend about what
> exactly to do, but I think the driver side of this is clear to me now &
> what not to do in the binding is too.
Yes.
>
>> I can easily imagine a real hardware board design with
>> "sexy_duck_ccc_pll1_out3" clock names. :)
>
> If Alestorm made a board with our FPGA, I could see that..
> I'd buy the t-shirt too!
>
Best regards,
Krzysztof
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next prev parent reply other threads:[~2022-08-19 14:35 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-19 12:22 [PATCH 0/6] Add PolarFire SoC Fabric Clock Conditioning Circuitry Support Conor Dooley
2022-08-19 12:22 ` Conor Dooley
2022-08-19 12:22 ` [PATCH 1/6] dt-bindings: clk: rename mpfs-clkcfg binding Conor Dooley
2022-08-19 12:22 ` Conor Dooley
2022-08-19 12:44 ` Krzysztof Kozlowski
2022-08-19 12:44 ` Krzysztof Kozlowski
2022-08-19 12:22 ` [PATCH 2/6] dt-bindings: clk: document PolarFire SoC fabric clocks Conor Dooley
2022-08-19 12:22 ` Conor Dooley
2022-08-19 12:45 ` Krzysztof Kozlowski
2022-08-19 12:45 ` Krzysztof Kozlowski
2022-08-19 13:20 ` Conor.Dooley
2022-08-19 13:20 ` Conor.Dooley
2022-08-19 12:22 ` [PATCH 3/6] dt-bindings: clk: add PolarFire SoC fabric clock ids Conor Dooley
2022-08-19 12:22 ` Conor Dooley
2022-08-19 12:45 ` Krzysztof Kozlowski
2022-08-19 12:45 ` Krzysztof Kozlowski
2022-08-19 12:22 ` [PATCH 4/6] clk: microchip: add PolarFire SoC fabric clock support Conor Dooley
2022-08-19 12:22 ` Conor Dooley
2022-08-19 12:22 ` [PATCH 5/6] dt-bindings: riscv: microchip: document icicle reference design Conor Dooley
2022-08-19 12:22 ` Conor Dooley
2022-08-19 12:46 ` Krzysztof Kozlowski
2022-08-19 12:46 ` Krzysztof Kozlowski
2022-08-19 12:23 ` [PATCH 6/6] riscv: dts: microchip: add the mpfs' fabric clock control Conor Dooley
2022-08-19 12:23 ` Conor Dooley
2022-08-19 12:47 ` Krzysztof Kozlowski
2022-08-19 12:47 ` Krzysztof Kozlowski
2022-08-19 13:15 ` Conor.Dooley
2022-08-19 13:15 ` Conor.Dooley
2022-08-19 13:28 ` Krzysztof Kozlowski
2022-08-19 13:28 ` Krzysztof Kozlowski
2022-08-19 13:48 ` Conor.Dooley
2022-08-19 13:48 ` Conor.Dooley
2022-08-19 14:06 ` Krzysztof Kozlowski
2022-08-19 14:06 ` Krzysztof Kozlowski
2022-08-19 14:14 ` Conor.Dooley
2022-08-19 14:14 ` Conor.Dooley
2022-08-19 14:22 ` Krzysztof Kozlowski
2022-08-19 14:22 ` Krzysztof Kozlowski
2022-08-19 14:32 ` Conor.Dooley
2022-08-19 14:32 ` Conor.Dooley
2022-08-19 14:35 ` Krzysztof Kozlowski [this message]
2022-08-19 14:35 ` Krzysztof Kozlowski
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