* [PATCH] vic: factor out common init code @ 2010-03-18 23:00 ` H Hartley Sweeten 2010-03-25 8:20 ` Linus Walleij 0 siblings, 1 reply; 6+ messages in thread From: H Hartley Sweeten @ 2010-03-18 23:00 UTC (permalink / raw) To: linux-arm-kernel This factors out the common initialization code for the two vic vendors into easier maintainable functions. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Linus Walleij <linus.walleij@stericsson.com> Cc: Alessandro Rubini <rubini@unipv.it> Cc: Andrea Gallo <andrea.gallo@stericsson.com> Cc: Ben Dooks <ben-linux@fluff.org> --- diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index 1cf999a..ba65f6e 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c @@ -266,13 +266,53 @@ static int vic_set_wake(unsigned int irq, unsigned int on) #endif /* CONFIG_PM */ static struct irq_chip vic_chip = { - .name = "VIC", - .ack = vic_ack_irq, - .mask = vic_mask_irq, - .unmask = vic_unmask_irq, - .set_wake = vic_set_wake, + .name = "VIC", + .ack = vic_ack_irq, + .mask = vic_mask_irq, + .unmask = vic_unmask_irq, + .set_wake = vic_set_wake, }; +static void __init vic_disable(void __iomem *base) +{ + writel(0, base + VIC_INT_SELECT); + writel(0, base + VIC_INT_ENABLE); + writel(~0, base + VIC_INT_ENABLE_CLEAR); + writel(0, base + VIC_IRQ_STATUS); + writel(0, base + VIC_ITCR); + writel(~0, base + VIC_INT_SOFT_CLEAR); +} + +static void __init vic_clear_interrupts(void __iomem *base) +{ + unsigned int i; + + writel(0, base + VIC_PL190_VECT_ADDR); + for (i = 0; i < 19; i++) { + unsigned int value; + + value = readl(base + VIC_PL190_VECT_ADDR); + writel(value, base + VIC_PL190_VECT_ADDR); + } +} + +static void __init vic_set_irq_sources(void __iomem *base, + unsigned int irq_start, u32 vic_sources) +{ + unsigned int i; + + for (i = 0; i < 32; i++) { + if (vic_sources & (1 << i)) { + unsigned int irq = irq_start + i; + + set_irq_chip(irq, &vic_chip); + set_irq_chip_data(irq, base); + set_irq_handler(irq, handle_level_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + } + } +} + /* * The PL190 cell from ARM has been modified by ST to handle 64 interrupts. * The original cell has 32 interrupts, while the modified one has 64, @@ -287,13 +327,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start, int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0; /* Disable all interrupts initially. */ - - writel(0, base + VIC_INT_SELECT); - writel(0, base + VIC_INT_ENABLE); - writel(~0, base + VIC_INT_ENABLE_CLEAR); - writel(0, base + VIC_IRQ_STATUS); - writel(0, base + VIC_ITCR); - writel(~0, base + VIC_INT_SOFT_CLEAR); + vic_disable(base); /* * Make sure we clear all existing interrupts. The vector registers @@ -302,13 +336,8 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start, * the second base address, which is 0x20 in the page */ if (vic_2nd_block) { - writel(0, base + VIC_PL190_VECT_ADDR); - for (i = 0; i < 19; i++) { - unsigned int value; + vic_clear_interrupts(base); - value = readl(base + VIC_PL190_VECT_ADDR); - writel(value, base + VIC_PL190_VECT_ADDR); - } /* ST has 16 vectors as well, but we don't enable them by now */ for (i = 0; i < 16; i++) { void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4); @@ -318,16 +347,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start, writel(32, base + VIC_PL190_DEF_VECT_ADDR); } - for (i = 0; i < 32; i++) { - if (vic_sources & (1 << i)) { - unsigned int irq = irq_start + i; - - set_irq_chip(irq, &vic_chip); - set_irq_chip_data(irq, base); - set_irq_handler(irq, handle_level_irq); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - } - } + vic_set_irq_sources(base, irq_start, vic_sources); } /** @@ -365,37 +385,14 @@ void __init vic_init(void __iomem *base, unsigned int irq_start, } /* Disable all interrupts initially. */ + vic_disable(base); - writel(0, base + VIC_INT_SELECT); - writel(0, base + VIC_INT_ENABLE); - writel(~0, base + VIC_INT_ENABLE_CLEAR); - writel(0, base + VIC_IRQ_STATUS); - writel(0, base + VIC_ITCR); - writel(~0, base + VIC_INT_SOFT_CLEAR); - - /* - * Make sure we clear all existing interrupts - */ - writel(0, base + VIC_PL190_VECT_ADDR); - for (i = 0; i < 19; i++) { - unsigned int value; - - value = readl(base + VIC_PL190_VECT_ADDR); - writel(value, base + VIC_PL190_VECT_ADDR); - } + /* Make sure we clear all existing interrupts */ + vic_clear_interrupts(base); vic_init2(base); - for (i = 0; i < 32; i++) { - if (vic_sources & (1 << i)) { - unsigned int irq = irq_start + i; - - set_irq_chip(irq, &vic_chip); - set_irq_chip_data(irq, base); - set_irq_handler(irq, handle_level_irq); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - } - } + vic_set_irq_sources(base, irq_start, vic_sources); vic_pm_register(base, irq_start, resume_sources); } ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH] vic: factor out common init code 2010-03-18 23:00 ` [PATCH] vic: factor out common init code H Hartley Sweeten @ 2010-03-25 8:20 ` Linus Walleij 2010-03-30 17:32 ` H Hartley Sweeten 0 siblings, 1 reply; 6+ messages in thread From: Linus Walleij @ 2010-03-25 8:20 UTC (permalink / raw) To: linux-arm-kernel 2010/3/19 H Hartley Sweeten <hartleys@visionengravers.com>: > This factors out the common initialization code for the two vic > vendors into easier maintainable functions. Sorry for the delay. Tested this on U300 and it works like a charm, good patch. Tested-by: Linus Walleij <linus.walleij@stericsson.com> Linus Walleij ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] vic: factor out common init code 2010-03-25 8:20 ` Linus Walleij @ 2010-03-30 17:32 ` H Hartley Sweeten 2010-03-30 17:38 ` Alessandro Rubini 0 siblings, 1 reply; 6+ messages in thread From: H Hartley Sweeten @ 2010-03-30 17:32 UTC (permalink / raw) To: linux-arm-kernel On Thursday, March 25, 2010 1:20 AM, Linus Walleij wrote: > 2010/3/19 H Hartley Sweeten <hartleys@visionengravers.com>: > >> This factors out the common initialization code for the two vic >> vendors into easier maintainable functions. > > Sorry for the delay. Tested this on U300 and it works like a charm, > good patch. > > Tested-by: Linus Walleij <linus.walleij@stericsson.com> Are there any more comments/tested-by's on this patch? Regards, Hartley --- This factors out the common initialization code for the two vic vendors into easier maintainable functions. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Tested-by: Linus Walleij <linus.walleij@stericsson.com> Cc: Alessandro Rubini <rubini@unipv.it> Cc: Andrea Gallo <andrea.gallo@stericsson.com> Cc: Ben Dooks <ben-linux@fluff.org> --- diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index 1cf999a..ba65f6e 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c @@ -266,13 +266,53 @@ static int vic_set_wake(unsigned int irq, unsigned int on) #endif /* CONFIG_PM */ static struct irq_chip vic_chip = { - .name = "VIC", - .ack = vic_ack_irq, - .mask = vic_mask_irq, - .unmask = vic_unmask_irq, - .set_wake = vic_set_wake, + .name = "VIC", + .ack = vic_ack_irq, + .mask = vic_mask_irq, + .unmask = vic_unmask_irq, + .set_wake = vic_set_wake, }; +static void __init vic_disable(void __iomem *base) +{ + writel(0, base + VIC_INT_SELECT); + writel(0, base + VIC_INT_ENABLE); + writel(~0, base + VIC_INT_ENABLE_CLEAR); + writel(0, base + VIC_IRQ_STATUS); + writel(0, base + VIC_ITCR); + writel(~0, base + VIC_INT_SOFT_CLEAR); +} + +static void __init vic_clear_interrupts(void __iomem *base) +{ + unsigned int i; + + writel(0, base + VIC_PL190_VECT_ADDR); + for (i = 0; i < 19; i++) { + unsigned int value; + + value = readl(base + VIC_PL190_VECT_ADDR); + writel(value, base + VIC_PL190_VECT_ADDR); + } +} + +static void __init vic_set_irq_sources(void __iomem *base, + unsigned int irq_start, u32 vic_sources) +{ + unsigned int i; + + for (i = 0; i < 32; i++) { + if (vic_sources & (1 << i)) { + unsigned int irq = irq_start + i; + + set_irq_chip(irq, &vic_chip); + set_irq_chip_data(irq, base); + set_irq_handler(irq, handle_level_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + } + } +} + /* * The PL190 cell from ARM has been modified by ST to handle 64 interrupts. * The original cell has 32 interrupts, while the modified one has 64, @@ -287,13 +327,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start, int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0; /* Disable all interrupts initially. */ - - writel(0, base + VIC_INT_SELECT); - writel(0, base + VIC_INT_ENABLE); - writel(~0, base + VIC_INT_ENABLE_CLEAR); - writel(0, base + VIC_IRQ_STATUS); - writel(0, base + VIC_ITCR); - writel(~0, base + VIC_INT_SOFT_CLEAR); + vic_disable(base); /* * Make sure we clear all existing interrupts. The vector registers @@ -302,13 +336,8 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start, * the second base address, which is 0x20 in the page */ if (vic_2nd_block) { - writel(0, base + VIC_PL190_VECT_ADDR); - for (i = 0; i < 19; i++) { - unsigned int value; + vic_clear_interrupts(base); - value = readl(base + VIC_PL190_VECT_ADDR); - writel(value, base + VIC_PL190_VECT_ADDR); - } /* ST has 16 vectors as well, but we don't enable them by now */ for (i = 0; i < 16; i++) { void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4); @@ -318,16 +347,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start, writel(32, base + VIC_PL190_DEF_VECT_ADDR); } - for (i = 0; i < 32; i++) { - if (vic_sources & (1 << i)) { - unsigned int irq = irq_start + i; - - set_irq_chip(irq, &vic_chip); - set_irq_chip_data(irq, base); - set_irq_handler(irq, handle_level_irq); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - } - } + vic_set_irq_sources(base, irq_start, vic_sources); } /** @@ -365,37 +385,14 @@ void __init vic_init(void __iomem *base, unsigned int irq_start, } /* Disable all interrupts initially. */ + vic_disable(base); - writel(0, base + VIC_INT_SELECT); - writel(0, base + VIC_INT_ENABLE); - writel(~0, base + VIC_INT_ENABLE_CLEAR); - writel(0, base + VIC_IRQ_STATUS); - writel(0, base + VIC_ITCR); - writel(~0, base + VIC_INT_SOFT_CLEAR); - - /* - * Make sure we clear all existing interrupts - */ - writel(0, base + VIC_PL190_VECT_ADDR); - for (i = 0; i < 19; i++) { - unsigned int value; - - value = readl(base + VIC_PL190_VECT_ADDR); - writel(value, base + VIC_PL190_VECT_ADDR); - } + /* Make sure we clear all existing interrupts */ + vic_clear_interrupts(base); vic_init2(base); - for (i = 0; i < 32; i++) { - if (vic_sources & (1 << i)) { - unsigned int irq = irq_start + i; - - set_irq_chip(irq, &vic_chip); - set_irq_chip_data(irq, base); - set_irq_handler(irq, handle_level_irq); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - } - } + vic_set_irq_sources(base, irq_start, vic_sources); vic_pm_register(base, irq_start, resume_sources); } ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH] vic: factor out common init code 2010-03-30 17:32 ` H Hartley Sweeten @ 2010-03-30 17:38 ` Alessandro Rubini 2010-03-30 17:44 ` H Hartley Sweeten 0 siblings, 1 reply; 6+ messages in thread From: Alessandro Rubini @ 2010-03-30 17:38 UTC (permalink / raw) To: linux-arm-kernel >> Tested-by: Linus Walleij <linus.walleij@stericsson.com> > > Are there any more comments/tested-by's on this patch? Sorry. I tested on nomadik 8815 but forgot to report it. Tested-by: Alessandro Rubini <rubini@unipv.it> /alessandro ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] vic: factor out common init code 2010-03-30 17:38 ` Alessandro Rubini @ 2010-03-30 17:44 ` H Hartley Sweeten 2010-03-30 17:59 ` Linus Walleij 0 siblings, 1 reply; 6+ messages in thread From: H Hartley Sweeten @ 2010-03-30 17:44 UTC (permalink / raw) To: linux-arm-kernel On Tuesday, March 30, 2010 10:39 AM, Alessandro Rubini wrote: >>> Tested-by: Linus Walleij <linus.walleij@stericsson.com> >> >> Are there any more comments/tested-by's on this patch? > > Sorry. I tested on nomadik 8815 but forgot to report it. > > Tested-by: Alessandro Rubini <rubini@unipv.it> Thanks! I'll wait a couple more days to see if Ben Dooks has any comments. Linus' Tested-by probably covers the same platform as Andrea Callo's. If there are no other comments I will add it to Russell's patch tracker next week. Regards, Hartley ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] vic: factor out common init code 2010-03-30 17:44 ` H Hartley Sweeten @ 2010-03-30 17:59 ` Linus Walleij 0 siblings, 0 replies; 6+ messages in thread From: Linus Walleij @ 2010-03-30 17:59 UTC (permalink / raw) To: linux-arm-kernel 2010/3/30 H Hartley Sweeten <hartleys@visionengravers.com>: > I'll wait a couple more days to see if Ben Dooks has any comments. > Linus' Tested-by probably covers the same platform as Andrea Callo's. No, but Alessandros does :-) Linus ^ permalink raw reply [flat|nested] 6+ messages in thread
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2010-03-18 23:00 ` [PATCH] vic: factor out common init code H Hartley Sweeten
2010-03-25 8:20 ` Linus Walleij
2010-03-30 17:32 ` H Hartley Sweeten
2010-03-30 17:38 ` Alessandro Rubini
2010-03-30 17:44 ` H Hartley Sweeten
2010-03-30 17:59 ` Linus Walleij
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