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From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
To: Jean Guyader <jean.guyader@eu.citrix.com>
Cc: "xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>,
	"Kay, Allen M" <allen.m.kay@intel.com>,
	"Han, Weidong" <weidong.han@intel.com>,
	Jean Guyader <Jean.Guyader@citrix.com>,
	Ian Pratt <Ian.Pratt@eu.citrix.com>,
	Ross Philipson <Ross.Philipson@citrix.com>,
	Jean Guyader <jean.guyader@gmail.com>
Subject: Re: [PATCH][VTD] fixed a timing issue on DELL calpella laptop while doing graphics pass-through
Date: Mon, 7 Jun 2010 11:58:05 -0400	[thread overview]
Message-ID: <20100607155805.GD8487@phenom.dumpdata.com> (raw)
In-Reply-To: <20100605084010.GA16920@angi.xci-test.com>

On Sat, Jun 05, 2010 at 09:40:10AM +0100, Jean Guyader wrote:
> On Fri, Jun 04, 2010 at 09:30:40PM +0100, Konrad Rzeszutek Wilk wrote:
> > > Yes, to take more time to do an FLR on those platform, but I don't think
> > > this is a proper fix. The fix we have for that in our tree (XCI) is to make
> > > sure the value we write when we restore the pci config space stick in
> > > pciback.
> > > 
> > > I'll send the patch later today,
> > 
> > Please send it to me as well so I can stick in the proper pv-ops tree.
> 
> Thanks Konrad.
> 
> Here is the patch for a 2.6.27 kernel.

I seem to be missing a wealth of previous checkins. There is no 
pciback_reload_config_space in the pciback code that I pulled from
2.6.18.

If you could re-base against Jeremy's PV-OPS kernel and send those
patches that would be tremendously helpful.

Here is a Wiki that explains in detail how to get the PV-OPS kernel and
build it: http://wiki.xensource.com/xenwiki/XenParavirtOps

Much appreciated!
> 
> pciback: Verify write when restoring the pci config space after FLR
> 
> Signed-off-by: Jean Guyader <jean.guyader@eu.citrix.com>

> diff --git a/drivers/xen/pciback/pciback_ops.c b/drivers/xen/pciback/pciback_ops.c
> index 2b77b31..62267e3 100644
> --- a/drivers/xen/pciback/pciback_ops.c
> +++ b/drivers/xen/pciback/pciback_ops.c
> @@ -56,11 +56,20 @@ void pciback_reload_config_space(struct pci_dev *dev)
>  	struct pciback_dev_data *dev_data = pci_get_drvdata(dev);
>  	u32 *ptr = (u32*)dev_data->cfg_space;
>  	int i, val, count = dev->cfg_size/sizeof(u32);
> +        int limit = 0;
>  
>  	for (i = 0; i < count; i += sizeof(u32), ptr++) {
>  		pci_read_config_dword(dev, i, &val);
> -		if (val != *ptr)
> +		while (limit < 1000 && val != *ptr)
> +                {
>  			pci_write_config_dword(dev, i, *ptr);
> +                        pci_read_config_dword(dev, i, &val);
> +                        mdelay(1);
> +                        limit++;
> +                }
> +                if (limit == 1000)
> +                    printk(KERN_ERR "pciback: Error reloading config space after flr dev:%x offset:%x\n",
> +                            dev->devfn, i);
>  	}
>  }
>  

      reply	other threads:[~2010-06-07 15:58 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-06-04  0:22 [PATCH][VTD] fixed a timing issue on DELL calpella laptop while doing graphics pass-through Kay, Allen M
2010-06-04  8:53 ` Jean Guyader
2010-06-04 13:30   ` Kay, Allen M
2010-06-04 20:30   ` Konrad Rzeszutek Wilk
2010-06-05  8:40     ` Jean Guyader
2010-06-07 15:58       ` Konrad Rzeszutek Wilk [this message]

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