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From: Aurelien Jarno <aurelien@aurel32.net>
To: Nathan Froyd <froydnj@codesourcery.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 0/8] target-mips: add microMIPS ASE support, v3
Date: Wed, 9 Jun 2010 16:10:25 +0200	[thread overview]
Message-ID: <20100609141025.GE26968@volta.aurel32.net> (raw)
In-Reply-To: <1276029003-10158-1-git-send-email-froydnj@codesourcery.com>

On Tue, Jun 08, 2010 at 01:29:55PM -0700, Nathan Froyd wrote:
> This patch series adds support for the microMIPS ASE.  microMIPS is a
> new ASE similar to MIPS16, but re-encodes the entire instruction set
> into 16-bit and 32-bit instructions--in contrast to MIPS16, which
> re-encodes only integer instructions.  The mechanisms for going in and
> out of microMIPS mode are identical to those for MIPS16; a given chip
> cannot support both ASEs simultaneously.
> 
> changes from v2:
>   give actual name to FOP constants; assign names to FOPs for c{,abs}
>   fix up coding style violations
>   fix helpers for recent ldl_*/stl_* prototype changes
>   split out mips16-related changes into separate patch
>   group patches more logically
> 
> changes from v1:
>   fix re-introduction of previously deleted code noted by rth
> 
> Nathan Froyd (8):
>   target-mips: define constants for magic numbers
>   target-mips: refactor c{,abs}.cond.fmt insns
>   target-mips: mips16 cleanups
>   target-mips: microMIPS ASE support
>   target-mips: add microMIPS CPUs
>   target-mips: add microMIPS exception handler support
>   linux-user: honor low bit of entry PC for MIPS
>   hw: honor low bit in mipssim machine
> 
>  hw/mips_mipssim.c            |    5 +-
>  linux-user/main.c            |    5 +-
>  target-mips/cpu.h            |    1 +
>  target-mips/helper.c         |   21 +-
>  target-mips/helper.h         |    9 +
>  target-mips/mips-defs.h      |    1 +
>  target-mips/op_helper.c      |  136 ++
>  target-mips/translate.c      | 3015 ++++++++++++++++++++++++++++++++++++++----
>  target-mips/translate_init.c |   61 +
>  9 files changed, 3009 insertions(+), 245 deletions(-)
> 

I have applied all patches except the 5th one, see my comments about it.

I also have applied a complementary patch to the first one, that moves
FP FMT comments to a more appropriate place. It doesn't change any code.

Finally, I have made some comments about the 4th patch, that may be a
basis for future improvements.

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net

  parent reply	other threads:[~2010-06-09 14:10 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-06-08 20:29 [Qemu-devel] [PATCH 0/8] target-mips: add microMIPS ASE support, v3 Nathan Froyd
2010-06-08 20:29 ` [Qemu-devel] [PATCH 1/8] target-mips: define constants for magic numbers Nathan Froyd
2010-06-08 20:29 ` [Qemu-devel] [PATCH 2/8] target-mips: refactor c{, abs}.cond.fmt insns Nathan Froyd
2010-06-08 20:29 ` [Qemu-devel] [PATCH 3/8] target-mips: mips16 cleanups Nathan Froyd
2010-06-08 20:29 ` [Qemu-devel] [PATCH 4/8] target-mips: microMIPS ASE support Nathan Froyd
2010-06-09 14:08   ` Aurelien Jarno
2010-06-08 20:30 ` [Qemu-devel] [PATCH 5/8] target-mips: add microMIPS CPUs Nathan Froyd
2010-06-09 14:02   ` Aurelien Jarno
2010-06-08 20:30 ` [Qemu-devel] [PATCH 6/8] target-mips: add microMIPS exception handler support Nathan Froyd
2010-06-08 20:30 ` [Qemu-devel] [PATCH 7/8] linux-user: honor low bit of entry PC for MIPS Nathan Froyd
2010-06-08 20:30 ` [Qemu-devel] [PATCH 8/8] hw: honor low bit in mipssim machine Nathan Froyd
2010-06-09 14:10 ` Aurelien Jarno [this message]
2010-06-09 15:39   ` [Qemu-devel] [PATCH 0/8] target-mips: add microMIPS ASE support, v3 Nathan Froyd

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