From: Mark Brown <broonie@opensource.wolfsonmicro.com>
To: Seungwhan Youn <sw.youn@samsung.com>
Cc: alsa-devel@alsa-project.org,
Jassi Brar <jassisinghbrar@gmail.com>,
Seungwhan Youn <claude.youn@gmail.com>,
Liam Girdwood <lrg@slimlogic.co.uk>
Subject: Re: [PATCH 2/5] ASoC: S3C64XX: Add ADC source clock setting
Date: Fri, 6 Aug 2010 11:26:19 +0100 [thread overview]
Message-ID: <20100806102619.GC398@rakim.wolfsonmicro.main> (raw)
In-Reply-To: <1281054064-4730-1-git-send-email-sw.youn@samsung.com>
On Fri, Aug 06, 2010 at 09:21:04AM +0900, Seungwhan Youn wrote:
> This patch adds ADC source clock setting to set wm8580 use ADC
> source clock to ADC_MCLK.
>
> Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
> ---
> sound/soc/s3c24xx/smdk64xx_wm8580.c | 6 ++++++
This isn't a patch for S3C64xx, this is a patch for the SMDK boards.
next prev parent reply other threads:[~2010-08-06 10:26 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-08-06 0:13 [PATCH 0/5] ASoC: Fix smdk64xx-wm8580 problems Seungwhan Youn
2010-08-06 0:18 ` [PATCH 1/5] ASoC: wm8580: Add to support ADC clock source setting Seungwhan Youn
2010-08-06 4:27 ` Jassi Brar
2010-08-06 10:19 ` Mark Brown
2010-08-08 1:15 ` Jassi Brar
2010-08-06 0:21 ` [PATCH 2/5] ASoC: S3C64XX: Add ADC source clock setting Seungwhan Youn
2010-08-06 10:26 ` Mark Brown [this message]
2010-08-06 16:28 ` Seungwhan Youn
2010-08-06 16:49 ` Mark Brown
2010-08-06 17:00 ` Seungwhan Youn
2010-08-06 0:26 ` [PATCH 3/5] ASoC: wm8580: Fix Master Mode BCLK rates names Seungwhan Youn
2010-08-06 0:32 ` [PATCH 4/5] ASoC: wm8580: Add to support Master Mode Rates Seungwhan Youn
2010-08-06 4:32 ` Jassi Brar
2010-08-06 5:54 ` Seungwhan Youn
2010-08-06 0:36 ` [PATCH 5/5] ASoC: S3C64XX: Fix to support BCLK, LRCLK rates setting Seungwhan Youn
2010-08-06 4:25 ` Jassi Brar
2010-08-06 6:02 ` Seungwhan Youn
2010-08-06 11:17 ` Mark Brown
2010-08-06 16:26 ` Seungwhan Youn
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