Re: [PATCH v3 2/2] OMAP3: DMA: Errata: sDMA FIFO draining does not finish

[Tony Lindgren <tony@atomide.com>]

* Peter Ujfalusi <peter.ujfalusi@nokia.com> [101001 05:27]:
>
> --- a/arch/arm/plat-omap/dma.c
> +++ b/arch/arm/plat-omap/dma.c
> @@ -1018,8 +1019,39 @@ void omap_stop_dma(int lch)
>  		dma_write(0, CICR(lch));
>  
>  	l = dma_read(CCR(lch));
> -	l &= ~OMAP_DMA_CCR_EN;
> -	dma_write(l, CCR(lch));
> +	/* OMAP3 Errata i541: sDMA FIFO draining does not finish */
> +	if (cpu_is_omap34xx() && (l & OMAP_DMA_CCR_SEL_SRC_DST_SYNC)) {
> +		int i = 0;
> +		u32 sys_cf;
> +
> +		/* Configure No-Standby */
> +		l = dma_read(OCP_SYSCONFIG);
> +		sys_cf = l;
> +		l &= ~DMA_SYSCONFIG_MIDLEMODE_MASK;
> +		l |= DMA_SYSCONFIG_MIDLEMODE(DMA_IDLEMODE_NO_IDLE);
> +		dma_write(l , OCP_SYSCONFIG);
> +
> +		l = dma_read(CCR(lch));
> +		l &= ~OMAP_DMA_CCR_EN;
> +		dma_write(l, CCR(lch));
> +
> +		/* Wait for sDMA FIFO drain */
> +		l = dma_read(CCR(lch));
> +		while (i < 100 && (l & (OMAP_DMA_CCR_RD_ACTIVE |
> +					OMAP_DMA_CCR_WR_ACTIVE))) {
> +			udelay(5);
> +			i++;
> +			l = dma_read(CCR(lch));
> +		}
> +		if (i >= 100)
> +			printk(KERN_ERR "DMA drain did not completed on "
> +					"lch %d\n", lch);
> +		/* Restore OCP_SYSCONFIG */
> +		dma_write(sys_cf, OCP_SYSCONFIG);
> +	} else {
> +		l &= ~OMAP_DMA_CCR_EN;
> +		dma_write(l, CCR(lch));
> +	}
>  
>  	if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
>  		int next_lch, cur_lch = lch;

Thinking about moving to use dmaengine.c, we should not use
cpu_is_omapxxxx except during the platform init.

Can you please change this to be in u32 flags in dma.c that get set during
the init only for omap3? Then we can have something like:

#define OMAP_DMA_ERRATA_AAA	(1 << 2)
#define OMAP_DMA_ERRATA_BBB	(1 << 0)
...

Regards,

Tony