From: Karthik B S <karthik.b.s@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: paulo.r.zanoni@intel.com, michel@daenzer.net,
dri-devel@lists.freedesktop.org, nicholas.kazlauskas@amd.com,
daniel.vetter@intel.com, harry.wentland@amd.com,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v8 4/8] drm/i915: Do not call drm_crtc_arm_vblank_event in async flips
Date: Wed, 16 Sep 2020 18:16:39 +0530 [thread overview]
Message-ID: <20103181-26da-e442-cfc8-5b291e528209@intel.com> (raw)
In-Reply-To: <20200915140719.GK6112@intel.com>
On 9/15/2020 7:37 PM, Ville Syrjälä wrote:
> On Mon, Sep 14, 2020 at 11:26:29AM +0530, Karthik B S wrote:
>> Since the flip done event will be sent in the flip_done_handler,
>> no need to add the event to the list and delay it for later.
>>
>> v2: -Moved the async check above vblank_get as it
>> was causing issues for PSR.
>>
>> v3: -No need to wait for vblank to pass, as this wait was causing a
>> 16ms delay once every few flips.
>>
>> v4: -Rebased.
>>
>> v5: -Rebased.
>>
>> v6: -Rebased.
>>
>> v7: -No need of irq disable if we are not doing vblank evade. (Ville)
>>
>> v8: -Rebased.
>>
>> Signed-off-by: Karthik B S <karthik.b.s@intel.com>
>> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_sprite.c | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
>> index 5ac0dbf0e03d..f0c89418d2e1 100644
>> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
>> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
>> @@ -93,6 +93,9 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
>> DEFINE_WAIT(wait);
>> u32 psr_status;
>>
>> + if (new_crtc_state->uapi.async_flip)
>> + return;
>> +
>> vblank_start = adjusted_mode->crtc_vblank_start;
>> if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
>> vblank_start = DIV_ROUND_UP(vblank_start, 2);
>> @@ -202,6 +205,9 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state)
>>
>> trace_intel_pipe_update_end(crtc, end_vbl_count, scanline_end);
>>
>> + if (new_crtc_state->uapi.async_flip)
>> + return;
>
> The pipe update tracepoints will be inconsistent if you put this here.
> I guess we don't really need the pipe update tracepoints for async
> flips. We might want to add a separate tracepoint for async flip itself,
> or perhaps convey the sync vs. async information via the current
> plane update tracepoint.
>
Thanks for the review.
Sure, I'll move this before the tracepoint.
> With this moved to before the tracepoint
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
Thanks for the RB.
Thanks,
Karthik.B.S
>> +
>> /* We're still in the vblank-evade critical section, this can't race.
>> * Would be slightly nice to just grab the vblank count and arm the
>> * event outside of the critical section - the spinlock might spin for a
>> --
>> 2.22.0
>
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WARNING: multiple messages have this Message-ID (diff)
From: Karthik B S <karthik.b.s@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: paulo.r.zanoni@intel.com, michel@daenzer.net,
dri-devel@lists.freedesktop.org, nicholas.kazlauskas@amd.com,
vandita.kulkarni@intel.com, uma.shankar@intel.com,
daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v8 4/8] drm/i915: Do not call drm_crtc_arm_vblank_event in async flips
Date: Wed, 16 Sep 2020 18:16:39 +0530 [thread overview]
Message-ID: <20103181-26da-e442-cfc8-5b291e528209@intel.com> (raw)
In-Reply-To: <20200915140719.GK6112@intel.com>
On 9/15/2020 7:37 PM, Ville Syrjälä wrote:
> On Mon, Sep 14, 2020 at 11:26:29AM +0530, Karthik B S wrote:
>> Since the flip done event will be sent in the flip_done_handler,
>> no need to add the event to the list and delay it for later.
>>
>> v2: -Moved the async check above vblank_get as it
>> was causing issues for PSR.
>>
>> v3: -No need to wait for vblank to pass, as this wait was causing a
>> 16ms delay once every few flips.
>>
>> v4: -Rebased.
>>
>> v5: -Rebased.
>>
>> v6: -Rebased.
>>
>> v7: -No need of irq disable if we are not doing vblank evade. (Ville)
>>
>> v8: -Rebased.
>>
>> Signed-off-by: Karthik B S <karthik.b.s@intel.com>
>> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_sprite.c | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
>> index 5ac0dbf0e03d..f0c89418d2e1 100644
>> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
>> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
>> @@ -93,6 +93,9 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
>> DEFINE_WAIT(wait);
>> u32 psr_status;
>>
>> + if (new_crtc_state->uapi.async_flip)
>> + return;
>> +
>> vblank_start = adjusted_mode->crtc_vblank_start;
>> if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
>> vblank_start = DIV_ROUND_UP(vblank_start, 2);
>> @@ -202,6 +205,9 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state)
>>
>> trace_intel_pipe_update_end(crtc, end_vbl_count, scanline_end);
>>
>> + if (new_crtc_state->uapi.async_flip)
>> + return;
>
> The pipe update tracepoints will be inconsistent if you put this here.
> I guess we don't really need the pipe update tracepoints for async
> flips. We might want to add a separate tracepoint for async flip itself,
> or perhaps convey the sync vs. async information via the current
> plane update tracepoint.
>
Thanks for the review.
Sure, I'll move this before the tracepoint.
> With this moved to before the tracepoint
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
Thanks for the RB.
Thanks,
Karthik.B.S
>> +
>> /* We're still in the vblank-evade critical section, this can't race.
>> * Would be slightly nice to just grab the vblank count and arm the
>> * event outside of the critical section - the spinlock might spin for a
>> --
>> 2.22.0
>
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dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2020-09-16 12:46 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-14 5:56 [Intel-gfx] [PATCH v8 0/8] Asynchronous flip implementation for i915 Karthik B S
2020-09-14 5:56 ` Karthik B S
2020-09-14 5:56 ` [Intel-gfx] [PATCH v8 1/8] drm/i915: Add enable/disable flip done and flip done handler Karthik B S
2020-09-14 5:56 ` Karthik B S
2020-09-15 13:47 ` [Intel-gfx] " Ville Syrjälä
2020-09-15 13:47 ` Ville Syrjälä
2020-09-16 12:36 ` [Intel-gfx] " Karthik B S
2020-09-16 12:36 ` Karthik B S
2020-09-14 5:56 ` [Intel-gfx] [PATCH v8 2/8] drm/i915: Add support for async flips in I915 Karthik B S
2020-09-14 5:56 ` Karthik B S
2020-09-15 13:48 ` [Intel-gfx] " Ville Syrjälä
2020-09-15 13:48 ` Ville Syrjälä
2020-09-16 12:38 ` [Intel-gfx] " Karthik B S
2020-09-16 12:38 ` Karthik B S
2020-09-14 5:56 ` [Intel-gfx] [PATCH v8 3/8] drm/i915: Add checks specific to async flips Karthik B S
2020-09-14 5:56 ` Karthik B S
2020-09-15 14:03 ` [Intel-gfx] " Ville Syrjälä
2020-09-15 14:03 ` Ville Syrjälä
2020-09-16 12:44 ` [Intel-gfx] " Karthik B S
2020-09-16 12:44 ` Karthik B S
2020-09-14 5:56 ` [Intel-gfx] [PATCH v8 4/8] drm/i915: Do not call drm_crtc_arm_vblank_event in " Karthik B S
2020-09-14 5:56 ` Karthik B S
2020-09-15 14:07 ` [Intel-gfx] " Ville Syrjälä
2020-09-15 14:07 ` Ville Syrjälä
2020-09-16 12:46 ` Karthik B S [this message]
2020-09-16 12:46 ` Karthik B S
2020-09-14 5:56 ` [Intel-gfx] [PATCH v8 5/8] drm/i915: Add dedicated plane hook for async flip case Karthik B S
2020-09-14 5:56 ` Karthik B S
2020-09-15 14:10 ` [Intel-gfx] " Ville Syrjälä
2020-09-15 14:10 ` Ville Syrjälä
2020-09-16 12:48 ` [Intel-gfx] " Karthik B S
2020-09-16 12:48 ` Karthik B S
2020-09-15 14:41 ` [Intel-gfx] " Ville Syrjälä
2020-09-15 14:41 ` Ville Syrjälä
2020-09-16 13:00 ` [Intel-gfx] " Karthik B S
2020-09-16 13:00 ` Karthik B S
2020-09-16 15:52 ` [Intel-gfx] " Karthik B S
2020-09-16 15:52 ` Karthik B S
2020-09-14 5:56 ` [Intel-gfx] [PATCH v8 6/8] drm/i915: WA for platforms with double buffered adress update enable bit Karthik B S
2020-09-14 5:56 ` Karthik B S
2020-09-15 14:19 ` [Intel-gfx] " Ville Syrjälä
2020-09-15 14:19 ` Ville Syrjälä
2020-09-16 12:54 ` [Intel-gfx] " Karthik B S
2020-09-16 12:54 ` Karthik B S
2020-09-14 5:56 ` [Intel-gfx] [PATCH v8 7/8] Documentation/gpu: Add asynchronous flip documentation for i915 Karthik B S
2020-09-14 5:56 ` Karthik B S
2020-09-14 5:56 ` [Intel-gfx] [PATCH v8 8/8] drm/i915: Enable async flips in i915 Karthik B S
2020-09-14 5:56 ` Karthik B S
2020-09-14 11:22 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Asynchronous flip implementation for i915 (rev8) Patchwork
2020-09-14 11:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-09-14 11:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-09-14 13:12 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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