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* [PATCH] x86, UV: Fix APICID shift for westmere processors
@ 2011-01-10 19:52 Jack Steiner
  2011-01-11 12:28 ` [tip:x86/urgent] x86, UV: Fix APICID shift for Westmere processors tip-bot for Jack Steiner
  0 siblings, 1 reply; 2+ messages in thread
From: Jack Steiner @ 2011-01-10 19:52 UTC (permalink / raw)
  To: mingo, tglx, hpa; +Cc: linux-kernel

Westmere processors use a different algorithm for
assigning APICIDs on SGI UV systems. The location of the
node number within the apicid is now a function of the
processor type.

Signed-off-by: Jack Steiner <steiner@sgi.com>

---
 arch/x86/kernel/apic/x2apic_uv_x.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Index: linux/arch/x86/kernel/apic/x2apic_uv_x.c
===================================================================
--- linux.orig/arch/x86/kernel/apic/x2apic_uv_x.c	2010-12-31 10:53:26.878105424 -0600
+++ linux/arch/x86/kernel/apic/x2apic_uv_x.c	2010-12-31 10:54:45.291099878 -0600
@@ -378,7 +378,7 @@ struct apic __refdata apic_x2apic_uv_x =
 
 static __cpuinit void set_x2apic_extra_bits(int pnode)
 {
-	__get_cpu_var(x2apic_extra_bits) = (pnode << 6);
+	__get_cpu_var(x2apic_extra_bits) = (pnode << uvh_apicid.s.pnode_shift);
 }
 
 /*

^ permalink raw reply	[flat|nested] 2+ messages in thread

* [tip:x86/urgent] x86, UV: Fix APICID shift for Westmere processors
  2011-01-10 19:52 [PATCH] x86, UV: Fix APICID shift for westmere processors Jack Steiner
@ 2011-01-11 12:28 ` tip-bot for Jack Steiner
  0 siblings, 0 replies; 2+ messages in thread
From: tip-bot for Jack Steiner @ 2011-01-11 12:28 UTC (permalink / raw)
  To: linux-tip-commits; +Cc: linux-kernel, hpa, mingo, steiner, tglx, mingo

Commit-ID:  990a32d1e54b3c0f7304bec95fb883404589b3f0
Gitweb:     http://git.kernel.org/tip/990a32d1e54b3c0f7304bec95fb883404589b3f0
Author:     Jack Steiner <steiner@sgi.com>
AuthorDate: Mon, 10 Jan 2011 13:52:11 -0600
Committer:  Ingo Molnar <mingo@elte.hu>
CommitDate: Tue, 11 Jan 2011 12:44:45 +0100

x86, UV: Fix APICID shift for Westmere processors

Westmere processors use a different algorithm for
assigning APICIDs on SGI UV systems. The location of the
node number within the apicid is now a function of the
processor type.

Signed-off-by: Jack Steiner <steiner@sgi.com>
LKML-Reference: <20110110195210.GA18737@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---
 arch/x86/kernel/apic/x2apic_uv_x.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 2a3f2a7..f4f9e95 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -378,7 +378,7 @@ struct apic __refdata apic_x2apic_uv_x = {
 
 static __cpuinit void set_x2apic_extra_bits(int pnode)
 {
-	__get_cpu_var(x2apic_extra_bits) = (pnode << 6);
+	__get_cpu_var(x2apic_extra_bits) = (pnode << uvh_apicid.s.pnode_shift);
 }
 
 /*

^ permalink raw reply related	[flat|nested] 2+ messages in thread

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2011-01-10 19:52 [PATCH] x86, UV: Fix APICID shift for westmere processors Jack Steiner
2011-01-11 12:28 ` [tip:x86/urgent] x86, UV: Fix APICID shift for Westmere processors tip-bot for Jack Steiner

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