From: Aurelien Jarno <aurelien@aurel32.net>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Christophe Lyon <christophe.lyon@st.com>,
qemu-devel@nongnu.org, patches@linaro.org
Subject: Re: [Qemu-devel] [PATCH v2 2/6] softfloat: Honour default_nan_mode for float-to-float conversions
Date: Wed, 9 Feb 2011 19:40:46 +0100 [thread overview]
Message-ID: <20110209184046.GC3131@volta.aurel32.net> (raw)
In-Reply-To: <1297268850-5777-3-git-send-email-peter.maydell@linaro.org>
On Wed, Feb 09, 2011 at 04:27:26PM +0000, Peter Maydell wrote:
> From: Christophe Lyon <christophe.lyon@st.com>
>
> Honour the default_nan_mode flag when doing conversions between
> different floating point formats, as well as when returning a NaN from
> a two-operand floating point function. This corrects the behaviour
> of float<->double conversions on both ARM and SH4.
>
> Signed-off-by: Christophe Lyon <christophe.lyon@st.com>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> fpu/softfloat-specialize.h | 29 +++++++++++++++++++++++++----
> fpu/softfloat.c | 24 ++++++++++++------------
> 2 files changed, 37 insertions(+), 16 deletions(-)
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
> diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
> index bc9a66c..2f65b9d 100644
> --- a/fpu/softfloat-specialize.h
> +++ b/fpu/softfloat-specialize.h
> @@ -203,9 +203,14 @@ static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM )
> | precision floating-point format.
> *----------------------------------------------------------------------------*/
>
> -static float32 commonNaNToFloat32( commonNaNT a )
> +static float32 commonNaNToFloat32( commonNaNT a STATUS_PARAM)
> {
> bits32 mantissa = a.high>>41;
> +
> + if ( STATUS(default_nan_mode) ) {
> + return float32_default_nan;
> + }
> +
> if ( mantissa )
> return make_float32(
> ( ( (bits32) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
> @@ -457,10 +462,14 @@ static commonNaNT float64ToCommonNaN( float64 a STATUS_PARAM)
> | precision floating-point format.
> *----------------------------------------------------------------------------*/
>
> -static float64 commonNaNToFloat64( commonNaNT a )
> +static float64 commonNaNToFloat64( commonNaNT a STATUS_PARAM)
> {
> bits64 mantissa = a.high>>12;
>
> + if ( STATUS(default_nan_mode) ) {
> + return float64_default_nan;
> + }
> +
> if ( mantissa )
> return make_float64(
> ( ( (bits64) a.sign )<<63 )
> @@ -614,10 +623,16 @@ static commonNaNT floatx80ToCommonNaN( floatx80 a STATUS_PARAM)
> | double-precision floating-point format.
> *----------------------------------------------------------------------------*/
>
> -static floatx80 commonNaNToFloatx80( commonNaNT a )
> +static floatx80 commonNaNToFloatx80( commonNaNT a STATUS_PARAM)
> {
> floatx80 z;
>
> + if ( STATUS(default_nan_mode) ) {
> + z.low = floatx80_default_nan_low;
> + z.high = floatx80_default_nan_high;
> + return z;
> + }
> +
> if (a.high)
> z.low = a.high;
> else
> @@ -762,10 +777,16 @@ static commonNaNT float128ToCommonNaN( float128 a STATUS_PARAM)
> | precision floating-point format.
> *----------------------------------------------------------------------------*/
>
> -static float128 commonNaNToFloat128( commonNaNT a )
> +static float128 commonNaNToFloat128( commonNaNT a STATUS_PARAM)
> {
> float128 z;
>
> + if ( STATUS(default_nan_mode) ) {
> + z.low = float128_default_nan_low;
> + z.high = float128_default_nan_high;
> + return z;
> + }
> +
> shift128Right( a.high, a.low, 16, &z.high, &z.low );
> z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 );
> return z;
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index dc4492a..c3058f4 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -1534,7 +1534,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM )
> aExp = extractFloat32Exp( a );
> aSign = extractFloat32Sign( a );
> if ( aExp == 0xFF ) {
> - if ( aSig ) return commonNaNToFloat64( float32ToCommonNaN( a STATUS_VAR ));
> + if ( aSig ) return commonNaNToFloat64( float32ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
> return packFloat64( aSign, 0x7FF, 0 );
> }
> if ( aExp == 0 ) {
> @@ -1566,7 +1566,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM )
> aExp = extractFloat32Exp( a );
> aSign = extractFloat32Sign( a );
> if ( aExp == 0xFF ) {
> - if ( aSig ) return commonNaNToFloatx80( float32ToCommonNaN( a STATUS_VAR ) );
> + if ( aSig ) return commonNaNToFloatx80( float32ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
> return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
> }
> if ( aExp == 0 ) {
> @@ -1600,7 +1600,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM )
> aExp = extractFloat32Exp( a );
> aSign = extractFloat32Sign( a );
> if ( aExp == 0xFF ) {
> - if ( aSig ) return commonNaNToFloat128( float32ToCommonNaN( a STATUS_VAR ) );
> + if ( aSig ) return commonNaNToFloat128( float32ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
> return packFloat128( aSign, 0x7FFF, 0, 0 );
> }
> if ( aExp == 0 ) {
> @@ -2689,7 +2689,7 @@ float32 float64_to_float32( float64 a STATUS_PARAM )
> aExp = extractFloat64Exp( a );
> aSign = extractFloat64Sign( a );
> if ( aExp == 0x7FF ) {
> - if ( aSig ) return commonNaNToFloat32( float64ToCommonNaN( a STATUS_VAR ) );
> + if ( aSig ) return commonNaNToFloat32( float64ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
> return packFloat32( aSign, 0xFF, 0 );
> }
> shift64RightJamming( aSig, 22, &aSig );
> @@ -2861,7 +2861,7 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARAM )
> aExp = extractFloat64Exp( a );
> aSign = extractFloat64Sign( a );
> if ( aExp == 0x7FF ) {
> - if ( aSig ) return commonNaNToFloatx80( float64ToCommonNaN( a STATUS_VAR ) );
> + if ( aSig ) return commonNaNToFloatx80( float64ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
> return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
> }
> if ( aExp == 0 ) {
> @@ -2896,7 +2896,7 @@ float128 float64_to_float128( float64 a STATUS_PARAM )
> aExp = extractFloat64Exp( a );
> aSign = extractFloat64Sign( a );
> if ( aExp == 0x7FF ) {
> - if ( aSig ) return commonNaNToFloat128( float64ToCommonNaN( a STATUS_VAR ) );
> + if ( aSig ) return commonNaNToFloat128( float64ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
> return packFloat128( aSign, 0x7FFF, 0, 0 );
> }
> if ( aExp == 0 ) {
> @@ -3843,7 +3843,7 @@ float32 floatx80_to_float32( floatx80 a STATUS_PARAM )
> aSign = extractFloatx80Sign( a );
> if ( aExp == 0x7FFF ) {
> if ( (bits64) ( aSig<<1 ) ) {
> - return commonNaNToFloat32( floatx80ToCommonNaN( a STATUS_VAR ) );
> + return commonNaNToFloat32( floatx80ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
> }
> return packFloat32( aSign, 0xFF, 0 );
> }
> @@ -3871,7 +3871,7 @@ float64 floatx80_to_float64( floatx80 a STATUS_PARAM )
> aSign = extractFloatx80Sign( a );
> if ( aExp == 0x7FFF ) {
> if ( (bits64) ( aSig<<1 ) ) {
> - return commonNaNToFloat64( floatx80ToCommonNaN( a STATUS_VAR ) );
> + return commonNaNToFloat64( floatx80ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
> }
> return packFloat64( aSign, 0x7FF, 0 );
> }
> @@ -3900,7 +3900,7 @@ float128 floatx80_to_float128( floatx80 a STATUS_PARAM )
> aExp = extractFloatx80Exp( a );
> aSign = extractFloatx80Sign( a );
> if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) {
> - return commonNaNToFloat128( floatx80ToCommonNaN( a STATUS_VAR ) );
> + return commonNaNToFloat128( floatx80ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
> }
> shift128Right( aSig<<1, 0, 16, &zSig0, &zSig1 );
> return packFloat128( aSign, aExp, zSig0, zSig1 );
> @@ -4863,7 +4863,7 @@ float32 float128_to_float32( float128 a STATUS_PARAM )
> aSign = extractFloat128Sign( a );
> if ( aExp == 0x7FFF ) {
> if ( aSig0 | aSig1 ) {
> - return commonNaNToFloat32( float128ToCommonNaN( a STATUS_VAR ) );
> + return commonNaNToFloat32( float128ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
> }
> return packFloat32( aSign, 0xFF, 0 );
> }
> @@ -4897,7 +4897,7 @@ float64 float128_to_float64( float128 a STATUS_PARAM )
> aSign = extractFloat128Sign( a );
> if ( aExp == 0x7FFF ) {
> if ( aSig0 | aSig1 ) {
> - return commonNaNToFloat64( float128ToCommonNaN( a STATUS_VAR ) );
> + return commonNaNToFloat64( float128ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
> }
> return packFloat64( aSign, 0x7FF, 0 );
> }
> @@ -4932,7 +4932,7 @@ floatx80 float128_to_floatx80( float128 a STATUS_PARAM )
> aSign = extractFloat128Sign( a );
> if ( aExp == 0x7FFF ) {
> if ( aSig0 | aSig1 ) {
> - return commonNaNToFloatx80( float128ToCommonNaN( a STATUS_VAR ) );
> + return commonNaNToFloatx80( float128ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
> }
> return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
> }
> --
> 1.7.1
>
>
>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
next prev parent reply other threads:[~2011-02-09 18:40 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-02-09 16:27 [Qemu-devel] [PATCH v2 0/6] target-arm: Fix floating point conversions Peter Maydell
2011-02-09 16:27 ` [Qemu-devel] [PATCH v2 1/6] softfloat: Add float16 type and float16 NaN handling functions Peter Maydell
2011-02-09 18:40 ` Aurelien Jarno
2011-02-09 19:25 ` Peter Maydell
2011-02-09 16:27 ` [Qemu-devel] [PATCH v2 2/6] softfloat: Honour default_nan_mode for float-to-float conversions Peter Maydell
2011-02-09 18:40 ` Aurelien Jarno [this message]
2011-02-09 16:27 ` [Qemu-devel] [PATCH v2 3/6] softfloat: Fix single-to-half precision float conversions Peter Maydell
2011-02-09 18:41 ` Aurelien Jarno
2011-02-09 16:27 ` [Qemu-devel] [PATCH v2 4/6] softfloat: Correctly handle NaNs in float16_to_float32() Peter Maydell
2011-02-09 18:42 ` Aurelien Jarno
2011-02-09 16:27 ` [Qemu-devel] [PATCH v2 5/6] target-arm: Silence NaNs resulting from half-precision conversions Peter Maydell
2011-02-09 18:42 ` Aurelien Jarno
2011-02-09 16:27 ` [Qemu-devel] [PATCH v2 6/6] target-arm: Use standard FPSCR for Neon half-precision operations Peter Maydell
2011-02-09 18:43 ` Aurelien Jarno
2011-02-09 19:03 ` Peter Maydell
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