[PATCH] staging/et131x: fix et131x_rx_dma_disable halt_status usage

[Marcin Slusarz <marcin.slusarz@gmail.com>]

Commit 1bd751c1abc1029e8a0ae63ef4f19357c735a2a3
("Staging: et131x: Clean up rxdma_csr") changed csr from bitfield to
u32, but failed to convert 2 uses of halt_status bit. It did:

- if (csr.bits.halt_status != 1)
+ if ((csr & 0x00020000) != 1)

which is wrong, because second version is always true.
Fix it.

This bug was found by coccinelle (http://coccinelle.lip6.fr/).

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Cc: Alan Cox <alan@linux.intel.com>
Cc: Greg Kroah-Hartman <gregkh@suse.de>
---
 drivers/staging/et131x/et1310_rx.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/et131x/et1310_rx.c b/drivers/staging/et131x/et1310_rx.c
index 8e04bdd..a414830 100644
--- a/drivers/staging/et131x/et1310_rx.c
+++ b/drivers/staging/et131x/et1310_rx.c
@@ -717,10 +717,10 @@ void et131x_rx_dma_disable(struct et131x_adapter *etdev)
 	/* Setup the receive dma configuration register */
 	writel(0x00002001, &etdev->regs->rxdma.csr);
 	csr = readl(&etdev->regs->rxdma.csr);
-	if ((csr & 0x00020000) != 1) {	/* Check halt status (bit 17) */
+	if ((csr & 0x00020000) == 0) {	/* Check halt status (bit 17) */
 		udelay(5);
 		csr = readl(&etdev->regs->rxdma.csr);
-		if ((csr & 0x00020000) != 1)
+		if ((csr & 0x00020000) == 0)
 			dev_err(&etdev->pdev->dev,
 			"RX Dma failed to enter halt state. CSR 0x%08x\n",
 				csr);
-- 
1.7.4.rc3