From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 8/8] drm/i915: only save/restore VGA clock regs for non-KMS case
Date: Mon, 21 Mar 2011 10:49:04 -0700 [thread overview]
Message-ID: <20110321104904.261a7ed2@jbarnes-desktop> (raw)
In-Reply-To: <849307$c2sdhr@azsmga001.ch.intel.com>
On Mon, 21 Mar 2011 09:49:23 +0000
Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Mon, 21 Mar 2011 17:27:19 +0800, Zhenyu Wang <zhenyuw@linux.intel.com> wrote:
> > For KMS we want to disable VGA anyway, do so by using correct setting
> > order in i915_disable_vga().
>
> Whilst we are here... Can anybody explain the distinction between those
> VGA registers and i915_save_vga()? Might this be a good point to merge
> those code blocks and add some comments?
And/or just move this block into the modeset_regs function, since it
already checks for modesetting.
Not sure if the divisor regs are aliases for the CRTC regs or not; the
VGA plane control reg is definitely separate though.
--
Jesse Barnes, Intel Open Source Technology Center
prev parent reply other threads:[~2011-03-21 17:49 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-21 9:27 [PATCH 0/8] Patches for Sandybridge suspend/resume fixes Zhenyu Wang
2011-03-21 9:27 ` [PATCH 1/8] drm/i915: clock gating fix for gen5 and gen6 Zhenyu Wang
2011-03-21 9:27 ` [PATCH 2/8] drm/i915: remove LBB config save/restore Zhenyu Wang
2011-03-21 17:36 ` Jesse Barnes
2011-03-22 1:29 ` Zhenyu Wang
2011-03-22 1:39 ` Jesse Barnes
2011-03-21 9:27 ` [PATCH 3/8] drm/i915: save/restore DSPARB only for chip before gen4 Zhenyu Wang
2011-03-21 17:39 ` Jesse Barnes
2011-03-22 1:44 ` Zhenyu Wang
2011-03-21 9:27 ` [PATCH 4/8] drm/i915: remove CACHE_MODE_0 save/restore Zhenyu Wang
2011-03-21 9:44 ` Chris Wilson
2011-03-21 17:40 ` Jesse Barnes
2011-03-22 1:20 ` Zhenyu Wang
2011-03-21 9:27 ` [PATCH 5/8] drm/i915: save/restore MI_ARB_STATE only for gen3 Zhenyu Wang
2011-03-21 17:43 ` Jesse Barnes
2011-03-21 9:27 ` [PATCH 6/8] drm/i915: change force wake order for GT read Zhenyu Wang
2011-03-21 9:46 ` Chris Wilson
2011-03-22 1:27 ` Zhenyu Wang
2011-03-22 7:25 ` Chris Wilson
2011-03-21 9:27 ` [PATCH 7/8] drm/i915: move sandybridge RC6 enable in resume after ring initialization Zhenyu Wang
2011-03-21 17:46 ` Jesse Barnes
2011-03-22 1:48 ` Zhenyu Wang
2011-03-21 9:27 ` [PATCH 8/8] drm/i915: only save/restore VGA clock regs for non-KMS case Zhenyu Wang
2011-03-21 9:49 ` Chris Wilson
2011-03-21 17:49 ` Jesse Barnes [this message]
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