From: Chris Wilson <chris@chris-wilson.co.uk>
To: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 6/8] drm/i915: change force wake order for GT read
Date: Tue, 22 Mar 2011 07:25:02 +0000 [thread overview]
Message-ID: <849307$c3dlsf@azsmga001.ch.intel.com> (raw)
In-Reply-To: <20110322012751.GI27541@zhen-devel.sh.intel.com>
On Tue, 22 Mar 2011 09:27:51 +0800, Zhenyu Wang <zhenyuw@linux.intel.com> wrote:
> Just mean to follow the doc, it matches the sequence of RC6 enabling steps
> from GT PM programming doc, not sure if it's strictly required.
But as you point out, the docs do also outline the current method as well.
;-)
Meanwhile a better solution for _gen6_gt_wait_for_fifo() is desperately
sought. It is the new clflush. [Ok, most of that could be mitigated by
improving the ddx...]
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
next prev parent reply other threads:[~2011-03-22 7:25 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-21 9:27 [PATCH 0/8] Patches for Sandybridge suspend/resume fixes Zhenyu Wang
2011-03-21 9:27 ` [PATCH 1/8] drm/i915: clock gating fix for gen5 and gen6 Zhenyu Wang
2011-03-21 9:27 ` [PATCH 2/8] drm/i915: remove LBB config save/restore Zhenyu Wang
2011-03-21 17:36 ` Jesse Barnes
2011-03-22 1:29 ` Zhenyu Wang
2011-03-22 1:39 ` Jesse Barnes
2011-03-21 9:27 ` [PATCH 3/8] drm/i915: save/restore DSPARB only for chip before gen4 Zhenyu Wang
2011-03-21 17:39 ` Jesse Barnes
2011-03-22 1:44 ` Zhenyu Wang
2011-03-21 9:27 ` [PATCH 4/8] drm/i915: remove CACHE_MODE_0 save/restore Zhenyu Wang
2011-03-21 9:44 ` Chris Wilson
2011-03-21 17:40 ` Jesse Barnes
2011-03-22 1:20 ` Zhenyu Wang
2011-03-21 9:27 ` [PATCH 5/8] drm/i915: save/restore MI_ARB_STATE only for gen3 Zhenyu Wang
2011-03-21 17:43 ` Jesse Barnes
2011-03-21 9:27 ` [PATCH 6/8] drm/i915: change force wake order for GT read Zhenyu Wang
2011-03-21 9:46 ` Chris Wilson
2011-03-22 1:27 ` Zhenyu Wang
2011-03-22 7:25 ` Chris Wilson [this message]
2011-03-21 9:27 ` [PATCH 7/8] drm/i915: move sandybridge RC6 enable in resume after ring initialization Zhenyu Wang
2011-03-21 17:46 ` Jesse Barnes
2011-03-22 1:48 ` Zhenyu Wang
2011-03-21 9:27 ` [PATCH 8/8] drm/i915: only save/restore VGA clock regs for non-KMS case Zhenyu Wang
2011-03-21 9:49 ` Chris Wilson
2011-03-21 17:49 ` Jesse Barnes
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