* [ath9k-devel] Zero write to AR_WA on ar9300 reset.
@ 2011-03-30 4:18 Alex Hacker
2011-03-30 7:10 ` Mohammed Shafi
0 siblings, 1 reply; 3+ messages in thread
From: Alex Hacker @ 2011-03-30 4:18 UTC (permalink / raw)
To: ath9k-devel
I'd found that the WARegVal field of ath_hw structre which are used to avoid
reading the AR_WA reg while chip asleep is used before initialization in
ath9k_set_reset_reg(). So that on ar9300 the AR_WA reg is zero written when the
ath9k_set_reset_reg() is first called from __ath9k_hw_init(). The WARegVal
is read back later, bits 14 and 17 are set. So this variable do not hold
initial AR_WA reg value but just bits 14 and 17. I do not know the required
behaviour but it looks like mistake.
^ permalink raw reply [flat|nested] 3+ messages in thread
* [ath9k-devel] Zero write to AR_WA on ar9300 reset.
2011-03-30 4:18 [ath9k-devel] Zero write to AR_WA on ar9300 reset Alex Hacker
@ 2011-03-30 7:10 ` Mohammed Shafi
2011-03-30 14:14 ` Alex Hacker
0 siblings, 1 reply; 3+ messages in thread
From: Mohammed Shafi @ 2011-03-30 7:10 UTC (permalink / raw)
To: ath9k-devel
On Wed, Mar 30, 2011 at 9:48 AM, Alex Hacker <hacker@epn.ru> wrote:
> I'd found that the WARegVal field of ath_hw structre which are used to avoid
> reading the AR_WA reg while chip asleep is used before initialization in
> ath9k_set_reset_reg(). So that on ar9300 the AR_WA reg is zero written when the
> ath9k_set_reset_reg() is first called from __ath9k_hw_init(). The WARegVal
> is read back later, bits 14 and 17 are set. So this variable do not hold
> initial AR_WA reg value but just bits 14 and 17. I do not know the required
> behaviour but it looks like mistake.
This commit may be of some help. please read the full code change in
the commit, the comments will be helpful.
ommit 9a658d2b5c222b62919ab47b11c907c731ac180a
Author: Luis R. Rodriguez <lrodriguez@atheros.com>
Date: Mon Jun 21 18:38:47 2010 -0400
ath9k_hw: fix ASPM setting for AR9003
The AR_WA register should not be read when in sleep state so
add a variable we can stash its value into for when we need
to set it. Additionally the AR_WA_D3_TO_L1_DISABLE_REAL
(bit 16) needs to be removed.
Cc: Aeolus Yang <aeolus.yang@atheros.com>
Cc: Madhan Jaganathan <madhan.jaganathan@atheros.com>
signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
> _______________________________________________
> ath9k-devel mailing list
> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2011-03-30 4:18 [ath9k-devel] Zero write to AR_WA on ar9300 reset Alex Hacker
2011-03-30 7:10 ` Mohammed Shafi
2011-03-30 14:14 ` Alex Hacker
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