[PATCH V2 0/2] Add WM8994 PCM Machine driver for Exynos4210

[PATCH V2 0/2] Add WM8994 PCM Machine driver for Exynos4210

[Sangbeom Kim]

Hi,

This is 2nd patchset for WM8994 pcm machine driver that supports
PCM audio on SMDKV310, SMDKC210 and test is done.

This is minor change version.
AS jassi comment, I added new pcm structure for quirk handling.
And added Liam's acked.

Based on these patches WM8994 pcm machine driver supports followings:
 o Playback supports 8kHz sampling rates.
 o Capture supports 8kHz sampling rates.

This patchset contains followings 

 o To Kukjin Kim and Ben Dooks,
[PATCH 1/2] ARM: EXYNOS4: Add PCM audio support for WM8994

 o To Jassi Brar, Mark Brown and Liam Girdwood,
[PATCH 2/2] ASoC: SAMSUNG: Add WM8580 PCM Machine driver 

Best Regards,
SB Kim (Sangbeom Kim)

[PATCH V2 1/2] ARM: EXYNOS4: Add PCM audio support for WM8994

[Sangbeom Kim]

This patch add pcm audio configuration for SMDKV310 and SMDKC210.
Platform device and pcm clock initialization code is added.

Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Acked-by: Liam Girdwood <lrg@ti.com>
---
 arch/arm/mach-exynos4/clock.c                   |  169 ++++++++++++++++++++++-
 arch/arm/mach-exynos4/cpu.c                     |    5 +
 arch/arm/mach-exynos4/dev-audio.c               |    5 +
 arch/arm/mach-exynos4/include/mach/map.h        |    3 +
 arch/arm/mach-exynos4/include/mach/regs-audss.h |   25 ++++
 arch/arm/mach-exynos4/mach-smdkc210.c           |    7 +
 arch/arm/mach-exynos4/mach-smdkv310.c           |    7 +
 arch/arm/plat-samsung/include/plat/audio.h      |    8 +
 8 files changed, 227 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/mach-exynos4/include/mach/regs-audss.h

diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index 871f9d5..77cd81f 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -23,6 +23,7 @@
 
 #include <mach/map.h>
 #include <mach/regs-clock.h>
+#include <mach/regs-audss.h>
 #include <mach/sysmmu.h>
 
 static struct clk clk_sclk_hdmi27m = {
@@ -47,6 +48,31 @@ static struct clk clk_sclk_usbphy1 = {
 	.id		= -1,
 };
 
+static struct clk clk_sclk_xxti = {
+	.name		= "sclk_usbphy1",
+	.id		= -1,
+};
+
+static struct clk clk_sclk_xusbxti = {
+	.name		= "sclk_usbphy1",
+	.id		= -1,
+};
+
+static struct clk clk_audiocdclk0 = {
+	.name		= "audiocdclk",
+	.id		= 0,
+};
+
+static struct clk clk_audiocdclk1 = {
+	.name		= "audiocdclk",
+	.id		= 1,
+};
+
+static struct clk clk_audiocdclk2 = {
+	.name		= "audiocdclk",
+	.id		= 2,
+};
+
 static int exynos4_clksrc_mask_top_ctrl(struct clk *clk, int enable)
 {
 	return s5p_gatectrl(S5P_CLKSRC_MASK_TOP, clk, enable);
@@ -127,6 +153,16 @@ static int exynos4_clk_ip_perir_ctrl(struct clk *clk, int enable)
 	return s5p_gatectrl(S5P_CLKGATE_IP_PERIR, clk, enable);
 }
 
+static int exynos4_clksrc_mask_maudio_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLKSRC_MASK_MAUDIO, clk, enable);
+}
+
+static int exynos4_clk_audss_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLKGATE_AUDSS, clk, enable);
+}
+
 /* Core list of CMU_CPU side */
 
 static struct clksrc_clk clk_mout_apll = {
@@ -561,6 +597,21 @@ static struct clk init_clocks_off[] = {
 		.enable		= exynos4_clk_ip_peril_ctrl,
 		.ctrlbit	= (1 << 27),
 	}, {
+		.name		= "pcm",
+		.id		= 0,
+		.enable		= exynos4_clk_audss_ctrl,
+		.ctrlbit	= S5P_AUDSS_CLKGATE_PCMSPECIAL,
+	}, {
+		.name		= "pcm",
+		.id		= 1,
+		.enable		= exynos4_clk_ip_peril_ctrl,
+		.ctrlbit	= (1 << 22),
+	}, {
+		.name		= "pcm",
+		.id		= 2,
+		.enable		= exynos4_clk_ip_peril_ctrl,
+		.ctrlbit	= (1 << 23),
+        }, {
 		.name		= "fimg2d",
 		.id		= -1,
 		.enable		= exynos4_clk_ip_image_ctrl,
@@ -686,6 +737,93 @@ static struct clk init_clocks_off[] = {
 	}
 };
 
+static struct clk *clkset_sclk_audio0_list[] = {
+	[0] = &clk_audiocdclk0,
+	[1] = NULL,
+	[2] = &clk_sclk_hdmi27m,
+	[3] = &clk_sclk_usbphy0,
+	[4] = &clk_sclk_xxti,
+	[5] = &clk_sclk_xusbxti,
+	[6] = &clk_mout_mpll.clk,
+	[7] = &clk_mout_epll.clk,
+	[8] = &clk_sclk_vpll.clk,
+};
+
+static struct clksrc_sources clkset_sclk_audio0 = {
+	.sources	= clkset_sclk_audio0_list,
+	.nr_sources	= ARRAY_SIZE(clkset_sclk_audio0_list),
+};
+
+static struct clksrc_clk clk_sclk_audio0 = {
+	.clk	= {
+		.name		= "audio-bus",
+		.id		= 0,
+		.enable		= exynos4_clksrc_mask_maudio_ctrl,
+		.ctrlbit	= (1 << 0),
+	},
+	.sources = &clkset_sclk_audio0,
+	.reg_src = { .reg = S5P_CLKSRC_MAUDIO, .shift = 0, .size = 4 },
+	.reg_div = { .reg = S5P_CLKDIV_MAUDIO, .shift = 0, .size = 4 },
+};
+
+static struct clk *clkset_sclk_audio1_list[] = {
+	[0] = &clk_audiocdclk1,
+	[1] = NULL,
+	[2] = &clk_sclk_hdmi27m,
+	[3] = &clk_sclk_usbphy0,
+	[4] = &clk_sclk_xxti,
+	[5] = &clk_sclk_xusbxti,
+	[6] = &clk_mout_mpll.clk,
+	[7] = &clk_mout_epll.clk,
+	[8] = &clk_sclk_vpll.clk,
+};
+
+static struct clksrc_sources clkset_sclk_audio1 = {
+	.sources	= clkset_sclk_audio1_list,
+	.nr_sources	= ARRAY_SIZE(clkset_sclk_audio1_list),
+};
+
+static struct clksrc_clk clk_sclk_audio1 = {
+	.clk	= {
+		.name		= "audio-bus",
+		.id		= 1,
+		.enable		= exynos4_clksrc_mask_peril1_ctrl,
+		.ctrlbit	= (1 << 0),
+        },
+	.sources = &clkset_sclk_audio1,
+	.reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 0, .size = 4 },
+	.reg_div = { .reg = S5P_CLKDIV_PERIL4, .shift = 4, .size = 8 },
+};
+
+static struct clk *clkset_sclk_audio2_list[] = {
+	[0] = &clk_audiocdclk2,
+	[1] = NULL,
+	[2] = &clk_sclk_hdmi27m,
+	[3] = &clk_sclk_usbphy0,
+	[4] = &clk_sclk_xxti,
+	[5] = &clk_sclk_xusbxti,
+	[6] = &clk_mout_mpll.clk,
+	[7] = &clk_mout_epll.clk,
+	[8] = &clk_sclk_vpll.clk,
+};
+
+static struct clksrc_sources clkset_sclk_audio2 = {
+	.sources        = clkset_sclk_audio2_list,
+	.nr_sources     = ARRAY_SIZE(clkset_sclk_audio2_list),
+};
+
+static struct clksrc_clk clk_sclk_audio2 = {
+	.clk	= {
+		.name		= "audio-bus",
+		.id		= 2,
+		.enable		= exynos4_clksrc_mask_peril1_ctrl,
+		.ctrlbit	= (1 << 4),
+	},
+	.sources = &clkset_sclk_audio2,
+	.reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 4, .size = 4 },
+	.reg_div = { .reg = S5P_CLKDIV_PERIL4, .shift = 16, .size = 4 },
+};
+
 static struct clk init_clocks[] = {
 	{
 		.name		= "uart",
@@ -1079,7 +1217,28 @@ static struct clksrc_clk clksrcs[] = {
 			.ctrlbit	= (1 << 16),
 		},
 		.reg_div = { .reg = S5P_CLKDIV_FSYS3, .shift = 8, .size = 8 },
-	}
+	}, {
+		.clk		= {
+			.name		= "sclk_pcm",
+			.id		= 0,
+			.parent		= &clk_sclk_audio0.clk,
+                },
+                .reg_div = { .reg = S5P_CLKDIV_MAUDIO, .shift = 4, .size = 8 },
+        }, {
+                .clk            = {
+                        .name           = "sclk_pcm",
+                        .id             = 1,
+                        .parent         = &clk_sclk_audio1.clk,
+                },
+                .reg_div = { .reg = S5P_CLKDIV_PERIL4, .shift = 4, .size = 8 },
+        }, {
+                .clk            = {
+                        .name           = "sclk_pcm",
+                        .id             = 2,
+                        .parent         = &clk_sclk_audio2.clk,
+                },
+                .reg_div = { .reg = S5P_CLKDIV_PERIL4, .shift = 20, .size = 8 },
+        },
 };
 
 /* Clock initialization code */
@@ -1112,6 +1271,9 @@ static struct clksrc_clk *sysclks[] = {
 	&clk_dout_mmc2,
 	&clk_dout_mmc3,
 	&clk_dout_mmc4,
+	&clk_sclk_audio0,
+	&clk_sclk_audio1,
+	&clk_sclk_audio2,
 };
 
 static int xtal_rate;
@@ -1191,10 +1353,13 @@ void __init_or_cpufreq exynos4_setup_clocks(void)
 
 	for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
 		s3c_set_clksrc(&clksrcs[ptr], true);
+
+	clk_audiocdclk0.rate = PCM_EXTCLK0;
+	clk_set_parent(&clk_sclk_audio0.clk, &clk_audiocdclk0);
 }
 
 static struct clk *clks[] __initdata = {
-	/* Nothing here yet */
+	&clk_audiocdclk0,
 };
 
 void __init exynos4_register_clocks(void)
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 7930113..620b41f 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -97,6 +97,11 @@ static struct map_desc exynos4_iodesc[] __initdata = {
 		.pfn		= __phys_to_pfn(EXYNOS4_PA_SROMC),
 		.length		= SZ_4K,
 		.type		= MT_DEVICE,
+	}, {
+		.virtual	= (unsigned long)S5P_VA_AUDSS,
+		.pfn		= __phys_to_pfn(EXYNOS4_PA_AUDSS),
+		.length		= SZ_1K,
+		.type		= MT_DEVICE,
 	},
 };
 
diff --git a/arch/arm/mach-exynos4/dev-audio.c b/arch/arm/mach-exynos4/dev-audio.c
index 1eed5f9..6347594 100644
--- a/arch/arm/mach-exynos4/dev-audio.c
+++ b/arch/arm/mach-exynos4/dev-audio.c
@@ -187,6 +187,11 @@ static int exynos4_pcm_cfg_gpio(struct platform_device *pdev)
 
 static struct s3c_audio_pdata s3c_pcm_pdata = {
 	.cfg_gpio = exynos4_pcm_cfg_gpio,
+	.type = {
+		.pcm = {
+			.quirks = QUIRK_NO_DIV,
+		},
+	},
 };
 
 static struct resource exynos4_pcm0_resource[] = {
diff --git a/arch/arm/mach-exynos4/include/mach/map.h b/arch/arm/mach-exynos4/include/mach/map.h
index 6330b73..063854e 100644
--- a/arch/arm/mach-exynos4/include/mach/map.h
+++ b/arch/arm/mach-exynos4/include/mach/map.h
@@ -30,6 +30,8 @@
 #define EXYNOS4_PA_FIMC2		0x11820000
 #define EXYNOS4_PA_FIMC3		0x11830000
 
+#define EXYNOS4_PA_AUDSS		0x03810000
+
 #define EXYNOS4_PA_I2S0			0x03830000
 #define EXYNOS4_PA_I2S1			0xE3100000
 #define EXYNOS4_PA_I2S2			0xE2A00000
@@ -143,6 +145,7 @@
 #define S5P_PA_SROMC			EXYNOS4_PA_SROMC
 #define S5P_PA_SYSCON			EXYNOS4_PA_SYSCON
 #define S5P_PA_TIMER			EXYNOS4_PA_TIMER
+#define S5P_PA_AUDSS			EXYNOS4_PA_AUDSS
 
 #define SAMSUNG_PA_KEYPAD		EXYNOS4_PA_KEYPAD
 
diff --git a/arch/arm/mach-exynos4/include/mach/regs-audss.h b/arch/arm/mach-exynos4/include/mach/regs-audss.h
new file mode 100644
index 0000000..3a797b8
--- /dev/null
+++ b/arch/arm/mach-exynos4/include/mach/regs-audss.h
@@ -0,0 +1,25 @@
+/* arch/arm/mach-exynos4/include/mach/regs-audss.h
+ *
+ * Copyright (c) 2011 Samsung Electronics
+ *		http://www.samsung.com
+ *
+ * Exynos4 Audio SubSystem clock register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __PLAT_REGS_AUDSS_H
+#define __PLAT_REGS_AUDSS_H __FILE__
+
+#define S5P_AUDSSREG(x)		(S5P_VA_AUDSS + (x))
+
+#define S5P_CLKGATE_AUDSS	S5P_AUDSSREG(0x8)
+
+#define PCM_EXTCLK0		16934400
+
+/* IP Clock Gate 0 Registers */
+#define S5P_AUDSS_CLKGATE_PCMSPECIAL	(1<<5)
+
+#endif /* _PLAT_REGS_AUDSS_H */
diff --git a/arch/arm/mach-exynos4/mach-smdkc210.c b/arch/arm/mach-exynos4/mach-smdkc210.c
index e645f7a..ac53e49 100644
--- a/arch/arm/mach-exynos4/mach-smdkc210.c
+++ b/arch/arm/mach-exynos4/mach-smdkc210.c
@@ -142,6 +142,11 @@ static struct platform_device smdkc210_smsc911x = {
 	},
 };
 
+static struct platform_device smdkc210_pcm_device = {
+	.name		= "samsung-smdk-pcm",
+	.id		= -1,
+};
+
 static struct i2c_board_info i2c_devs1[] __initdata = {
 	{I2C_BOARD_INFO("wm8994", 0x1a),},
 };
@@ -156,6 +161,7 @@ static struct platform_device *smdkc210_devices[] __initdata = {
 	&s3c_device_wdt,
 	&exynos4_device_ac97,
 	&exynos4_device_i2s0,
+	&exynos4_device_pcm0,
 	&exynos4_device_pd[PD_MFC],
 	&exynos4_device_pd[PD_G3D],
 	&exynos4_device_pd[PD_LCD0],
@@ -166,6 +172,7 @@ static struct platform_device *smdkc210_devices[] __initdata = {
 	&exynos4_device_sysmmu,
 	&samsung_asoc_dma,
 	&smdkc210_smsc911x,
+	&smdkc210_pcm_device,
 };
 
 static void __init smdkc210_smsc911x_init(void)
diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c b/arch/arm/mach-exynos4/mach-smdkv310.c
index 1526764..7e3ee6c 100644
--- a/arch/arm/mach-exynos4/mach-smdkv310.c
+++ b/arch/arm/mach-exynos4/mach-smdkv310.c
@@ -163,6 +163,11 @@ static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
 	.cols		= 8,
 };
 
+static struct platform_device smdkv310_pcm_device = {
+	.name		= "samsung-smdk-pcm",
+	.id		= -1,
+};
+
 static struct i2c_board_info i2c_devs1[] __initdata = {
 	{I2C_BOARD_INFO("wm8994", 0x1a),},
 };
@@ -186,8 +191,10 @@ static struct platform_device *smdkv310_devices[] __initdata = {
 	&exynos4_device_pd[PD_TV],
 	&exynos4_device_pd[PD_GPS],
 	&exynos4_device_sysmmu,
+	&exynos4_device_pcm0,
 	&samsung_asoc_dma,
 	&smdkv310_smsc911x,
+	&smdkv310_pcm_device,
 };
 
 static void __init smdkv310_smsc911x_init(void)
diff --git a/arch/arm/plat-samsung/include/plat/audio.h b/arch/arm/plat-samsung/include/plat/audio.h
index a0826ed..5cee225 100644
--- a/arch/arm/plat-samsung/include/plat/audio.h
+++ b/arch/arm/plat-samsung/include/plat/audio.h
@@ -46,6 +46,13 @@ struct samsung_i2s {
 	const char **src_clk;
 };
 
+struct samsung_pcm {
+/* If the PCM block has no internal prescalar or MUX */
+#define QUIRK_NO_DIV		(1 << 0)
+	/* Quirks of the PCM controller */
+	u32 quirks;
+};
+
 /**
  * struct s3c_audio_pdata - common platform data for audio device drivers
  * @cfg_gpio: Callback function to setup mux'ed pins in I2S/PCM/AC97 mode
@@ -54,5 +61,6 @@ struct s3c_audio_pdata {
 	int (*cfg_gpio)(struct platform_device *);
 	union {
 		struct samsung_i2s i2s;
+		struct samsung_pcm pcm;
 	} type;
 };
-- 
1.7.1

[PATCH V2 2/2] ASoC: SAMSUNG: Add WM8994 PCM Machine driver

[Sangbeom Kim]

This patch add WM8994 PCM machine driver to support PCM audio
on SMDKV310, SMDKC210 boards.
Playback and Capture supports 8kHz sampling rates.
and It is tested on SMDKV310, SMDKC210.

Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Acked-by: Liam Girdwood <lrg@ti.com>
---
 sound/soc/samsung/Kconfig          |    8 ++
 sound/soc/samsung/Makefile         |    2 +
 sound/soc/samsung/smdk_wm8994pcm.c |  175 ++++++++++++++++++++++++++++++++++++
 3 files changed, 185 insertions(+), 0 deletions(-)
 create mode 100644 sound/soc/samsung/smdk_wm8994pcm.c

diff --git a/sound/soc/samsung/Kconfig b/sound/soc/samsung/Kconfig
index b8c7a2e..db2bc49 100644
--- a/sound/soc/samsung/Kconfig
+++ b/sound/soc/samsung/Kconfig
@@ -170,3 +170,11 @@ config SND_SOC_SMDK_WM8580_PCM
 	select SND_SAMSUNG_PCM
 	help
 	  Say Y if you want to add support for SoC audio on the SMDK.
+
+config SND_SOC_SMDK_WM8994_PCM
+	tristate "SoC PCM Audio support for WM8994 on SMDK"
+	depends on SND_SOC_SAMSUNG && (MACH_SMDKC210 || MACH_SMDKV310)
+	select SND_SOC_WM8994
+	select SND_SAMSUNG_PCM
+	help
+	  Say Y if you want to add support for SoC audio on the SMDK.
diff --git a/sound/soc/samsung/Makefile b/sound/soc/samsung/Makefile
index 6c598fc..4a3a428 100644
--- a/sound/soc/samsung/Makefile
+++ b/sound/soc/samsung/Makefile
@@ -35,6 +35,7 @@ snd-soc-s3c64xx-smartq-wm8987-objs := smartq_wm8987.o
 snd-soc-goni-wm8994-objs := goni_wm8994.o
 snd-soc-smdk-spdif-objs := smdk_spdif.o
 snd-soc-smdk-wm8580pcm-objs := smdk_wm8580pcm.o
+snd-soc-smdk-wm8994pcm-objs := smdk_wm8994pcm.o
 
 obj-$(CONFIG_SND_SOC_SAMSUNG_JIVE_WM8750) += snd-soc-jive-wm8750.o
 obj-$(CONFIG_SND_SOC_SAMSUNG_NEO1973_WM8753) += snd-soc-neo1973-wm8753.o
@@ -53,3 +54,4 @@ obj-$(CONFIG_SND_SOC_SMARTQ) += snd-soc-s3c64xx-smartq-wm8987.o
 obj-$(CONFIG_SND_SOC_SAMSUNG_SMDK_SPDIF) += snd-soc-smdk-spdif.o
 obj-$(CONFIG_SND_SOC_GONI_AQUILA_WM8994) += snd-soc-goni-wm8994.o
 obj-$(CONFIG_SND_SOC_SMDK_WM8580_PCM) += snd-soc-smdk-wm8580pcm.o
+obj-$(CONFIG_SND_SOC_SMDK_WM8994_PCM) += snd-soc-smdk-wm8994pcm.o
diff --git a/sound/soc/samsung/smdk_wm8994pcm.c b/sound/soc/samsung/smdk_wm8994pcm.c
new file mode 100644
index 0000000..756c228
--- /dev/null
+++ b/sound/soc/samsung/smdk_wm8994pcm.c
@@ -0,0 +1,175 @@
+/*
+ *  sound/soc/samsung/smdk_wm8994pcm.c
+ *
+ *  Copyright (c) 2011 Samsung Electronics Co. Ltd
+ *
+ *  This program is free software; you can redistribute  it and/or  modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+#include <sound/soc.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+
+#include "../codecs/wm8994.h"
+#include "dma.h"
+#include "pcm.h"
+
+/*
+ * Board Settings:
+ *  o '1' means 'ON'
+ *  o '0' means 'OFF'
+ *  o 'X' means 'Don't care'
+ *
+ * SMDKC210, SMDKV310: CFG3- 1001, CFG5-1000, CFG7-111111
+ */
+
+/*
+ * Configure audio route as :-
+ * $ amixer sset 'DAC1' on,on
+ * $ amixer sset 'Right Headphone Mux' 'DAC'
+ * $ amixer sset 'Left Headphone Mux' 'DAC'
+ * $ amixer sset 'DAC1R Mixer AIF1.1' on
+ * $ amixer sset 'DAC1L Mixer AIF1.1' on
+ * $ amixer sset 'IN2L' on
+ * $ amixer sset 'IN2L PGA IN2LN' on
+ * $ amixer sset 'MIXINL IN2L' on
+ * $ amixer sset 'AIF1ADC1L Mixer ADC/DMIC' on
+ * $ amixer sset 'IN2R' on
+ * $ amixer sset 'IN2R PGA IN2RN' on
+ * $ amixer sset 'MIXINR IN2R' on
+ * $ amixer sset 'AIF1ADC1R Mixer ADC/DMIC' on
+ */
+
+/* SMDK has a 16.9344MHZ crystal attached to WM8994 */
+#define SMDK_WM8994_FREQ 16934400
+
+static int smdk_wm8994_pcm_hw_params(struct snd_pcm_substream *substream,
+			      struct snd_pcm_hw_params *params)
+{
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	struct snd_soc_dai *codec_dai = rtd->codec_dai;
+	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+	unsigned long mclk_freq;
+	int rfs, ret;
+
+	switch(params_rate(params)) {
+	case 8000:
+		rfs = 512;
+		break;
+	default:
+		printk(KERN_ERR "%s:%d Sampling Rate %u not supported!\n",
+		__func__, __LINE__, params_rate(params));
+		return -EINVAL;
+	}
+
+	mclk_freq = params_rate(params) * rfs;
+
+	/* Set the codec DAI configuration */
+	ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_B
+				| SND_SOC_DAIFMT_IB_NF
+				| SND_SOC_DAIFMT_CBS_CFS);
+	if (ret < 0)
+		return ret;
+
+	/* Set the cpu DAI configuration */
+	ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_DSP_B
+				| SND_SOC_DAIFMT_IB_NF
+				| SND_SOC_DAIFMT_CBS_CFS);
+	if (ret < 0)
+		return ret;
+
+	ret = snd_soc_dai_set_sysclk(codec_dai, WM8994_SYSCLK_FLL1,
+					mclk_freq, SND_SOC_CLOCK_IN);
+	if (ret < 0)
+		return ret;
+
+	ret = snd_soc_dai_set_pll(codec_dai, WM8994_FLL1, WM8994_FLL_SRC_MCLK1,
+					SMDK_WM8994_FREQ, mclk_freq);
+	if (ret < 0)
+		return ret;
+
+	/* Set PCM source clock on CPU */
+	ret = snd_soc_dai_set_sysclk(cpu_dai, S3C_PCM_CLKSRC_MUX,
+					mclk_freq, SND_SOC_CLOCK_IN);
+	if (ret < 0)
+		return ret;
+
+	/* Set SCLK_DIV for making bclk */
+	ret = snd_soc_dai_set_clkdiv(cpu_dai, S3C_PCM_SCLK_PER_FS, rfs);
+	if (ret < 0)
+		return ret;
+
+	return 0;
+}
+
+static struct snd_soc_ops smdk_wm8994_pcm_ops = {
+	.hw_params = smdk_wm8994_pcm_hw_params,
+};
+
+static struct snd_soc_dai_link smdk_dai[] = {
+	{
+		.name = "WM8994 PAIF PCM",
+		.stream_name = "Primary PCM",
+		.cpu_dai_name = "samsung-pcm.0",
+		.codec_dai_name = "wm8994-aif1",
+		.platform_name = "samsung-audio",
+		.codec_name = "wm8994-codec",
+		.ops = &smdk_wm8994_pcm_ops,
+	},
+};
+
+static struct snd_soc_card smdk_pcm = {
+	.name = "SMDK-PCM",
+	.dai_link = smdk_dai,
+	.num_links = 1,
+};
+
+static int __devinit snd_smdk_probe(struct platform_device *pdev)
+{
+	int ret = 0;
+
+	smdk_pcm.dev = &pdev->dev;
+	ret = snd_soc_register_card(&smdk_pcm);
+	if (ret) {
+		dev_err(&pdev->dev, "snd_soc_register_card failed %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int __devexit snd_smdk_remove(struct platform_device *pdev)
+{
+	snd_soc_unregister_card(&smdk_pcm);
+	platform_set_drvdata(pdev, NULL);
+	return 0;
+}
+
+static struct platform_driver snd_smdk_driver = {
+	.driver = {
+		.owner = THIS_MODULE,
+		.name = "samsung-smdk-pcm",
+	},
+	.probe = snd_smdk_probe,
+	.remove = __devexit_p(snd_smdk_remove),
+};
+
+static int __init smdk_audio_init(void)
+{
+	return platform_driver_register(&snd_smdk_driver);
+}
+
+module_init(smdk_audio_init);
+
+static void __exit smdk_audio_exit(void)
+{
+	platform_driver_unregister(&snd_smdk_driver);
+}
+
+module_exit(smdk_audio_exit);
+
+MODULE_AUTHOR("Sangbeom Kim, <sbkim73@samsung.com>");
+MODULE_DESCRIPTION("ALSA SoC SMDK WM8994 for PCM");
+MODULE_LICENSE("GPL");
-- 
1.7.1

Re: [PATCH V2 1/2] ARM: EXYNOS4: Add PCM audio support for WM8994

[Jassi Brar]

On Thu, Apr 28, 2011 at 7:02 AM, Sangbeom Kim <sbkim73@samsung.com> wrote:
> This patch add pcm audio configuration for SMDKV310 and SMDKC210.
> Platform device and pcm clock initialization code is added.
>
> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
> Acked-by: Liam Girdwood <lrg@ti.com>

Acked-by: Jassi Brar <jassisinghbrar@gmail.com>

Re: [PATCH V2 2/2] ASoC: SAMSUNG: Add WM8994 PCM Machine driver

[Jassi Brar]

On Thu, Apr 28, 2011 at 7:02 AM, Sangbeom Kim <sbkim73@samsung.com> wrote:
> This patch add WM8994 PCM machine driver to support PCM audio
> on SMDKV310, SMDKC210 boards.
> Playback and Capture supports 8kHz sampling rates.
> and It is tested on SMDKV310, SMDKC210.
>
> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
> Acked-by: Liam Girdwood <lrg@ti.com>

Acked-by: Jassi Brar <jassisinghbrar@gmail.com>

Re: [PATCH V2 0/2] Add WM8994 PCM Machine driver for Exynos4210

[Mark Brown]

On Thu, Apr 28, 2011 at 10:32:50AM +0900, Sangbeom Kim wrote:

> This is 2nd patchset for WM8994 pcm machine driver that supports
> PCM audio on SMDKV310, SMDKC210 and test is done.

As with your first patch set I'm waiting for a response from Kukjin
here.  I'm expecting that the arch/arm parts won't be merged as they add
new features.

Re: [PATCH V2 2/2] ASoC: SAMSUNG: Add WM8994 PCM Machine driver

[Mark Brown]

On Thu, Apr 28, 2011 at 10:32:52AM +0900, Sangbeom Kim wrote:

> +	/* Set the codec DAI configuration */
> +	ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_B
> +				| SND_SOC_DAIFMT_IB_NF
> +				| SND_SOC_DAIFMT_CBS_CFS);
> +	if (ret < 0)
> +		return ret;

> +	/* Set the cpu DAI configuration */
> +	ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_DSP_B
> +				| SND_SOC_DAIFMT_IB_NF
> +				| SND_SOC_DAIFMT_CBS_CFS);
> +	if (ret < 0)
> +		return ret;

> +	ret = snd_soc_dai_set_sysclk(codec_dai, WM8994_SYSCLK_FLL1,
> +					mclk_freq, SND_SOC_CLOCK_IN);
> +	if (ret < 0)
> +		return ret;

For optimal performance the CODEC AIFnCLK needs to be synchronous with
the audio interface clocks.  This means that you should either clock the
FLL from the CPU BCLK or you should make the CODEC master for the AIF.

> +static struct snd_soc_ops smdk_wm8994_pcm_ops = {
> +	.hw_params = smdk_wm8994_pcm_hw_params,
> +};

Note also that the FLL is never stopped in this system - this will not
be optimally power efficient.  It probably doesn't matter too much on
the reference board itself but on systems derived from it it would be an
issue.

> +static struct snd_soc_dai_link smdk_dai[] = {

> +static struct snd_soc_card smdk_pcm = {
> +	.name = "SMDK-PCM",
> +	.dai_link = smdk_dai,
> +	.num_links = 1,

Since the links are in an array using ARRAY_SIZE() would be better.

> +static int __init smdk_audio_init(void)
> +{
> +	return platform_driver_register(&snd_smdk_driver);
> +}
> +
> +module_init(smdk_audio_init);

Random blank line there.

RE: [PATCH V2 0/2] Add WM8994 PCM Machine driver for Exynos4210

[Kukjin Kim]

Mark Brown wrote:
> 
> On Thu, Apr 28, 2011 at 10:32:50AM +0900, Sangbeom Kim wrote:
> 
> > This is 2nd patchset for WM8994 pcm machine driver that supports
> > PCM audio on SMDKV310, SMDKC210 and test is done.
> 
> As with your first patch set I'm waiting for a response from Kukjin
> here.  I'm expecting that the arch/arm parts won't be merged as they add
> new features.

Hmm...yeah, need more time and some solutions for it...first of all, I'm
thinking to keep some branch for new features is possible and if required,
it can be adapted after arch/arm consolidation work. But as you know, the
branch cannot be sent to upstream upcoming merge window.

If any updates, let you know :)
Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

RE: [PATCH V2 1/2] ARM: EXYNOS4: Add PCM audio support for WM8994

[Marek Szyprowski]

Hello,

I've just noticed that there is a problem with this patch on 
kgene/for-next branch. It causes compilation break:

arch/arm/mach-exynos4/cpu.c:106: error: 'S5P_VA_AUDSS' undeclared here (not in a
function)
make[1]: *** [arch/arm/mach-exynos4/cpu.o] Error 1
make: *** [arch/arm/mach-exynos4] Error 2
make: *** Waiting for unfinished jobs....

It looks that some definitions are still missing there.

On Thursday, April 28, 2011 3:33 AM Sangbeom Kim wrote:

> This patch add pcm audio configuration for SMDKV310 and SMDKC210.
> Platform device and pcm clock initialization code is added.
> 
> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
> Acked-by: Liam Girdwood <lrg@ti.com>
> ---
>  arch/arm/mach-exynos4/clock.c                   |  169
> ++++++++++++++++++++++-
>  arch/arm/mach-exynos4/cpu.c                     |    5 +
>  arch/arm/mach-exynos4/dev-audio.c               |    5 +
>  arch/arm/mach-exynos4/include/mach/map.h        |    3 +
>  arch/arm/mach-exynos4/include/mach/regs-audss.h |   25 ++++
>  arch/arm/mach-exynos4/mach-smdkc210.c           |    7 +
>  arch/arm/mach-exynos4/mach-smdkv310.c           |    7 +
>  arch/arm/plat-samsung/include/plat/audio.h      |    8 +
>  8 files changed, 227 insertions(+), 2 deletions(-)
>  create mode 100644 arch/arm/mach-exynos4/include/mach/regs-audss.h
> 
> diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
> index 871f9d5..77cd81f 100644
> --- a/arch/arm/mach-exynos4/clock.c
> +++ b/arch/arm/mach-exynos4/clock.c
> @@ -23,6 +23,7 @@
> 
>  #include <mach/map.h>
>  #include <mach/regs-clock.h>
> +#include <mach/regs-audss.h>
>  #include <mach/sysmmu.h>
> 
>  static struct clk clk_sclk_hdmi27m = {
> @@ -47,6 +48,31 @@ static struct clk clk_sclk_usbphy1 = {
>  	.id		= -1,
>  };
> 
> +static struct clk clk_sclk_xxti = {
> +	.name		= "sclk_usbphy1",
> +	.id		= -1,
> +};
> +
> +static struct clk clk_sclk_xusbxti = {
> +	.name		= "sclk_usbphy1",
> +	.id		= -1,
> +};
> +
> +static struct clk clk_audiocdclk0 = {
> +	.name		= "audiocdclk",
> +	.id		= 0,
> +};
> +
> +static struct clk clk_audiocdclk1 = {
> +	.name		= "audiocdclk",
> +	.id		= 1,
> +};
> +
> +static struct clk clk_audiocdclk2 = {
> +	.name		= "audiocdclk",
> +	.id		= 2,
> +};
> +
>  static int exynos4_clksrc_mask_top_ctrl(struct clk *clk, int enable)
>  {
>  	return s5p_gatectrl(S5P_CLKSRC_MASK_TOP, clk, enable);
> @@ -127,6 +153,16 @@ static int exynos4_clk_ip_perir_ctrl(struct clk *clk,
> int enable)
>  	return s5p_gatectrl(S5P_CLKGATE_IP_PERIR, clk, enable);
>  }
> 
> +static int exynos4_clksrc_mask_maudio_ctrl(struct clk *clk, int enable)
> +{
> +        return s5p_gatectrl(S5P_CLKSRC_MASK_MAUDIO, clk, enable);
> +}
> +
> +static int exynos4_clk_audss_ctrl(struct clk *clk, int enable)
> +{
> +        return s5p_gatectrl(S5P_CLKGATE_AUDSS, clk, enable);
> +}
> +
>  /* Core list of CMU_CPU side */
> 
>  static struct clksrc_clk clk_mout_apll = {
> @@ -561,6 +597,21 @@ static struct clk init_clocks_off[] = {
>  		.enable		= exynos4_clk_ip_peril_ctrl,
>  		.ctrlbit	= (1 << 27),
>  	}, {
> +		.name		= "pcm",
> +		.id		= 0,
> +		.enable		= exynos4_clk_audss_ctrl,
> +		.ctrlbit	= S5P_AUDSS_CLKGATE_PCMSPECIAL,
> +	}, {
> +		.name		= "pcm",
> +		.id		= 1,
> +		.enable		= exynos4_clk_ip_peril_ctrl,
> +		.ctrlbit	= (1 << 22),
> +	}, {
> +		.name		= "pcm",
> +		.id		= 2,
> +		.enable		= exynos4_clk_ip_peril_ctrl,
> +		.ctrlbit	= (1 << 23),
> +        }, {
>  		.name		= "fimg2d",
>  		.id		= -1,
>  		.enable		= exynos4_clk_ip_image_ctrl,
> @@ -686,6 +737,93 @@ static struct clk init_clocks_off[] = {
>  	}
>  };
> 
> +static struct clk *clkset_sclk_audio0_list[] = {
> +	[0] = &clk_audiocdclk0,
> +	[1] = NULL,
> +	[2] = &clk_sclk_hdmi27m,
> +	[3] = &clk_sclk_usbphy0,
> +	[4] = &clk_sclk_xxti,
> +	[5] = &clk_sclk_xusbxti,
> +	[6] = &clk_mout_mpll.clk,
> +	[7] = &clk_mout_epll.clk,
> +	[8] = &clk_sclk_vpll.clk,
> +};
> +
> +static struct clksrc_sources clkset_sclk_audio0 = {
> +	.sources	= clkset_sclk_audio0_list,
> +	.nr_sources	= ARRAY_SIZE(clkset_sclk_audio0_list),
> +};
> +
> +static struct clksrc_clk clk_sclk_audio0 = {
> +	.clk	= {
> +		.name		= "audio-bus",
> +		.id		= 0,
> +		.enable		= exynos4_clksrc_mask_maudio_ctrl,
> +		.ctrlbit	= (1 << 0),
> +	},
> +	.sources = &clkset_sclk_audio0,
> +	.reg_src = { .reg = S5P_CLKSRC_MAUDIO, .shift = 0, .size = 4 },
> +	.reg_div = { .reg = S5P_CLKDIV_MAUDIO, .shift = 0, .size = 4 },
> +};
> +
> +static struct clk *clkset_sclk_audio1_list[] = {
> +	[0] = &clk_audiocdclk1,
> +	[1] = NULL,
> +	[2] = &clk_sclk_hdmi27m,
> +	[3] = &clk_sclk_usbphy0,
> +	[4] = &clk_sclk_xxti,
> +	[5] = &clk_sclk_xusbxti,
> +	[6] = &clk_mout_mpll.clk,
> +	[7] = &clk_mout_epll.clk,
> +	[8] = &clk_sclk_vpll.clk,
> +};
> +
> +static struct clksrc_sources clkset_sclk_audio1 = {
> +	.sources	= clkset_sclk_audio1_list,
> +	.nr_sources	= ARRAY_SIZE(clkset_sclk_audio1_list),
> +};
> +
> +static struct clksrc_clk clk_sclk_audio1 = {
> +	.clk	= {
> +		.name		= "audio-bus",
> +		.id		= 1,
> +		.enable		= exynos4_clksrc_mask_peril1_ctrl,
> +		.ctrlbit	= (1 << 0),
> +        },
> +	.sources = &clkset_sclk_audio1,
> +	.reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 0, .size = 4 },
> +	.reg_div = { .reg = S5P_CLKDIV_PERIL4, .shift = 4, .size = 8 },
> +};
> +
> +static struct clk *clkset_sclk_audio2_list[] = {
> +	[0] = &clk_audiocdclk2,
> +	[1] = NULL,
> +	[2] = &clk_sclk_hdmi27m,
> +	[3] = &clk_sclk_usbphy0,
> +	[4] = &clk_sclk_xxti,
> +	[5] = &clk_sclk_xusbxti,
> +	[6] = &clk_mout_mpll.clk,
> +	[7] = &clk_mout_epll.clk,
> +	[8] = &clk_sclk_vpll.clk,
> +};
> +
> +static struct clksrc_sources clkset_sclk_audio2 = {
> +	.sources        = clkset_sclk_audio2_list,
> +	.nr_sources     = ARRAY_SIZE(clkset_sclk_audio2_list),
> +};
> +
> +static struct clksrc_clk clk_sclk_audio2 = {
> +	.clk	= {
> +		.name		= "audio-bus",
> +		.id		= 2,
> +		.enable		= exynos4_clksrc_mask_peril1_ctrl,
> +		.ctrlbit	= (1 << 4),
> +	},
> +	.sources = &clkset_sclk_audio2,
> +	.reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 4, .size = 4 },
> +	.reg_div = { .reg = S5P_CLKDIV_PERIL4, .shift = 16, .size = 4 },
> +};
> +
>  static struct clk init_clocks[] = {
>  	{
>  		.name		= "uart",
> @@ -1079,7 +1217,28 @@ static struct clksrc_clk clksrcs[] = {
>  			.ctrlbit	= (1 << 16),
>  		},
>  		.reg_div = { .reg = S5P_CLKDIV_FSYS3, .shift = 8, .size = 8 },
> -	}
> +	}, {
> +		.clk		= {
> +			.name		= "sclk_pcm",
> +			.id		= 0,
> +			.parent		= &clk_sclk_audio0.clk,
> +                },
> +                .reg_div = { .reg = S5P_CLKDIV_MAUDIO, .shift = 4, .size =
> 8 },
> +        }, {
> +                .clk            = {
> +                        .name           = "sclk_pcm",
> +                        .id             = 1,
> +                        .parent         = &clk_sclk_audio1.clk,
> +                },
> +                .reg_div = { .reg = S5P_CLKDIV_PERIL4, .shift = 4, .size =
> 8 },
> +        }, {
> +                .clk            = {
> +                        .name           = "sclk_pcm",
> +                        .id             = 2,
> +                        .parent         = &clk_sclk_audio2.clk,
> +                },
> +                .reg_div = { .reg = S5P_CLKDIV_PERIL4, .shift = 20, .size
> = 8 },
> +        },
>  };
> 
>  /* Clock initialization code */
> @@ -1112,6 +1271,9 @@ static struct clksrc_clk *sysclks[] = {
>  	&clk_dout_mmc2,
>  	&clk_dout_mmc3,
>  	&clk_dout_mmc4,
> +	&clk_sclk_audio0,
> +	&clk_sclk_audio1,
> +	&clk_sclk_audio2,
>  };
> 
>  static int xtal_rate;
> @@ -1191,10 +1353,13 @@ void __init_or_cpufreq exynos4_setup_clocks(void)
> 
>  	for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
>  		s3c_set_clksrc(&clksrcs[ptr], true);
> +
> +	clk_audiocdclk0.rate = PCM_EXTCLK0;
> +	clk_set_parent(&clk_sclk_audio0.clk, &clk_audiocdclk0);
>  }
> 
>  static struct clk *clks[] __initdata = {
> -	/* Nothing here yet */
> +	&clk_audiocdclk0,
>  };
> 
>  void __init exynos4_register_clocks(void)
> diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
> index 7930113..620b41f 100644
> --- a/arch/arm/mach-exynos4/cpu.c
> +++ b/arch/arm/mach-exynos4/cpu.c
> @@ -97,6 +97,11 @@ static struct map_desc exynos4_iodesc[] __initdata = {
>  		.pfn		= __phys_to_pfn(EXYNOS4_PA_SROMC),
>  		.length		= SZ_4K,
>  		.type		= MT_DEVICE,
> +	}, {
> +		.virtual	= (unsigned long)S5P_VA_AUDSS,
> +		.pfn		= __phys_to_pfn(EXYNOS4_PA_AUDSS),
> +		.length		= SZ_1K,
> +		.type		= MT_DEVICE,
>  	},
>  };
> 
> diff --git a/arch/arm/mach-exynos4/dev-audio.c b/arch/arm/mach-exynos4/dev-
> audio.c
> index 1eed5f9..6347594 100644
> --- a/arch/arm/mach-exynos4/dev-audio.c
> +++ b/arch/arm/mach-exynos4/dev-audio.c
> @@ -187,6 +187,11 @@ static int exynos4_pcm_cfg_gpio(struct platform_device
> *pdev)
> 
>  static struct s3c_audio_pdata s3c_pcm_pdata = {
>  	.cfg_gpio = exynos4_pcm_cfg_gpio,
> +	.type = {
> +		.pcm = {
> +			.quirks = QUIRK_NO_DIV,
> +		},
> +	},
>  };
> 
>  static struct resource exynos4_pcm0_resource[] = {
> diff --git a/arch/arm/mach-exynos4/include/mach/map.h b/arch/arm/mach-
> exynos4/include/mach/map.h
> index 6330b73..063854e 100644
> --- a/arch/arm/mach-exynos4/include/mach/map.h
> +++ b/arch/arm/mach-exynos4/include/mach/map.h
> @@ -30,6 +30,8 @@
>  #define EXYNOS4_PA_FIMC2		0x11820000
>  #define EXYNOS4_PA_FIMC3		0x11830000
> 
> +#define EXYNOS4_PA_AUDSS		0x03810000
> +
>  #define EXYNOS4_PA_I2S0			0x03830000
>  #define EXYNOS4_PA_I2S1			0xE3100000
>  #define EXYNOS4_PA_I2S2			0xE2A00000
> @@ -143,6 +145,7 @@
>  #define S5P_PA_SROMC			EXYNOS4_PA_SROMC
>  #define S5P_PA_SYSCON			EXYNOS4_PA_SYSCON
>  #define S5P_PA_TIMER			EXYNOS4_PA_TIMER
> +#define S5P_PA_AUDSS			EXYNOS4_PA_AUDSS
> 
>  #define SAMSUNG_PA_KEYPAD		EXYNOS4_PA_KEYPAD
> 
> diff --git a/arch/arm/mach-exynos4/include/mach/regs-audss.h
> b/arch/arm/mach-exynos4/include/mach/regs-audss.h
> new file mode 100644
> index 0000000..3a797b8
> --- /dev/null
> +++ b/arch/arm/mach-exynos4/include/mach/regs-audss.h
> @@ -0,0 +1,25 @@
> +/* arch/arm/mach-exynos4/include/mach/regs-audss.h
> + *
> + * Copyright (c) 2011 Samsung Electronics
> + *		http://www.samsung.com
> + *
> + * Exynos4 Audio SubSystem clock register definitions
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#ifndef __PLAT_REGS_AUDSS_H
> +#define __PLAT_REGS_AUDSS_H __FILE__
> +
> +#define S5P_AUDSSREG(x)		(S5P_VA_AUDSS + (x))
> +
> +#define S5P_CLKGATE_AUDSS	S5P_AUDSSREG(0x8)
> +
> +#define PCM_EXTCLK0		16934400
> +
> +/* IP Clock Gate 0 Registers */
> +#define S5P_AUDSS_CLKGATE_PCMSPECIAL	(1<<5)
> +
> +#endif /* _PLAT_REGS_AUDSS_H */
> diff --git a/arch/arm/mach-exynos4/mach-smdkc210.c b/arch/arm/mach-
> exynos4/mach-smdkc210.c
> index e645f7a..ac53e49 100644
> --- a/arch/arm/mach-exynos4/mach-smdkc210.c
> +++ b/arch/arm/mach-exynos4/mach-smdkc210.c
> @@ -142,6 +142,11 @@ static struct platform_device smdkc210_smsc911x = {
>  	},
>  };
> 
> +static struct platform_device smdkc210_pcm_device = {
> +	.name		= "samsung-smdk-pcm",
> +	.id		= -1,
> +};
> +
>  static struct i2c_board_info i2c_devs1[] __initdata = {
>  	{I2C_BOARD_INFO("wm8994", 0x1a),},
>  };
> @@ -156,6 +161,7 @@ static struct platform_device *smdkc210_devices[]
> __initdata = {
>  	&s3c_device_wdt,
>  	&exynos4_device_ac97,
>  	&exynos4_device_i2s0,
> +	&exynos4_device_pcm0,
>  	&exynos4_device_pd[PD_MFC],
>  	&exynos4_device_pd[PD_G3D],
>  	&exynos4_device_pd[PD_LCD0],
> @@ -166,6 +172,7 @@ static struct platform_device *smdkc210_devices[]
> __initdata = {
>  	&exynos4_device_sysmmu,
>  	&samsung_asoc_dma,
>  	&smdkc210_smsc911x,
> +	&smdkc210_pcm_device,
>  };
> 
>  static void __init smdkc210_smsc911x_init(void)
> diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c b/arch/arm/mach-
> exynos4/mach-smdkv310.c
> index 1526764..7e3ee6c 100644
> --- a/arch/arm/mach-exynos4/mach-smdkv310.c
> +++ b/arch/arm/mach-exynos4/mach-smdkv310.c
> @@ -163,6 +163,11 @@ static struct samsung_keypad_platdata
> smdkv310_keypad_data __initdata = {
>  	.cols		= 8,
>  };
> 
> +static struct platform_device smdkv310_pcm_device = {
> +	.name		= "samsung-smdk-pcm",
> +	.id		= -1,
> +};
> +
>  static struct i2c_board_info i2c_devs1[] __initdata = {
>  	{I2C_BOARD_INFO("wm8994", 0x1a),},
>  };
> @@ -186,8 +191,10 @@ static struct platform_device *smdkv310_devices[]
> __initdata = {
>  	&exynos4_device_pd[PD_TV],
>  	&exynos4_device_pd[PD_GPS],
>  	&exynos4_device_sysmmu,
> +	&exynos4_device_pcm0,
>  	&samsung_asoc_dma,
>  	&smdkv310_smsc911x,
> +	&smdkv310_pcm_device,
>  };
> 
>  static void __init smdkv310_smsc911x_init(void)
> diff --git a/arch/arm/plat-samsung/include/plat/audio.h b/arch/arm/plat-
> samsung/include/plat/audio.h
> index a0826ed..5cee225 100644
> --- a/arch/arm/plat-samsung/include/plat/audio.h
> +++ b/arch/arm/plat-samsung/include/plat/audio.h
> @@ -46,6 +46,13 @@ struct samsung_i2s {
>  	const char **src_clk;
>  };
> 
> +struct samsung_pcm {
> +/* If the PCM block has no internal prescalar or MUX */
> +#define QUIRK_NO_DIV		(1 << 0)
> +	/* Quirks of the PCM controller */
> +	u32 quirks;
> +};
> +
>  /**
>   * struct s3c_audio_pdata - common platform data for audio device drivers
>   * @cfg_gpio: Callback function to setup mux'ed pins in I2S/PCM/AC97 mode
> @@ -54,5 +61,6 @@ struct s3c_audio_pdata {
>  	int (*cfg_gpio)(struct platform_device *);
>  	union {
>  		struct samsung_i2s i2s;
> +		struct samsung_pcm pcm;
>  	} type;
>  };
> --
> 1.7.1
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-
> soc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html


Best regards
-- 
Marek Szyprowski
Samsung Poland R&D Center

[PATCH] ARM: EXYNOS4: Fix missing S5P_VA_AUDSS definition

[Naveen Krishna Chatradhi]

This patch fixes the 'S5P_VA_AUDSS' missing definition
causing compilation break.

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
---
 arch/arm/plat-s5p/include/plat/map-s5p.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h
index d973d39..daa4a44 100644
--- a/arch/arm/plat-s5p/include/plat/map-s5p.h
+++ b/arch/arm/plat-s5p/include/plat/map-s5p.h
@@ -40,6 +40,7 @@
 #define S5P_VA_GIC_DIST		S5P_VA_COREPERI(0x1000)
 
 #define S3C_VA_USB_HSPHY	S3C_ADDR(0x02900000)
+#define S5P_VA_AUDSS		S3C_ADDR(0x02A00000)
 
 #define VA_VIC(x)		(S3C_VA_IRQ + ((x) * 0x10000))
 #define VA_VIC0			VA_VIC(0)
-- 
1.7.2.3

RE: [PATCH] ARM: EXYNOS4: Fix missing S5P_VA_AUDSS definition

[Kukjin Kim]

Naveen Krishna Chatradhi wrote:
> 
> This patch fixes the 'S5P_VA_AUDSS' missing definition
> causing compilation break.
> 
> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
> ---
>  arch/arm/plat-s5p/include/plat/map-s5p.h |    1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-
> s5p/include/plat/map-s5p.h
> index d973d39..daa4a44 100644
> --- a/arch/arm/plat-s5p/include/plat/map-s5p.h
> +++ b/arch/arm/plat-s5p/include/plat/map-s5p.h
> @@ -40,6 +40,7 @@
>  #define S5P_VA_GIC_DIST		S5P_VA_COREPERI(0x1000)
> 
>  #define S3C_VA_USB_HSPHY	S3C_ADDR(0x02900000)
> +#define S5P_VA_AUDSS		S3C_ADDR(0x02A00000)
> 
>  #define VA_VIC(x)		(S3C_VA_IRQ + ((x) * 0x10000))
>  #define VA_VIC0			VA_VIC(0)
> --

Hi Naveen,

Applied, thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

RE: [PATCH V2 1/2] ARM: EXYNOS4: Add PCM audio support for WM8994

[Kukjin Kim]

Marek Szyprowski wrote:
> 
> Hello,
> 
Hi :)

> I've just noticed that there is a problem with this patch on
> kgene/for-next branch. It causes compilation break:
> 
> arch/arm/mach-exynos4/cpu.c:106: error: 'S5P_VA_AUDSS' undeclared here
(not in
> a
> function)
> make[1]: *** [arch/arm/mach-exynos4/cpu.o] Error 1
> make: *** [arch/arm/mach-exynos4] Error 2
> make: *** Waiting for unfinished jobs....
> 
> It looks that some definitions are still missing there.
> 
Oops, Marek, thanks for your pointing out :)

I applied Naveen's patch for this.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

RE: [PATCH V2 1/2] ARM: EXYNOS4: Add PCM audio support for WM8994

[Marek Szyprowski]

Hello,

I've just noticed one more problem with this patch. See my comment below.

On Thursday, April 28, 2011 3:33 AM Sangbeom Kim wrote:

> This patch add pcm audio configuration for SMDKV310 and SMDKC210.
> Platform device and pcm clock initialization code is added.
> 
> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
> Acked-by: Liam Girdwood <lrg@ti.com>
> ---
>  arch/arm/mach-exynos4/clock.c                   |  169
> ++++++++++++++++++++++-
>  arch/arm/mach-exynos4/cpu.c                     |    5 +
>  arch/arm/mach-exynos4/dev-audio.c               |    5 +
>  arch/arm/mach-exynos4/include/mach/map.h        |    3 +
>  arch/arm/mach-exynos4/include/mach/regs-audss.h |   25 ++++
>  arch/arm/mach-exynos4/mach-smdkc210.c           |    7 +
>  arch/arm/mach-exynos4/mach-smdkv310.c           |    7 +
>  arch/arm/plat-samsung/include/plat/audio.h      |    8 +
>  8 files changed, 227 insertions(+), 2 deletions(-)
>  create mode 100644 arch/arm/mach-exynos4/include/mach/regs-audss.h
> 
> diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
> index 871f9d5..77cd81f 100644
> --- a/arch/arm/mach-exynos4/clock.c
> +++ b/arch/arm/mach-exynos4/clock.c
> @@ -23,6 +23,7 @@
> 
>  #include <mach/map.h>
>  #include <mach/regs-clock.h>
> +#include <mach/regs-audss.h>
>  #include <mach/sysmmu.h>
> 
>  static struct clk clk_sclk_hdmi27m = {
> @@ -47,6 +48,31 @@ static struct clk clk_sclk_usbphy1 = {
>  	.id		= -1,
>  };
> 
> +static struct clk clk_sclk_xxti = {
> +	.name		= "sclk_usbphy1",
> +	.id		= -1,
> +};
> +
> +static struct clk clk_sclk_xusbxti = {
> +	.name		= "sclk_usbphy1",
> +	.id		= -1,
> +};
> +
> +static struct clk clk_audiocdclk0 = {
> +	.name		= "audiocdclk",
> +	.id		= 0,
> +};
> +
> +static struct clk clk_audiocdclk1 = {
> +	.name		= "audiocdclk",
> +	.id		= 1,
> +};
> +
> +static struct clk clk_audiocdclk2 = {
> +	.name		= "audiocdclk",
> +	.id		= 2,
> +};
> +
>  static int exynos4_clksrc_mask_top_ctrl(struct clk *clk, int enable)
>  {
>  	return s5p_gatectrl(S5P_CLKSRC_MASK_TOP, clk, enable);
> @@ -127,6 +153,16 @@ static int exynos4_clk_ip_perir_ctrl(struct clk *clk,
> int enable)
>  	return s5p_gatectrl(S5P_CLKGATE_IP_PERIR, clk, enable);
>  }
> 
> +static int exynos4_clksrc_mask_maudio_ctrl(struct clk *clk, int enable)
> +{
> +        return s5p_gatectrl(S5P_CLKSRC_MASK_MAUDIO, clk, enable);
> +}
> +
> +static int exynos4_clk_audss_ctrl(struct clk *clk, int enable)
> +{
> +        return s5p_gatectrl(S5P_CLKGATE_AUDSS, clk, enable);
> +}
> +
>  /* Core list of CMU_CPU side */
> 
>  static struct clksrc_clk clk_mout_apll = {
> @@ -561,6 +597,21 @@ static struct clk init_clocks_off[] = {
>  		.enable		= exynos4_clk_ip_peril_ctrl,
>  		.ctrlbit	= (1 << 27),
>  	}, {
> +		.name		= "pcm",
> +		.id		= 0,
> +		.enable		= exynos4_clk_audss_ctrl,
> +		.ctrlbit	= S5P_AUDSS_CLKGATE_PCMSPECIAL,
> +	}, {
> +		.name		= "pcm",
> +		.id		= 1,
> +		.enable		= exynos4_clk_ip_peril_ctrl,
> +		.ctrlbit	= (1 << 22),
> +	}, {
> +		.name		= "pcm",
> +		.id		= 2,
> +		.enable		= exynos4_clk_ip_peril_ctrl,
> +		.ctrlbit	= (1 << 23),
> +        }, {
>  		.name		= "fimg2d",
>  		.id		= -1,
>  		.enable		= exynos4_clk_ip_image_ctrl,
> @@ -686,6 +737,93 @@ static struct clk init_clocks_off[] = {
>  	}
>  };
> 
> +static struct clk *clkset_sclk_audio0_list[] = {
> +	[0] = &clk_audiocdclk0,
> +	[1] = NULL,
> +	[2] = &clk_sclk_hdmi27m,
> +	[3] = &clk_sclk_usbphy0,
> +	[4] = &clk_sclk_xxti,
> +	[5] = &clk_sclk_xusbxti,
> +	[6] = &clk_mout_mpll.clk,
> +	[7] = &clk_mout_epll.clk,
> +	[8] = &clk_sclk_vpll.clk,
> +};
> +
> +static struct clksrc_sources clkset_sclk_audio0 = {
> +	.sources	= clkset_sclk_audio0_list,
> +	.nr_sources	= ARRAY_SIZE(clkset_sclk_audio0_list),
> +};
> +
> +static struct clksrc_clk clk_sclk_audio0 = {
> +	.clk	= {
> +		.name		= "audio-bus",
> +		.id		= 0,
> +		.enable		= exynos4_clksrc_mask_maudio_ctrl,
> +		.ctrlbit	= (1 << 0),
> +	},
> +	.sources = &clkset_sclk_audio0,
> +	.reg_src = { .reg = S5P_CLKSRC_MAUDIO, .shift = 0, .size = 4 },
> +	.reg_div = { .reg = S5P_CLKDIV_MAUDIO, .shift = 0, .size = 4 },
> +};
> +
> +static struct clk *clkset_sclk_audio1_list[] = {
> +	[0] = &clk_audiocdclk1,
> +	[1] = NULL,
> +	[2] = &clk_sclk_hdmi27m,
> +	[3] = &clk_sclk_usbphy0,
> +	[4] = &clk_sclk_xxti,
> +	[5] = &clk_sclk_xusbxti,
> +	[6] = &clk_mout_mpll.clk,
> +	[7] = &clk_mout_epll.clk,
> +	[8] = &clk_sclk_vpll.clk,
> +};
> +
> +static struct clksrc_sources clkset_sclk_audio1 = {
> +	.sources	= clkset_sclk_audio1_list,
> +	.nr_sources	= ARRAY_SIZE(clkset_sclk_audio1_list),
> +};
> +
> +static struct clksrc_clk clk_sclk_audio1 = {
> +	.clk	= {
> +		.name		= "audio-bus",
> +		.id		= 1,
> +		.enable		= exynos4_clksrc_mask_peril1_ctrl,
> +		.ctrlbit	= (1 << 0),
> +        },
> +	.sources = &clkset_sclk_audio1,
> +	.reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 0, .size = 4 },
> +	.reg_div = { .reg = S5P_CLKDIV_PERIL4, .shift = 4, .size = 8 },
> +};
> +
> +static struct clk *clkset_sclk_audio2_list[] = {
> +	[0] = &clk_audiocdclk2,
> +	[1] = NULL,
> +	[2] = &clk_sclk_hdmi27m,
> +	[3] = &clk_sclk_usbphy0,
> +	[4] = &clk_sclk_xxti,
> +	[5] = &clk_sclk_xusbxti,
> +	[6] = &clk_mout_mpll.clk,
> +	[7] = &clk_mout_epll.clk,
> +	[8] = &clk_sclk_vpll.clk,
> +};
> +
> +static struct clksrc_sources clkset_sclk_audio2 = {
> +	.sources        = clkset_sclk_audio2_list,
> +	.nr_sources     = ARRAY_SIZE(clkset_sclk_audio2_list),
> +};
> +
> +static struct clksrc_clk clk_sclk_audio2 = {
> +	.clk	= {
> +		.name		= "audio-bus",
> +		.id		= 2,
> +		.enable		= exynos4_clksrc_mask_peril1_ctrl,
> +		.ctrlbit	= (1 << 4),
> +	},
> +	.sources = &clkset_sclk_audio2,
> +	.reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 4, .size = 4 },
> +	.reg_div = { .reg = S5P_CLKDIV_PERIL4, .shift = 16, .size = 4 },
> +};
> +
>  static struct clk init_clocks[] = {
>  	{
>  		.name		= "uart",
> @@ -1079,7 +1217,28 @@ static struct clksrc_clk clksrcs[] = {
>  			.ctrlbit	= (1 << 16),
>  		},
>  		.reg_div = { .reg = S5P_CLKDIV_FSYS3, .shift = 8, .size = 8 },
> -	}
> +	}, {
> +		.clk		= {
> +			.name		= "sclk_pcm",
> +			.id		= 0,
> +			.parent		= &clk_sclk_audio0.clk,
> +                },
> +                .reg_div = { .reg = S5P_CLKDIV_MAUDIO, .shift = 4, .size =
> 8 },
> +        }, {
> +                .clk            = {
> +                        .name           = "sclk_pcm",
> +                        .id             = 1,
> +                        .parent         = &clk_sclk_audio1.clk,
> +                },
> +                .reg_div = { .reg = S5P_CLKDIV_PERIL4, .shift = 4, .size =
> 8 },
> +        }, {
> +                .clk            = {
> +                        .name           = "sclk_pcm",
> +                        .id             = 2,
> +                        .parent         = &clk_sclk_audio2.clk,
> +                },
> +                .reg_div = { .reg = S5P_CLKDIV_PERIL4, .shift = 20, .size
> = 8 },
> +        },
>  };
> 
>  /* Clock initialization code */
> @@ -1112,6 +1271,9 @@ static struct clksrc_clk *sysclks[] = {
>  	&clk_dout_mmc2,
>  	&clk_dout_mmc3,
>  	&clk_dout_mmc4,
> +	&clk_sclk_audio0,
> +	&clk_sclk_audio1,
> +	&clk_sclk_audio2,
>  };
> 
>  static int xtal_rate;
> @@ -1191,10 +1353,13 @@ void __init_or_cpufreq exynos4_setup_clocks(void)
> 
>  	for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
>  		s3c_set_clksrc(&clksrcs[ptr], true);
> +
> +	clk_audiocdclk0.rate = PCM_EXTCLK0;

> +	clk_set_parent(&clk_sclk_audio0.clk, &clk_audiocdclk0);

The above line changes clocks configuration on the board, what might have some
side effects. For example on Nuri board this kill suspend/resume. Setting
initial parents for global clocks should be done in the bootloader not the
kernel startup code.

>  }
> 
>  static struct clk *clks[] __initdata = {
> -	/* Nothing here yet */
> +	&clk_audiocdclk0,
>  };
> 
>  void __init exynos4_register_clocks(void)

(snipped)

Best regards
-- 
Marek Szyprowski
Samsung Poland R&D Center