From: Martin Schwidefsky <schwidefsky@de.ibm.com>
To: Rabin Vincent <rabin@rab.in>
Cc: linux-arch@vger.kernel.org, Steven Rostedt <rostedt@goodmis.org>,
Frederic Weisbecker <fweisbec@gmail.com>,
Ingo Molnar <mingo@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
"H. Peter Anvin" <hpa@zytor.com>, Tony Luck <tony.luck@intel.com>,
Fenghua Yu <fenghua.yu@intel.com>,
Russell King <linux@arm.linux.org.uk>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [patch 0/4] [RFC] mcount address adjustment
Date: Thu, 12 May 2011 11:24:54 +0200 [thread overview]
Message-ID: <20110512112454.2fa7e6d6@mschwide> (raw)
In-Reply-To: <BANLkTi=6FLtzXwg1yLAkLhP4GA4apSQ46g@mail.gmail.com>
On Wed, 11 May 2011 22:53:55 +0530
Rabin Vincent <rabin@rab.in> wrote:
> On Tue, May 10, 2011 at 13:40, Martin Schwidefsky
> <schwidefsky@de.ibm.com> wrote:
> > That leaves arm as the last remaining architecture with a non trivial
> > ftrace_call_adjust function. There the least significant bit is removed
> > from the address with an and operation. The comment says this is done
> > for Thumb-2. This implies that for Thumb-1 the offset is 0 and for
> > Thumb-2 the offset is -1, correct?
>
> ARM supports building the kernel using either the ARM instruction set or
> the Thumb-2 instruction set. The kernel cannot be built with the
> "Thumb-1" instruction set (btw usually referred to as just Thumb).
>
> Thumb-2 via recordmcount.pl needs the clearing of the lsb because the
> relocation (R_ARM_ABS32) that gets used for the assembly file
> that recordmcount.pl generates and assembles dictates that the lsb be
> set if the target symbol is Thumb/Thumb-2 function. mcount_adjust would
> not help here since the ORing is done later, when the relocation is
> applied.
Hmm, from what I can make out the C version of recordmcount uses R_ARM_ABS32
as well.
> Thumb-2 via recordmcount.c does not need the clearing of the lsb in
> ftrace_call_adjust.
So the clearing of the lsb is only required if the recordmcount.pl script
is used?
> Building with the ARM instruction set also does not need the clearing
> of the lsb.
Who does the ORing? I can't find anything in recordmount.pl/recordmcount.c
which looks like doing an OR, does the assembler do that based on the
symbol type?
> > Thumb-2 the offset is -1, correct? If there is a way to distinguish
> > the two targets in recordmcount at compile time we could convert arm
> > as well. Which would allow us to remove the ftrace_call_adjust function.
>
> To remove ftrace_call_adjust, we could either deprecate the
> recordmcount.pl usage for ARM (you already have to edit the Kconfig to
> use it) or modify it to generate specific relocations explicitly instead
> of using the assembler data directives.
Hmm, it would be a desirable property if the C version and the pearl
version of recordmcount would do the same. Or we could remove the arm
support from the pearl script, the C version is faster anyway.
--
blue skies,
Martin.
"Reality continues to ruin my life." - Calvin.
WARNING: multiple messages have this Message-ID (diff)
From: schwidefsky@de.ibm.com (Martin Schwidefsky)
To: linux-arm-kernel@lists.infradead.org
Subject: [patch 0/4] [RFC] mcount address adjustment
Date: Thu, 12 May 2011 11:24:54 +0200 [thread overview]
Message-ID: <20110512112454.2fa7e6d6@mschwide> (raw)
In-Reply-To: <BANLkTi=6FLtzXwg1yLAkLhP4GA4apSQ46g@mail.gmail.com>
On Wed, 11 May 2011 22:53:55 +0530
Rabin Vincent <rabin@rab.in> wrote:
> On Tue, May 10, 2011 at 13:40, Martin Schwidefsky
> <schwidefsky@de.ibm.com> wrote:
> > That leaves arm as the last remaining architecture with a non trivial
> > ftrace_call_adjust function. There the least significant bit is removed
> > from the address with an and operation. The comment says this is done
> > for Thumb-2. This implies that for Thumb-1 the offset is 0 and for
> > Thumb-2 the offset is -1, correct?
>
> ARM supports building the kernel using either the ARM instruction set or
> the Thumb-2 instruction set. The kernel cannot be built with the
> "Thumb-1" instruction set (btw usually referred to as just Thumb).
>
> Thumb-2 via recordmcount.pl needs the clearing of the lsb because the
> relocation (R_ARM_ABS32) that gets used for the assembly file
> that recordmcount.pl generates and assembles dictates that the lsb be
> set if the target symbol is Thumb/Thumb-2 function. mcount_adjust would
> not help here since the ORing is done later, when the relocation is
> applied.
Hmm, from what I can make out the C version of recordmcount uses R_ARM_ABS32
as well.
> Thumb-2 via recordmcount.c does not need the clearing of the lsb in
> ftrace_call_adjust.
So the clearing of the lsb is only required if the recordmcount.pl script
is used?
> Building with the ARM instruction set also does not need the clearing
> of the lsb.
Who does the ORing? I can't find anything in recordmount.pl/recordmcount.c
which looks like doing an OR, does the assembler do that based on the
symbol type?
> > Thumb-2 the offset is -1, correct? If there is a way to distinguish
> > the two targets in recordmcount at compile time we could convert arm
> > as well. Which would allow us to remove the ftrace_call_adjust function.
>
> To remove ftrace_call_adjust, we could either deprecate the
> recordmcount.pl usage for ARM (you already have to edit the Kconfig to
> use it) or modify it to generate specific relocations explicitly instead
> of using the assembler data directives.
Hmm, it would be a desirable property if the C version and the pearl
version of recordmcount would do the same. Or we could remove the arm
support from the pearl script, the C version is faster anyway.
--
blue skies,
Martin.
"Reality continues to ruin my life." - Calvin.
next prev parent reply other threads:[~2011-05-12 9:25 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-05-10 8:10 [patch 0/4] [RFC] mcount address adjustment Martin Schwidefsky
2011-05-10 8:10 ` Martin Schwidefsky
2011-05-10 8:10 ` [patch 1/4] recordmcount " Martin Schwidefsky
2011-05-10 8:10 ` Martin Schwidefsky
2011-05-10 8:10 ` [patch 2/4] x86 mcount offset calculation Martin Schwidefsky
2011-05-10 8:10 ` Martin Schwidefsky
2011-05-10 8:10 ` [patch 3/4] ia64 " Martin Schwidefsky
2011-05-10 8:10 ` Martin Schwidefsky
2011-05-16 18:58 ` Steven Rostedt
2011-05-16 19:17 ` Luck, Tony
2011-05-16 19:17 ` Luck, Tony
2011-05-16 20:41 ` Steven Rostedt
2011-05-17 8:04 ` Martin Schwidefsky
2011-05-17 11:20 ` Steven Rostedt
2011-05-10 8:10 ` [patch 4/4] s390 " Martin Schwidefsky
2011-05-10 8:10 ` Martin Schwidefsky
2011-05-11 17:23 ` [patch 0/4] [RFC] mcount address adjustment Rabin Vincent
2011-05-11 17:23 ` Rabin Vincent
2011-05-12 9:24 ` Martin Schwidefsky [this message]
2011-05-12 9:24 ` Martin Schwidefsky
2011-05-12 13:30 ` Rabin Vincent
2011-05-12 13:30 ` Rabin Vincent
2011-05-16 12:57 ` Dave Martin
2011-05-16 12:57 ` Dave Martin
2011-05-16 14:28 ` Steven Rostedt
2011-05-16 14:28 ` Steven Rostedt
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