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From: Alex Hacker <hacker@epn.ru>
To: ath9k-devel@lists.ath9k.org
Subject: [ath9k-devel] MCS16-MCS19 HGI.
Date: Fri, 13 May 2011 19:45:32 +0600	[thread overview]
Message-ID: <20110513134532.GA27551@infinet.ru> (raw)
In-Reply-To: <BANLkTi=GM8GXtAWxAshDOp7UUhWCVaehNQ@mail.gmail.com>

On Fri, May 13, 2011 at 05:18:37PM +0530, Mohammed Shafi wrote:
> this is my theory, it may be  wrong,
> all those rates in the rate table are marked as invalid and also they
> are HT20 rates. also not hardwares support HT20 SGI
> we have this check
>   if (AR_SREV_9287_11_OR_LATER(ah) || AR_SREV_9271(ah))
>                 pCap->hw_caps |= ATH9K_HW_CAP_SGI_20;
> 
> so may be to avoid the rate control algorithm selecting those rates
> this might had be done.

Yes, I know that the AR9280 does not support SGI rates in HT20 mode.
I'm not about this little bit. The current ath9k rate table in rc.c contains
3 spatial streams rates (MCS16-MCS23) for newer three chain AR93xx chips. This table
includes information about MCSs 16-23 SGI and 20-23 HGI but not MCSs 16-19 HGI this
is true for HT20 and HT40. Yes, some of these rates marked as invalid but present.
I can not explain this fact for myself. May be Senthil baboo can help me?

 Best regards,
 Alex.
 

  reply	other threads:[~2011-05-13 13:45 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-05-13 11:04 [ath9k-devel] MCS16-MCS19 HGI Alex Hacker
2011-05-13 11:48 ` Mohammed Shafi
2011-05-13 13:45   ` Alex Hacker [this message]
2011-05-13 17:15     ` Alex Hacker

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