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From: Mark Brown <broonie@opensource.wolfsonmicro.com>
To: Dong Aisheng-B29396 <B29396@freescale.com>
Cc: "alsa-devel@alsa-project.org" <alsa-devel@alsa-project.org>,
	"w.sang@pengutronix.de" <w.sang@pengutronix.de>,
	"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>, "lrg@ti.com" <lrg@ti.com>
Subject: Re: [PATCH 1/1] ASoC: core: cache index fix
Date: Wed, 3 Aug 2011 00:27:13 +0900	[thread overview]
Message-ID: <20110802152712.GC25884@opensource.wolfsonmicro.com> (raw)
In-Reply-To: <65EE16ACC360FA4D99C96DC085B3F7721F4616@039-SN1MPN1-002.039d.mgd.msft.net>

On Tue, Aug 02, 2011 at 01:17:12PM +0000, Dong Aisheng-B29396 wrote:

> For rbtree, i tried that only changed snd_soc_rbtree_cache_init as follows
> Could work. Then rbtree_cache_read/write do not need to care about step.
> This could reduce many code changes and complexity.
> But the disadvantage is that the rbtree cache may not be able to find a
> adjacent register in the same block if the reg step is 2.
> However it works.
> Do you think this is acceptable?

No, like I've been saying the rbtree should have *no* visibility of step
sizes.  This is exactly the sort of complexity and fragility that I've
been raising as an issue.

WARNING: multiple messages have this Message-ID (diff)
From: broonie@opensource.wolfsonmicro.com (Mark Brown)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/1] ASoC: core: cache index fix
Date: Wed, 3 Aug 2011 00:27:13 +0900	[thread overview]
Message-ID: <20110802152712.GC25884@opensource.wolfsonmicro.com> (raw)
In-Reply-To: <65EE16ACC360FA4D99C96DC085B3F7721F4616@039-SN1MPN1-002.039d.mgd.msft.net>

On Tue, Aug 02, 2011 at 01:17:12PM +0000, Dong Aisheng-B29396 wrote:

> For rbtree, i tried that only changed snd_soc_rbtree_cache_init as follows
> Could work. Then rbtree_cache_read/write do not need to care about step.
> This could reduce many code changes and complexity.
> But the disadvantage is that the rbtree cache may not be able to find a
> adjacent register in the same block if the reg step is 2.
> However it works.
> Do you think this is acceptable?

No, like I've been saying the rbtree should have *no* visibility of step
sizes.  This is exactly the sort of complexity and fragility that I've
been raising as an issue.

  reply	other threads:[~2011-08-02 15:27 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-08-01 11:38 [PATCH 1/1] ASoC: core: cache index fix Dong Aisheng
2011-08-01 11:38 ` Dong Aisheng
2011-08-01 11:51 ` Mark Brown
2011-08-01 11:51   ` Mark Brown
2011-08-02  8:03   ` Dong Aisheng-B29396
2011-08-02  8:03     ` Dong Aisheng-B29396
2011-08-02  8:38     ` Mark Brown
2011-08-02  8:38       ` Mark Brown
2011-08-02  9:41       ` Dong Aisheng-B29396
2011-08-02  9:41         ` Dong Aisheng-B29396
2011-08-02 10:34         ` Takashi Iwai
2011-08-02 10:34           ` [alsa-devel] " Takashi Iwai
2011-08-02 10:55           ` Dong Aisheng-B29396
2011-08-02 10:55             ` [alsa-devel] " Dong Aisheng-B29396
2011-08-02 11:09             ` Takashi Iwai
2011-08-02 11:09               ` [alsa-devel] " Takashi Iwai
2011-08-02 11:15               ` Dong Aisheng-B29396
2011-08-02 11:15                 ` [alsa-devel] " Dong Aisheng-B29396
2011-08-02 12:10                 ` Takashi Iwai
2011-08-02 12:10                   ` [alsa-devel] " Takashi Iwai
2011-08-02 12:29                   ` Dong Aisheng-B29396
2011-08-02 12:29                     ` [alsa-devel] " Dong Aisheng-B29396
2011-08-02 12:52                     ` Takashi Iwai
2011-08-02 12:52                       ` [alsa-devel] " Takashi Iwai
2011-08-02 15:48                       ` Mark Brown
2011-08-02 15:48                         ` [alsa-devel] " Mark Brown
2011-08-02 16:13                         ` Takashi Iwai
2011-08-02 16:13                           ` [alsa-devel] " Takashi Iwai
2011-08-02 16:40                           ` Mark Brown
2011-08-02 16:40                             ` [alsa-devel] " Mark Brown
2011-08-02 18:06                             ` Takashi Iwai
2011-08-02 18:06                               ` [alsa-devel] " Takashi Iwai
2011-08-03  5:23                               ` Mark Brown
2011-08-03  5:23                                 ` Mark Brown
2011-08-03  6:20                                 ` Takashi Iwai
2011-08-03  6:20                                   ` Takashi Iwai
2011-08-03  9:00                                   ` Mark Brown
2011-08-03  9:00                                     ` [alsa-devel] " Mark Brown
2011-08-03  7:03                                 ` Dong Aisheng-B29396
2011-08-03  7:03                                   ` [alsa-devel] " Dong Aisheng-B29396
2011-08-03  7:39                             ` Dong Aisheng-B29396
2011-08-03  7:39                               ` [alsa-devel] " Dong Aisheng-B29396
2011-08-03  9:31                               ` Mark Brown
2011-08-03  9:31                                 ` [alsa-devel] " Mark Brown
2011-08-03 11:11                                 ` Dong Aisheng-B29396
2011-08-03 11:11                                   ` [alsa-devel] " Dong Aisheng-B29396
2011-08-06 19:01                         ` preetam
2011-08-07  3:02                           ` Mark Brown
2011-08-07  4:12                             ` preetam
2011-08-07  4:18                               ` preetam
2011-08-07  9:51                                 ` Mark Brown
2011-08-02 12:58           ` Mark Brown
2011-08-02 12:58             ` [alsa-devel] " Mark Brown
2011-08-02 13:17         ` Dong Aisheng-B29396
2011-08-02 13:17           ` Dong Aisheng-B29396
2011-08-02 15:27           ` Mark Brown [this message]
2011-08-02 15:27             ` Mark Brown
2011-08-02 16:05         ` Mark Brown
2011-08-02 16:05           ` Mark Brown
2011-08-02  9:51       ` Wolfram Sang
2011-08-02  9:51         ` Wolfram Sang
2011-08-02 10:38         ` Takashi Iwai
2011-08-02 10:38           ` [alsa-devel] " Takashi Iwai
2011-08-02 15:29         ` Mark Brown
2011-08-02 15:29           ` Mark Brown

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