* [PATCH 1/2] MIPS: Add more CPU identifiers for Octeon II CPUs.
@ 2011-09-20 22:49 David Daney
2011-09-20 22:49 ` [PATCH 2/2] MIPS: Add probes for more " David Daney
2011-09-23 23:49 ` [PATCH 1/2] MIPS: Add more CPU identifiers for " Ralf Baechle
0 siblings, 2 replies; 4+ messages in thread
From: David Daney @ 2011-09-20 22:49 UTC (permalink / raw)
To: linux-mips, ralf; +Cc: David Daney
The CPU identifiers for cn68XX, cn66XX and cn61XX are known, so add
them.
Signed-off-by: David Daney <david.daney@cavium.com>
---
arch/mips/include/asm/cpu.h | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 5f95a4b..2f7f418 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -135,6 +135,9 @@
#define PRID_IMP_CAVIUM_CN50XX 0x0600
#define PRID_IMP_CAVIUM_CN52XX 0x0700
#define PRID_IMP_CAVIUM_CN63XX 0x9000
+#define PRID_IMP_CAVIUM_CN68XX 0x9100
+#define PRID_IMP_CAVIUM_CN66XX 0x9200
+#define PRID_IMP_CAVIUM_CN61XX 0x9300
/*
* These are the PRID's for when 23:16 == PRID_COMP_INGENIC
--
1.7.2.3
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] MIPS: Add probes for more Octeon II CPUs.
2011-09-20 22:49 [PATCH 1/2] MIPS: Add more CPU identifiers for Octeon II CPUs David Daney
@ 2011-09-20 22:49 ` David Daney
2011-09-23 23:50 ` Ralf Baechle
2011-09-23 23:49 ` [PATCH 1/2] MIPS: Add more CPU identifiers for " Ralf Baechle
1 sibling, 1 reply; 4+ messages in thread
From: David Daney @ 2011-09-20 22:49 UTC (permalink / raw)
To: linux-mips, ralf; +Cc: David Daney
Detect cn61XX, cn66XX and cn68XX CPUs in cpu_probe_cavium().
Signed-off-by: David Daney <david.daney@cavium.com>
---
arch/mips/kernel/cpu-probe.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index ebc0cd2..aa327a7 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -978,7 +978,10 @@ static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu)
platform:
set_elf_platform(cpu, "octeon");
break;
+ case PRID_IMP_CAVIUM_CN61XX:
case PRID_IMP_CAVIUM_CN63XX:
+ case PRID_IMP_CAVIUM_CN66XX:
+ case PRID_IMP_CAVIUM_CN68XX:
c->cputype = CPU_CAVIUM_OCTEON2;
__cpu_name[cpu] = "Cavium Octeon II";
set_elf_platform(cpu, "octeon2");
--
1.7.2.3
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] MIPS: Add more CPU identifiers for Octeon II CPUs.
2011-09-20 22:49 [PATCH 1/2] MIPS: Add more CPU identifiers for Octeon II CPUs David Daney
2011-09-20 22:49 ` [PATCH 2/2] MIPS: Add probes for more " David Daney
@ 2011-09-23 23:49 ` Ralf Baechle
1 sibling, 0 replies; 4+ messages in thread
From: Ralf Baechle @ 2011-09-23 23:49 UTC (permalink / raw)
To: David Daney; +Cc: linux-mips
Queued for 3.2. Thanks,
Ralf
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2011-09-23 23:50 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2011-09-20 22:49 [PATCH 1/2] MIPS: Add more CPU identifiers for Octeon II CPUs David Daney
2011-09-20 22:49 ` [PATCH 2/2] MIPS: Add probes for more " David Daney
2011-09-23 23:50 ` Ralf Baechle
2011-09-23 23:49 ` [PATCH 1/2] MIPS: Add more CPU identifiers for " Ralf Baechle
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