* Re: [lm-sensors] adjusting /etc/sensors.conf for a dual processor
2011-09-24 12:27 [lm-sensors] adjusting /etc/sensors.conf for a dual processor Audio Phile
@ 2011-09-24 14:51 ` Guenter Roeck
2011-09-24 15:19 ` Audio Phile
` (6 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Guenter Roeck @ 2011-09-24 14:51 UTC (permalink / raw)
To: lm-sensors
On Sat, Sep 24, 2011 at 08:27:30AM -0400, Audio Phile wrote:
> I'd like to get my cores from the sensors output to be consistently numbered
> (i.e. core0-core7) for a dual xeon motherboard (HP Z600 workstation). Here is
> what the output looks like currently. Anyone have experience with this?
>
> $ sensors
> coretemp-isa-0000
> Adapter: ISA adapter
> Core 0: +65.0 C (high = +85.0 C, crit = +95.0 C)
> Core 1: +65.0 C (high = +85.0 C, crit = +95.0 C)
> Core 9: +66.0 C (high = +85.0 C, crit = +95.0 C)
> Core 10: +66.0 C (high = +85.0 C, crit = +95.0 C)
>
> coretemp-isa-0004
> Adapter: ISA adapter
> Core 0: +54.0 C (high = +85.0 C, crit = +95.0 C)
> Core 1: +56.0 C (high = +85.0 C, crit = +95.0 C)
> Core 9: +60.0 C (high = +85.0 C, crit = +95.0 C)
> Core 10: +61.0 C (high = +85.0 C, crit = +95.0 C)
>
You can add information to /etc/sensors3.conf and pick any labels you like.
First use "sensors -u coretemp-isa-000" and "sensors -u coretemp-isa-004"
to get the attribute file names, then add something like the following to
/etc/sensors3.conf.
chip "coretemp-isa-000"
label temp2 mytemp
label temp3 yourtemp
label temp4 randomtemp
Guenter
_______________________________________________
lm-sensors mailing list
lm-sensors@lm-sensors.org
http://lists.lm-sensors.org/mailman/listinfo/lm-sensors
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [lm-sensors] adjusting /etc/sensors.conf for a dual processor
2011-09-24 12:27 [lm-sensors] adjusting /etc/sensors.conf for a dual processor Audio Phile
2011-09-24 14:51 ` Guenter Roeck
@ 2011-09-24 15:19 ` Audio Phile
2011-09-24 15:51 ` Jean Delvare
` (5 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Audio Phile @ 2011-09-24 15:19 UTC (permalink / raw)
To: lm-sensors
Thank you for the suggestion, Guenter. Unfortunately, I think I lack the imagination to turn this output into something useful. For example, consider below, the Cores are still numbers 0, 1, 9, 10 for the
"coretemp-isa-0000" sensor and the same for the "coretemp-isa-0004" sensor. How can I renumber them so that:
coretemp-isa-0000
Core 0 --> Core 0
Core1 --> Core 1
Core 9 --> Core 2
Core 10 --> Core 3
coretemp-isa-0004
Core 0 --> Core 4
Core1 --> Core 5
Core 9 --> Core 6
Core 10 --> Core 7
Does my question make sense? Thanks again!
$ sensors -u coretemp-isa-0000
coretemp-isa-0000
Adapter: ISA adapter
Core 0:
temp2_input: 61.000
temp2_max: 85.000
temp2_crit: 95.000
temp2_crit_alarm: 0.000
Core 1:
temp3_input: 61.000
temp3_max: 85.000
temp3_crit: 95.000
temp3_crit_alarm: 0.000
Core 9:
temp11_input: 62.000
temp11_max: 85.000
temp11_crit: 95.000
Core 10:
temp12_input: 63.000
temp12_max: 85.000
temp12_crit: 95.000
$ sensors -u coretemp-isa-0004
coretemp-isa-0004
Adapter: ISA adapter
Core 0:
temp2_input: 53.000
temp2_max: 85.000
temp2_crit: 95.000
temp2_crit_alarm: 0.000
Core 1:
temp3_input: 54.000
temp3_max: 85.000
temp3_crit: 95.000
temp3_crit_alarm: 0.000
Core 9:
temp11_input: 59.000
temp11_max: 85.000
temp11_crit: 95.000
Core 10:
temp12_input: 59.000
temp12_max: 85.000
temp12_crit: 95.000
________________________________
From: Guenter Roeck <guenter.roeck@ericsson.com>
To: Audio Phile <da_audiophile@yahoo.com>
Cc: "lm-sensors@lm-sensors.org" <lm-sensors@lm-sensors.org>
Sent: Saturday, September 24, 2011 10:51 AM
Subject: Re: [lm-sensors] adjusting /etc/sensors.conf for a dual processor machine
On Sat, Sep 24, 2011 at 08:27:30AM -0400, Audio Phile wrote:
> I'd like to get my cores from the sensors output to be consistently numbered
> (i.e. core0-core7) for a dual xeon motherboard (HP Z600 workstation). Here is
> what the output looks like currently. Anyone have experience with this?
>
> $ sensors
> coretemp-isa-0000
> Adapter: ISA adapter
> Core 0: +65.0 C (high = +85.0 C, crit = +95.0 C)
> Core 1: +65.0 C (high = +85.0 C, crit = +95.0 C)
> Core 9: +66.0 C (high = +85.0 C, crit = +95.0 C)
> Core 10: +66.0 C (high = +85.0 C, crit = +95.0 C)
>
> coretemp-isa-0004
> Adapter: ISA adapter
> Core 0: +54.0 C (high = +85.0 C, crit = +95.0 C)
> Core 1: +56.0 C (high = +85.0 C, crit = +95.0 C)
> Core 9: +60.0 C (high = +85.0 C, crit = +95.0 C)
> Core 10: +61.0 C (high = +85.0 C, crit = +95.0 C)
>
You can add information to /etc/sensors3.conf and pick any labels you like.
First use "sensors -u coretemp-isa-000" and "sensors -u coretemp-isa-004"
to get the attribute file names, then add something like the following to
/etc/sensors3.conf.
chip "coretemp-isa-000"
label temp2 mytemp
label temp3 yourtemp
label temp4 randomtemp
Guenter
_______________________________________________
lm-sensors mailing list
lm-sensors@lm-sensors.org
http://lists.lm-sensors.org/mailman/listinfo/lm-sensors
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [lm-sensors] adjusting /etc/sensors.conf for a dual processor
2011-09-24 12:27 [lm-sensors] adjusting /etc/sensors.conf for a dual processor Audio Phile
2011-09-24 14:51 ` Guenter Roeck
2011-09-24 15:19 ` Audio Phile
@ 2011-09-24 15:51 ` Jean Delvare
2011-09-24 16:07 ` Audio Phile
` (4 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Jean Delvare @ 2011-09-24 15:51 UTC (permalink / raw)
To: lm-sensors
Hi,
Please don't top-post.
On Sat, 24 Sep 2011 08:19:34 -0700 (PDT), Audio Phile wrote:
> Thank you for the suggestion, Guenter. Unfortunately, I think I lack the imagination to turn this output into something useful. For example, consider below, the Cores are still numbers 0, 1, 9, 10 for the
> "coretemp-isa-0000" sensor and the same for the "coretemp-isa-0004" sensor. How can I renumber them so that:
Which 'output" are you talking about? Guenter gave you lines to put in
a configuration file.
> coretemp-isa-0000
> Core 0 --> Core 0
> Core1 --> Core 1
>
> Core 9 --> Core 2
>
> Core 10 --> Core 3
>
> coretemp-isa-0004
> Core 0 --> Core 4
>
> Core1 --> Core 5
>
> Core 9 --> Core 6
>
> Core 10 --> Core 7
>
> Does my question make sense? Thanks again!
The original core numbering is very odd to start with. Not the fact
that core numbers are reused, this is as expected. What's odd is the
jump from 1 to 9. I seem to remember a similar case being reported a
few weeks or months ago. Can you attach the contents of /proc/cpuinfo?
> $ sensors -u coretemp-isa-0000
> coretemp-isa-0000
> Adapter: ISA adapter
> Core 0:
> temp2_input: 61.000
> temp2_max: 85.000
> temp2_crit: 95.000
> temp2_crit_alarm: 0.000
> Core 1:
> temp3_input: 61.000
> temp3_max: 85.000
> temp3_crit: 95.000
> temp3_crit_alarm: 0.000
> Core 9:
> temp11_input: 62.000
> temp11_max: 85.000
> temp11_crit: 95.000
> Core 10:
> temp12_input: 63.000
> temp12_max: 85.000
> temp12_crit: 95.000
>
> $ sensors -u coretemp-isa-0004
> coretemp-isa-0004
> Adapter: ISA adapter
> Core 0:
> temp2_input: 53.000
> temp2_max: 85.000
> temp2_crit: 95.000
> temp2_crit_alarm: 0.000
> Core 1:
> temp3_input: 54.000
> temp3_max: 85.000
> temp3_crit: 95.000
> temp3_crit_alarm: 0.000
> Core 9:
> temp11_input: 59.000
> temp11_max: 85.000
> temp11_crit: 95.000
> Core 10:
> temp12_input: 59.000
> temp12_max: 85.000
> temp12_crit: 95.000
As Guenter's advice was apparently not clear enough for you, I'll try
to be more expliti. Create file /etc/sensors.d/cores.conf and put the
following statements in it:
chip "coretemp-isa-0000"
label temp2 "Core 0"
label temp3 "Core 1"
label temp11 "Core 2"
label temp12 "Core 3"
chip "coretemp-isa-0004"
label temp2 "Core 4"
label temp3 "Core 5"
label temp11 "Core 6"
label temp12 "Core 7"
This should lead to the "sensors" output you expect (which makes little
sense to me but really that's up to you.)
--
Jean Delvare
_______________________________________________
lm-sensors mailing list
lm-sensors@lm-sensors.org
http://lists.lm-sensors.org/mailman/listinfo/lm-sensors
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [lm-sensors] adjusting /etc/sensors.conf for a dual processor
2011-09-24 12:27 [lm-sensors] adjusting /etc/sensors.conf for a dual processor Audio Phile
` (2 preceding siblings ...)
2011-09-24 15:51 ` Jean Delvare
@ 2011-09-24 16:07 ` Audio Phile
2011-09-24 16:10 ` Audio Phile
` (3 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Audio Phile @ 2011-09-24 16:07 UTC (permalink / raw)
To: lm-sensors
> Create file /etc/sensors.d/cores.conf and put the
> following statements in it:
>
> chip "coretemp-isa-0000"
>
> label temp2 "Core 0"
> label temp3 "Core 1"
> label temp11 "Core 2"
> label temp12 "Core 3"
>
> chip "coretemp-isa-0004"
>
> label temp2 "Core 4"
> label temp3 "Core 5"
> label temp11 "Core 6"
> label temp12 "Core 7"
Jean - this is perfect and does exactly what I wanted. Thank you for taking the time to provide the solution for me :)
> The original core numbering is very odd to start with. Not the fact
> that core numbers are reused, this is as expected. What's odd is the
> jump from 1 to 9. I seem to remember a similar case being reported a
> few weeks or months ago. Can you attach the contents of /proc/cpuinfo?
Glad to but I don't see anything unusual here... perhaps a bug with lm-sensors?
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2395.000
cache size : 12288 KB
physical id : 0
siblings : 8
core id : 0
cpu cores : 4
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4789.57
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 1
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2395.000
cache size : 12288 KB
physical id : 0
siblings : 8
core id : 1
cpu cores : 4
apicid : 2
initial apicid : 2
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4789.21
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 2
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2395.000
cache size : 12288 KB
physical id : 0
siblings : 8
core id : 9
cpu cores : 4
apicid : 18
initial apicid : 18
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4789.20
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 3
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2395.000
cache size : 12288 KB
physical id : 0
siblings : 8
core id : 10
cpu cores : 4
apicid : 20
initial apicid : 20
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4789.20
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 4
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2395.000
cache size : 12288 KB
physical id : 1
siblings : 8
core id : 0
cpu cores : 4
apicid : 32
initial apicid : 32
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4789.24
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 5
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2395.000
cache size : 12288 KB
physical id : 1
siblings : 8
core id : 1
cpu cores : 4
apicid : 34
initial apicid : 34
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4789.24
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 6
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2395.000
cache size : 12288 KB
physical id : 1
siblings : 8
core id : 9
cpu cores : 4
apicid : 50
initial apicid : 50
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4789.25
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 7
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2395.000
cache size : 12288 KB
physical id : 1
siblings : 8
core id : 10
cpu cores : 4
apicid : 52
initial apicid : 52
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4789.24
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 8
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2395.000
cache size : 12288 KB
physical id : 0
siblings : 8
core id : 0
cpu cores : 4
apicid : 1
initial apicid : 1
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4789.23
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 9
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2395.000
cache size : 12288 KB
physical id : 0
siblings : 8
core id : 1
cpu cores : 4
apicid : 3
initial apicid : 3
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4789.25
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 10
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2395.000
cache size : 12288 KB
physical id : 0
siblings : 8
core id : 9
cpu cores : 4
apicid : 19
initial apicid : 19
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4789.25
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 11
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2395.000
cache size : 12288 KB
physical id : 0
siblings : 8
core id : 10
cpu cores : 4
apicid : 21
initial apicid : 21
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4789.26
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 12
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2395.000
cache size : 12288 KB
physical id : 1
siblings : 8
core id : 0
cpu cores : 4
apicid : 33
initial apicid : 33
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4789.24
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 13
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2395.000
cache size : 12288 KB
physical id : 1
siblings : 8
core id : 1
cpu cores : 4
apicid : 35
initial apicid : 35
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4789.24
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 14
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2395.000
cache size : 12288 KB
physical id : 1
siblings : 8
core id : 9
cpu cores : 4
apicid : 51
initial apicid : 51
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4789.24
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 15
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2395.000
cache size : 12288 KB
physical id : 1
siblings : 8
core id : 10
cpu cores : 4
apicid : 53
initial apicid : 53
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4789.23
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
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^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [lm-sensors] adjusting /etc/sensors.conf for a dual processor
2011-09-24 12:27 [lm-sensors] adjusting /etc/sensors.conf for a dual processor Audio Phile
` (3 preceding siblings ...)
2011-09-24 16:07 ` Audio Phile
@ 2011-09-24 16:10 ` Audio Phile
2011-09-24 17:01 ` Jean Delvare
` (2 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Audio Phile @ 2011-09-24 16:10 UTC (permalink / raw)
To: lm-sensors
Ah! I didn't read the output carefully. If you notice, the "core id" is what is causing this, nothing wrong with lm-sensors here. We can I think blame HP. Next question would be how to get this on to the lm-sensors wiki so that other HP Z600 users can make this addition to their configs if necessary.
$ grep "core id" cpuinfo.txt
core id : 0
core id : 1
core id : 9
core id : 10
core id : 0
core id : 1
core id : 9
core id : 10
core id : 0
core id : 1
core id : 9
core id : 10
core id : 0
core id : 1
core id : 9
core id : 10
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^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [lm-sensors] adjusting /etc/sensors.conf for a dual processor
2011-09-24 12:27 [lm-sensors] adjusting /etc/sensors.conf for a dual processor Audio Phile
` (4 preceding siblings ...)
2011-09-24 16:10 ` Audio Phile
@ 2011-09-24 17:01 ` Jean Delvare
2011-09-24 17:42 ` Audio Phile
2011-09-24 18:04 ` Guenter Roeck
7 siblings, 0 replies; 9+ messages in thread
From: Jean Delvare @ 2011-09-24 17:01 UTC (permalink / raw)
To: lm-sensors
On Sat, 24 Sep 2011 09:10:17 -0700 (PDT), Audio Phile wrote:
> Ah! I didn't read the output carefully. If you notice, the "core id" is what is causing this, nothing wrong with lm-sensors here.
Indeed, the unexpected core IDs come straight from /proc/cpuinfo.
> We can I think blame HP. Next question would be how to get this on to the lm-sensors wiki so that other HP Z600 users can make this addition to their configs if necessary.
What makes you think the system vendor has anything to do with this? I
would expect the core IDs to be reported by the CPU itself (someone
please correct me if I'm wrong.)
> $ grep "core id" cpuinfo.txt
> core id : 0
> core id : 1
> core id : 9
> core id : 10
> core id : 0
> core id : 1
> core id : 9
> core id : 10
> core id : 0
> core id : 1
> core id : 9
> core id : 10
> core id : 0
> core id : 1
> core id : 9
> core id : 10
I have no idea if the CPU is just reporting strange values or if the
kernel is somehow misbehaving.
--
Jean Delvare
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^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [lm-sensors] adjusting /etc/sensors.conf for a dual processor
2011-09-24 12:27 [lm-sensors] adjusting /etc/sensors.conf for a dual processor Audio Phile
` (5 preceding siblings ...)
2011-09-24 17:01 ` Jean Delvare
@ 2011-09-24 17:42 ` Audio Phile
2011-09-24 18:04 ` Guenter Roeck
7 siblings, 0 replies; 9+ messages in thread
From: Audio Phile @ 2011-09-24 17:42 UTC (permalink / raw)
To: lm-sensors
Nor do I. Main thing is that the problem is now solved and others who happen across this thread will find the solution. I'd like to post this to the wiki but membership is closed :/
> I have no idea if the CPU is just reporting strange values or if the
> kernel is somehow misbehaving.
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^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [lm-sensors] adjusting /etc/sensors.conf for a dual processor
2011-09-24 12:27 [lm-sensors] adjusting /etc/sensors.conf for a dual processor Audio Phile
` (6 preceding siblings ...)
2011-09-24 17:42 ` Audio Phile
@ 2011-09-24 18:04 ` Guenter Roeck
7 siblings, 0 replies; 9+ messages in thread
From: Guenter Roeck @ 2011-09-24 18:04 UTC (permalink / raw)
To: lm-sensors
On Sat, Sep 24, 2011 at 01:01:51PM -0400, Jean Delvare wrote:
> On Sat, 24 Sep 2011 09:10:17 -0700 (PDT), Audio Phile wrote:
> > Ah! I didn't read the output carefully. If you notice, the "core id" is what is causing this, nothing wrong with lm-sensors here.
>
> Indeed, the unexpected core IDs come straight from /proc/cpuinfo.
>
> > We can I think blame HP. Next question would be how to get this on to the lm-sensors wiki so that other HP Z600 users can make this addition to their configs if necessary.
>
> What makes you think the system vendor has anything to do with this? I
> would expect the core IDs to be reported by the CPU itself (someone
> please correct me if I'm wrong.)
>
> > $ grep "core id" cpuinfo.txt
> > core id : 0
> > core id : 1
> > core id : 9
> > core id : 10
> > core id : 0
> > core id : 1
> > core id : 9
> > core id : 10
> > core id : 0
> > core id : 1
> > core id : 9
> > core id : 10
> > core id : 0
> > core id : 1
> > core id : 9
> > core id : 10
>
> I have no idea if the CPU is just reporting strange values or if the
> kernel is somehow misbehaving.
>
I suspect it is the CPU ... for each CPU model I have been testing with, I have seen
different yet consistent CPU numbers for the "real" cores if the CPU supports
hyperthreading. Sometimes the siblings are the odd numbers, sometimes the real cores
come first followed by the siblings, and sometimes the real cores have the lower
and upper numbers and the siblings are in the center. Seems like real core numbering
may be inconsistent across CPU models.
My guess may be wrong, of course, but I don't immediately see how the kernel
would manage to assign consistent CPU numbers for each model across boots,
yet just as consistently different numbers for other CPU models.
The above is really a strange one, though. So far the gaps I have seen were always
the hyperthreading siblings.
Guenter
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^ permalink raw reply [flat|nested] 9+ messages in thread