From: Simon Horman <horms@verge.net.au>
To: Will Deacon <will.deacon@arm.com>
Cc: Dave Martin <dave.martin@linaro.org>,
"linux-sh@vger.kernel.org" <linux-sh@vger.kernel.org>,
Magnus Damm <magnus.damm@gmail.com>,
"kexec@lists.infradead.org" <kexec@lists.infradead.org>,
Frank Hofmann <frank.hofmann@tomtom.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: Possible regression in kexec on ARM ARMv6 and ARMv7 cores
Date: Sat, 22 Oct 2011 11:20:16 +0900 [thread overview]
Message-ID: <20111022022016.GA9208@verge.net.au> (raw)
In-Reply-To: <20111021091524.GB30168@mudshark.cambridge.arm.com>
On Fri, Oct 21, 2011 at 10:15:24AM +0100, Will Deacon wrote:
> On Fri, Oct 21, 2011 at 09:59:58AM +0100, Simon Horman wrote:
> > On Fri, Oct 21, 2011 at 09:46:41AM +0100, Will Deacon wrote:
> > > The more difficult case is when you want to offline the secondary CPUs into
> > > a pen and then boot them in the new kernel. I did get some of this working,
> > > but there are outstanding issues with whether the pen should be at a fixed
> > > location or not. If not, then we need a way to tell the new kernel where it
> > > is, which may involve updating the DT blob...
> >
> > Is the implication that the (working) callback method does not
> > give the second kernel any secondary CPUs?
>
> What the callback does it up to you. You just need to make sure that you can
> cope with the kernel disappearing later on, so you'll probably need some
> hardware mechanism for offlining a CPU (for example, placing it in SRAM
> or cutting the power).
Thanks, it seems that I now have a bit of work to do implementing
a callback.
_______________________________________________
kexec mailing list
kexec@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/kexec
WARNING: multiple messages have this Message-ID (diff)
From: Simon Horman <horms@verge.net.au>
To: linux-arm-kernel@lists.infradead.org
Subject: Re: Possible regression in kexec on ARM ARMv6 and ARMv7 cores
Date: Sat, 22 Oct 2011 02:20:16 +0000 [thread overview]
Message-ID: <20111022022016.GA9208@verge.net.au> (raw)
In-Reply-To: <20111021091524.GB30168@mudshark.cambridge.arm.com>
On Fri, Oct 21, 2011 at 10:15:24AM +0100, Will Deacon wrote:
> On Fri, Oct 21, 2011 at 09:59:58AM +0100, Simon Horman wrote:
> > On Fri, Oct 21, 2011 at 09:46:41AM +0100, Will Deacon wrote:
> > > The more difficult case is when you want to offline the secondary CPUs into
> > > a pen and then boot them in the new kernel. I did get some of this working,
> > > but there are outstanding issues with whether the pen should be at a fixed
> > > location or not. If not, then we need a way to tell the new kernel where it
> > > is, which may involve updating the DT blob...
> >
> > Is the implication that the (working) callback method does not
> > give the second kernel any secondary CPUs?
>
> What the callback does it up to you. You just need to make sure that you can
> cope with the kernel disappearing later on, so you'll probably need some
> hardware mechanism for offlining a CPU (for example, placing it in SRAM
> or cutting the power).
Thanks, it seems that I now have a bit of work to do implementing
a callback.
WARNING: multiple messages have this Message-ID (diff)
From: horms@verge.net.au (Simon Horman)
To: linux-arm-kernel@lists.infradead.org
Subject: Possible regression in kexec on ARM ARMv6 and ARMv7 cores
Date: Sat, 22 Oct 2011 11:20:16 +0900 [thread overview]
Message-ID: <20111022022016.GA9208@verge.net.au> (raw)
In-Reply-To: <20111021091524.GB30168@mudshark.cambridge.arm.com>
On Fri, Oct 21, 2011 at 10:15:24AM +0100, Will Deacon wrote:
> On Fri, Oct 21, 2011 at 09:59:58AM +0100, Simon Horman wrote:
> > On Fri, Oct 21, 2011 at 09:46:41AM +0100, Will Deacon wrote:
> > > The more difficult case is when you want to offline the secondary CPUs into
> > > a pen and then boot them in the new kernel. I did get some of this working,
> > > but there are outstanding issues with whether the pen should be at a fixed
> > > location or not. If not, then we need a way to tell the new kernel where it
> > > is, which may involve updating the DT blob...
> >
> > Is the implication that the (working) callback method does not
> > give the second kernel any secondary CPUs?
>
> What the callback does it up to you. You just need to make sure that you can
> cope with the kernel disappearing later on, so you'll probably need some
> hardware mechanism for offlining a CPU (for example, placing it in SRAM
> or cutting the power).
Thanks, it seems that I now have a bit of work to do implementing
a callback.
next prev parent reply other threads:[~2011-10-22 2:20 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-10-20 4:24 Possible regression in kexec on ARM ARMv6 and ARMv7 cores Simon Horman
2011-10-20 4:24 ` Simon Horman
2011-10-20 4:24 ` Simon Horman
2011-10-20 7:01 ` Will Deacon
2011-10-20 7:01 ` Will Deacon
2011-10-20 7:01 ` Will Deacon
2011-10-20 8:08 ` Simon Horman
2011-10-20 8:08 ` Simon Horman
2011-10-20 8:08 ` Simon Horman
2011-10-21 8:34 ` Simon Horman
2011-10-21 8:34 ` Simon Horman
2011-10-21 8:34 ` Simon Horman
2011-10-21 8:46 ` Will Deacon
2011-10-21 8:46 ` Will Deacon
2011-10-21 8:46 ` Will Deacon
2011-10-21 8:59 ` Simon Horman
2011-10-21 8:59 ` Simon Horman
2011-10-21 8:59 ` Simon Horman
2011-10-21 9:15 ` Will Deacon
2011-10-21 9:15 ` Will Deacon
2011-10-21 9:15 ` Will Deacon
2011-10-22 2:20 ` Simon Horman [this message]
2011-10-22 2:20 ` Simon Horman
2011-10-22 2:20 ` Simon Horman
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