* [PATCH 01/13] MIPS: ath79: remove superfluous parentheses
2011-06-20 19:26 [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs Gabor Juhos
@ 2011-06-20 19:26 ` Gabor Juhos
2011-11-16 19:10 ` Ralf Baechle
2011-06-20 19:26 ` [PATCH 02/13] MIPS: ath79: add revision id for the AR933X SoCs Gabor Juhos
` (12 subsequent siblings)
13 siblings, 1 reply; 33+ messages in thread
From: Gabor Juhos @ 2011-06-20 19:26 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips, Kathy Giori, Luis R. Rodriguez, Gabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
arch/mips/ath79/setup.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c
index 159b42f..dea5af1 100644
--- a/arch/mips/ath79/setup.c
+++ b/arch/mips/ath79/setup.c
@@ -101,19 +101,19 @@ static void __init ath79_detect_sys_type(void)
case REV_ID_MAJOR_AR7240:
ath79_soc = ATH79_SOC_AR7240;
chip = "7240";
- rev = (id & AR724X_REV_ID_REVISION_MASK);
+ rev = id & AR724X_REV_ID_REVISION_MASK;
break;
case REV_ID_MAJOR_AR7241:
ath79_soc = ATH79_SOC_AR7241;
chip = "7241";
- rev = (id & AR724X_REV_ID_REVISION_MASK);
+ rev = id & AR724X_REV_ID_REVISION_MASK;
break;
case REV_ID_MAJOR_AR7242:
ath79_soc = ATH79_SOC_AR7242;
chip = "7242";
- rev = (id & AR724X_REV_ID_REVISION_MASK);
+ rev = id & AR724X_REV_ID_REVISION_MASK;
break;
case REV_ID_MAJOR_AR913X:
--
1.7.2.1
^ permalink raw reply related [flat|nested] 33+ messages in thread* [PATCH 02/13] MIPS: ath79: add revision id for the AR933X SoCs
2011-06-20 19:26 [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs Gabor Juhos
2011-06-20 19:26 ` [PATCH 01/13] MIPS: ath79: remove superfluous parentheses Gabor Juhos
@ 2011-06-20 19:26 ` Gabor Juhos
2011-06-21 10:22 ` Sergei Shtylyov
2011-11-16 19:11 ` Ralf Baechle
2011-06-20 19:26 ` [PATCH 03/13] MIPS: ath79: add early printk support " Gabor Juhos
` (11 subsequent siblings)
13 siblings, 2 replies; 33+ messages in thread
From: Gabor Juhos @ 2011-06-20 19:26 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips, Kathy Giori, Luis R. Rodriguez, Gabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
arch/mips/ath79/setup.c | 12 ++++++++++++
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 4 ++++
arch/mips/include/asm/mach-ath79/ath79.h | 4 +++-
3 files changed, 19 insertions(+), 1 deletions(-)
diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c
index dea5af1..4cbd5e0 100644
--- a/arch/mips/ath79/setup.c
+++ b/arch/mips/ath79/setup.c
@@ -116,6 +116,18 @@ static void __init ath79_detect_sys_type(void)
rev = id & AR724X_REV_ID_REVISION_MASK;
break;
+ case REV_ID_MAJOR_AR9330:
+ ath79_soc = ATH79_SOC_AR9330;
+ chip = "9330";
+ rev = (id & AR933X_REV_ID_REVISION_MASK);
+ break;
+
+ case REV_ID_MAJOR_AR9331:
+ ath79_soc = ATH79_SOC_AR9331;
+ chip = "9331";
+ rev = (id & AR933X_REV_ID_REVISION_MASK);
+ break;
+
case REV_ID_MAJOR_AR913X:
minor = id & AR913X_REV_ID_MINOR_MASK;
rev = id >> AR913X_REV_ID_REVISION_SHIFT;
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index 86f0fc8..929be06 100644
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -207,6 +207,8 @@
#define REV_ID_MAJOR_AR7240 0x00c0
#define REV_ID_MAJOR_AR7241 0x0100
#define REV_ID_MAJOR_AR7242 0x1100
+#define REV_ID_MAJOR_AR9330 0x0110
+#define REV_ID_MAJOR_AR9331 0x1110
#define AR71XX_REV_ID_MINOR_MASK 0x3
#define AR71XX_REV_ID_MINOR_AR7130 0x0
@@ -221,6 +223,8 @@
#define AR913X_REV_ID_REVISION_MASK 0x3
#define AR913X_REV_ID_REVISION_SHIFT 2
+#define AR933X_REV_ID_REVISION_MASK 0x3
+
#define AR724X_REV_ID_REVISION_MASK 0x3
/*
diff --git a/arch/mips/include/asm/mach-ath79/ath79.h b/arch/mips/include/asm/mach-ath79/ath79.h
index 6a9f168..2dfc94c 100644
--- a/arch/mips/include/asm/mach-ath79/ath79.h
+++ b/arch/mips/include/asm/mach-ath79/ath79.h
@@ -26,7 +26,9 @@ enum ath79_soc_type {
ATH79_SOC_AR7241,
ATH79_SOC_AR7242,
ATH79_SOC_AR9130,
- ATH79_SOC_AR9132
+ ATH79_SOC_AR9132,
+ ATH79_SOC_AR9330,
+ ATH79_SOC_AR9331,
};
extern enum ath79_soc_type ath79_soc;
--
1.7.2.1
^ permalink raw reply related [flat|nested] 33+ messages in thread* Re: [PATCH 02/13] MIPS: ath79: add revision id for the AR933X SoCs
2011-06-20 19:26 ` [PATCH 02/13] MIPS: ath79: add revision id for the AR933X SoCs Gabor Juhos
@ 2011-06-21 10:22 ` Sergei Shtylyov
2011-06-21 18:17 ` Gabor Juhos
2011-11-16 19:11 ` Ralf Baechle
1 sibling, 1 reply; 33+ messages in thread
From: Sergei Shtylyov @ 2011-06-21 10:22 UTC (permalink / raw)
To: Gabor Juhos; +Cc: Ralf Baechle, linux-mips, Kathy Giori, Luis R. Rodriguez
Hello.
On 20-06-2011 23:26, Gabor Juhos wrote:
> Signed-off-by: Gabor Juhos<juhosg@openwrt.org>
> ---
> arch/mips/ath79/setup.c | 12 ++++++++++++
> arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 4 ++++
> arch/mips/include/asm/mach-ath79/ath79.h | 4 +++-
> 3 files changed, 19 insertions(+), 1 deletions(-)
> diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c
> index dea5af1..4cbd5e0 100644
> --- a/arch/mips/ath79/setup.c
> +++ b/arch/mips/ath79/setup.c
> @@ -116,6 +116,18 @@ static void __init ath79_detect_sys_type(void)
> rev = id& AR724X_REV_ID_REVISION_MASK;
> break;
>
> + case REV_ID_MAJOR_AR9330:
> + ath79_soc = ATH79_SOC_AR9330;
> + chip = "9330";
> + rev = (id & AR933X_REV_ID_REVISION_MASK);
> + break;
> +
> + case REV_ID_MAJOR_AR9331:
> + ath79_soc = ATH79_SOC_AR9331;
> + chip = "9331";
> + rev = (id & AR933X_REV_ID_REVISION_MASK);
Hm, you've just removed such parens in the previous patch, why add more of
them? :-O
WBR, Sergei
^ permalink raw reply [flat|nested] 33+ messages in thread* Re: [PATCH 02/13] MIPS: ath79: add revision id for the AR933X SoCs
2011-06-21 10:22 ` Sergei Shtylyov
@ 2011-06-21 18:17 ` Gabor Juhos
0 siblings, 0 replies; 33+ messages in thread
From: Gabor Juhos @ 2011-06-21 18:17 UTC (permalink / raw)
To: Sergei Shtylyov; +Cc: Ralf Baechle, linux-mips, Kathy Giori, Luis R. Rodriguez
Hi Sergei,
> On 20-06-2011 23:26, Gabor Juhos wrote:
>
>> Signed-off-by: Gabor Juhos<juhosg@openwrt.org>
>> ---
>> arch/mips/ath79/setup.c | 12 ++++++++++++
>> arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 4 ++++
>> arch/mips/include/asm/mach-ath79/ath79.h | 4 +++-
>> 3 files changed, 19 insertions(+), 1 deletions(-)
>
>> diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c
>> index dea5af1..4cbd5e0 100644
>> --- a/arch/mips/ath79/setup.c
>> +++ b/arch/mips/ath79/setup.c
>> @@ -116,6 +116,18 @@ static void __init ath79_detect_sys_type(void)
>> rev = id& AR724X_REV_ID_REVISION_MASK;
>> break;
>>
>> + case REV_ID_MAJOR_AR9330:
>> + ath79_soc = ATH79_SOC_AR9330;
>> + chip = "9330";
>> + rev = (id & AR933X_REV_ID_REVISION_MASK);
>> + break;
>> +
>> + case REV_ID_MAJOR_AR9331:
>> + ath79_soc = ATH79_SOC_AR9331;
>> + chip = "9331";
>> + rev = (id & AR933X_REV_ID_REVISION_MASK);
>
> Hm, you've just removed such parens in the previous patch, why add more of
> them? :-O
Hm, you are right. I'm sure that I have removed the parentheses from this code
as well, but it seems that I lost that during a rebase process. I will fix this.
Thanks,
Gabor
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH 02/13] MIPS: ath79: add revision id for the AR933X SoCs
2011-06-20 19:26 ` [PATCH 02/13] MIPS: ath79: add revision id for the AR933X SoCs Gabor Juhos
2011-06-21 10:22 ` Sergei Shtylyov
@ 2011-11-16 19:11 ` Ralf Baechle
1 sibling, 0 replies; 33+ messages in thread
From: Ralf Baechle @ 2011-11-16 19:11 UTC (permalink / raw)
To: Gabor Juhos; +Cc: linux-mips, Kathy Giori, Luis R. Rodriguez
Dropped in favor of the replacement patch.
Thanks,
Ralf
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH 03/13] MIPS: ath79: add early printk support for the AR933X SoCs
2011-06-20 19:26 [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs Gabor Juhos
2011-06-20 19:26 ` [PATCH 01/13] MIPS: ath79: remove superfluous parentheses Gabor Juhos
2011-06-20 19:26 ` [PATCH 02/13] MIPS: ath79: add revision id for the AR933X SoCs Gabor Juhos
@ 2011-06-20 19:26 ` Gabor Juhos
2011-11-16 19:11 ` Ralf Baechle
2011-06-20 19:26 ` [PATCH 04/13] MIPS: ath79: add AR933X specific clock init Gabor Juhos
` (10 subsequent siblings)
13 siblings, 1 reply; 33+ messages in thread
From: Gabor Juhos @ 2011-06-20 19:26 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips, Kathy Giori, Luis R. Rodriguez, Gabor Juhos
The AR933X SoCs are using a different UART, thus require
different code for early printk support.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
arch/mips/ath79/early_printk.c | 76 +++++++++++++++++++++---
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 3 +
arch/mips/include/asm/mach-ath79/ar933x_uart.h | 67 +++++++++++++++++++++
3 files changed, 137 insertions(+), 9 deletions(-)
create mode 100644 arch/mips/include/asm/mach-ath79/ar933x_uart.h
diff --git a/arch/mips/ath79/early_printk.c b/arch/mips/ath79/early_printk.c
index 7499b0e..6a51ced 100644
--- a/arch/mips/ath79/early_printk.c
+++ b/arch/mips/ath79/early_printk.c
@@ -1,7 +1,7 @@
/*
- * Atheros AR71XX/AR724X/AR913X SoC early printk support
+ * Atheros AR7XXX/AR9XXX SoC early printk support
*
- * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
@@ -10,27 +10,85 @@
*/
#include <linux/io.h>
+#include <linux/errno.h>
#include <linux/serial_reg.h>
#include <asm/addrspace.h>
+#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
+#include <asm/mach-ath79/ar933x_uart.h>
-static inline void prom_wait_thre(void __iomem *base)
+static void (*_prom_putchar) (unsigned char);
+
+static inline void prom_putchar_wait(void __iomem *reg, u32 mask, u32 val)
{
- u32 lsr;
+ u32 t;
do {
- lsr = __raw_readl(base + UART_LSR * 4);
- if (lsr & UART_LSR_THRE)
+ t = __raw_readl(reg);
+ if ((t & mask) == val)
break;
} while (1);
}
-void prom_putchar(unsigned char ch)
+static void prom_putchar_ar71xx(unsigned char ch)
{
void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE));
- prom_wait_thre(base);
+ prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE);
__raw_writel(ch, base + UART_TX * 4);
- prom_wait_thre(base);
+ prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE);
+}
+
+static void prom_putchar_ar933x(unsigned char ch)
+{
+ void __iomem *base = (void __iomem *)(KSEG1ADDR(AR933X_UART_BASE));
+
+ prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
+ AR933X_UART_DATA_TX_CSR);
+ __raw_writel(AR933X_UART_DATA_TX_CSR | ch, base + AR933X_UART_DATA_REG);
+ prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
+ AR933X_UART_DATA_TX_CSR);
+}
+
+static void prom_putchar_dummy(unsigned char ch)
+{
+ /* nothing to do */
+}
+
+static void prom_putchar_init(void)
+{
+ void __iomem *base;
+ u32 id;
+
+ base = (void __iomem *)(KSEG1ADDR(AR71XX_RESET_BASE));
+ id = __raw_readl(base + AR71XX_RESET_REG_REV_ID);
+ id &= REV_ID_MAJOR_MASK;
+
+ switch (id) {
+ case REV_ID_MAJOR_AR71XX:
+ case REV_ID_MAJOR_AR7240:
+ case REV_ID_MAJOR_AR7241:
+ case REV_ID_MAJOR_AR7242:
+ case REV_ID_MAJOR_AR913X:
+ _prom_putchar = prom_putchar_ar71xx;
+ break;
+
+ case REV_ID_MAJOR_AR9330:
+ case REV_ID_MAJOR_AR9331:
+ _prom_putchar = prom_putchar_ar933x;
+ break;
+
+ default:
+ _prom_putchar = prom_putchar_dummy;
+ break;
+ }
+}
+
+void prom_putchar(unsigned char ch)
+{
+ if (!_prom_putchar)
+ prom_putchar_init();
+
+ _prom_putchar(ch);
}
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index 929be06..90223f2 100644
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -53,6 +53,9 @@
#define AR913X_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000)
#define AR913X_WMAC_SIZE 0x30000
+#define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000)
+#define AR933X_UART_SIZE 0x14
+
/*
* DDR_CTRL block
*/
diff --git a/arch/mips/include/asm/mach-ath79/ar933x_uart.h b/arch/mips/include/asm/mach-ath79/ar933x_uart.h
new file mode 100644
index 0000000..5273055
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/ar933x_uart.h
@@ -0,0 +1,67 @@
+/*
+ * Atheros AR933X UART defines
+ *
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#ifndef __AR933X_UART_H
+#define __AR933X_UART_H
+
+#define AR933X_UART_REGS_SIZE 20
+#define AR933X_UART_FIFO_SIZE 16
+
+#define AR933X_UART_DATA_REG 0x00
+#define AR933X_UART_CS_REG 0x04
+#define AR933X_UART_CLOCK_REG 0x08
+#define AR933X_UART_INT_REG 0x0c
+#define AR933X_UART_INT_EN_REG 0x10
+
+#define AR933X_UART_DATA_TX_RX_MASK 0xff
+#define AR933X_UART_DATA_RX_CSR BIT(8)
+#define AR933X_UART_DATA_TX_CSR BIT(9)
+
+#define AR933X_UART_CS_PARITY_S 0
+#define AR933X_UART_CS_PARITY_M 0x3
+#define AR933X_UART_CS_PARITY_NONE 0
+#define AR933X_UART_CS_PARITY_ODD 1
+#define AR933X_UART_CS_PARITY_EVEN 2
+#define AR933X_UART_CS_IF_MODE_S 2
+#define AR933X_UART_CS_IF_MODE_M 0x3
+#define AR933X_UART_CS_IF_MODE_NONE 0
+#define AR933X_UART_CS_IF_MODE_DTE 1
+#define AR933X_UART_CS_IF_MODE_DCE 2
+#define AR933X_UART_CS_FLOW_CTRL_S 4
+#define AR933X_UART_CS_FLOW_CTRL_M 0x3
+#define AR933X_UART_CS_DMA_EN BIT(6)
+#define AR933X_UART_CS_TX_READY_ORIDE BIT(7)
+#define AR933X_UART_CS_RX_READY_ORIDE BIT(8)
+#define AR933X_UART_CS_TX_READY BIT(9)
+#define AR933X_UART_CS_RX_BREAK BIT(10)
+#define AR933X_UART_CS_TX_BREAK BIT(11)
+#define AR933X_UART_CS_HOST_INT BIT(12)
+#define AR933X_UART_CS_HOST_INT_EN BIT(13)
+#define AR933X_UART_CS_TX_BUSY BIT(14)
+#define AR933X_UART_CS_RX_BUSY BIT(15)
+
+#define AR933X_UART_CLOCK_STEP_M 0xffff
+#define AR933X_UART_CLOCK_SCALE_M 0xfff
+#define AR933X_UART_CLOCK_SCALE_S 16
+#define AR933X_UART_CLOCK_STEP_M 0xffff
+
+#define AR933X_UART_INT_RX_VALID BIT(0)
+#define AR933X_UART_INT_TX_READY BIT(1)
+#define AR933X_UART_INT_RX_FRAMING_ERR BIT(2)
+#define AR933X_UART_INT_RX_OFLOW_ERR BIT(3)
+#define AR933X_UART_INT_TX_OFLOW_ERR BIT(4)
+#define AR933X_UART_INT_RX_PARITY_ERR BIT(5)
+#define AR933X_UART_INT_RX_BREAK_ON BIT(6)
+#define AR933X_UART_INT_RX_BREAK_OFF BIT(7)
+#define AR933X_UART_INT_RX_FULL BIT(8)
+#define AR933X_UART_INT_TX_EMPTY BIT(9)
+#define AR933X_UART_INT_ALLINTS 0x3ff
+
+#endif /* __AR933X_UART_H */
--
1.7.2.1
^ permalink raw reply related [flat|nested] 33+ messages in thread* [PATCH 04/13] MIPS: ath79: add AR933X specific clock init
2011-06-20 19:26 [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs Gabor Juhos
` (2 preceding siblings ...)
2011-06-20 19:26 ` [PATCH 03/13] MIPS: ath79: add early printk support " Gabor Juhos
@ 2011-06-20 19:26 ` Gabor Juhos
2011-11-16 19:11 ` Ralf Baechle
2011-06-20 19:26 ` [PATCH 05/13] MIPS: ath79: add AR933X specific glue for ath79_device_reset_{set,clear} Gabor Juhos
` (9 subsequent siblings)
13 siblings, 1 reply; 33+ messages in thread
From: Gabor Juhos @ 2011-06-20 19:26 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips, Kathy Giori, Luis R. Rodriguez, Gabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
arch/mips/ath79/clock.c | 55 ++++++++++++++++++++++++
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 22 +++++++++
arch/mips/include/asm/mach-ath79/ath79.h | 6 +++
3 files changed, 83 insertions(+), 0 deletions(-)
diff --git a/arch/mips/ath79/clock.c b/arch/mips/ath79/clock.c
index 680bde9..54d0eb4 100644
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -110,6 +110,59 @@ static void __init ar913x_clocks_init(void)
ath79_uart_clk.rate = ath79_ahb_clk.rate;
}
+static void __init ar933x_clocks_init(void)
+{
+ u32 clock_ctrl;
+ u32 cpu_config;
+ u32 freq;
+ u32 t;
+
+ t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
+ if (t & AR933X_BOOTSTRAP_REF_CLK_40)
+ ath79_ref_clk.rate = (40 * 1000 * 1000);
+ else
+ ath79_ref_clk.rate = (25 * 1000 * 1000);
+
+ clock_ctrl = ath79_pll_rr(AR933X_PLL_CLOCK_CTRL_REG);
+ if (clock_ctrl & AR933X_PLL_CLOCK_CTRL_BYPASS) {
+ ath79_cpu_clk.rate = ath79_ref_clk.rate;
+ ath79_ahb_clk.rate = ath79_ref_clk.rate;
+ ath79_ddr_clk.rate = ath79_ref_clk.rate;
+ } else {
+ cpu_config = ath79_pll_rr(AR933X_PLL_CPU_CONFIG_REG);
+
+ t = (cpu_config >> AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
+ AR933X_PLL_CPU_CONFIG_REFDIV_MASK;
+ freq = ath79_ref_clk.rate / t;
+
+ t = (cpu_config >> AR933X_PLL_CPU_CONFIG_NINT_SHIFT) &
+ AR933X_PLL_CPU_CONFIG_NINT_MASK;
+ freq *= t;
+
+ t = (cpu_config >> AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
+ AR933X_PLL_CPU_CONFIG_OUTDIV_MASK;
+ if (t == 0)
+ t = 1;
+
+ freq >>= t;
+
+ t = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT) &
+ AR933X_PLL_CLOCK_CTRL_CPU_DIV_MASK) + 1;
+ ath79_cpu_clk.rate = freq / t;
+
+ t = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT) &
+ AR933X_PLL_CLOCK_CTRL_DDR_DIV_MASK) + 1;
+ ath79_ddr_clk.rate = freq / t;
+
+ t = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT) &
+ AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK) + 1;
+ ath79_ahb_clk.rate = freq / t;
+ }
+
+ ath79_wdt_clk.rate = ath79_ref_clk.rate;
+ ath79_uart_clk.rate = ath79_ref_clk.rate;
+}
+
void __init ath79_clocks_init(void)
{
if (soc_is_ar71xx())
@@ -118,6 +171,8 @@ void __init ath79_clocks_init(void)
ar724x_clocks_init();
else if (soc_is_ar913x())
ar913x_clocks_init();
+ else if (soc_is_ar933x())
+ ar933x_clocks_init();
else
BUG();
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index 90223f2..418b739 100644
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -123,6 +123,24 @@
#define AR913X_AHB_DIV_SHIFT 19
#define AR913X_AHB_DIV_MASK 0x1
+#define AR933X_PLL_CPU_CONFIG_REG 0x00
+#define AR933X_PLL_CLOCK_CTRL_REG 0x08
+
+#define AR933X_PLL_CPU_CONFIG_NINT_SHIFT 10
+#define AR933X_PLL_CPU_CONFIG_NINT_MASK 0x3f
+#define AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT 16
+#define AR933X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f
+#define AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT 23
+#define AR933X_PLL_CPU_CONFIG_OUTDIV_MASK 0x7
+
+#define AR933X_PLL_CLOCK_CTRL_BYPASS BIT(2)
+#define AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT 5
+#define AR933X_PLL_CLOCK_CTRL_CPU_DIV_MASK 0x3
+#define AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT 10
+#define AR933X_PLL_CLOCK_CTRL_DDR_DIV_MASK 0x3
+#define AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT 15
+#define AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK 0x7
+
/*
* USB_CONFIG block
*/
@@ -155,6 +173,8 @@
#define AR724X_RESET_REG_RESET_MODULE 0x1c
+#define AR933X_RESET_REG_BOOTSTRAP 0xac
+
#define MISC_INT_ETHSW BIT(12)
#define MISC_INT_TIMER4 BIT(10)
#define MISC_INT_TIMER3 BIT(9)
@@ -204,6 +224,8 @@
#define AR913X_RESET_USB_HOST BIT(5)
#define AR913X_RESET_USB_PHY BIT(4)
+#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
+
#define REV_ID_MAJOR_MASK 0xfff0
#define REV_ID_MAJOR_AR71XX 0x00a0
#define REV_ID_MAJOR_AR913X 0x00b0
diff --git a/arch/mips/include/asm/mach-ath79/ath79.h b/arch/mips/include/asm/mach-ath79/ath79.h
index 2dfc94c..407c935 100644
--- a/arch/mips/include/asm/mach-ath79/ath79.h
+++ b/arch/mips/include/asm/mach-ath79/ath79.h
@@ -68,6 +68,12 @@ static inline int soc_is_ar913x(void)
ath79_soc == ATH79_SOC_AR9132);
}
+static inline int soc_is_ar933x(void)
+{
+ return (ath79_soc == ATH79_SOC_AR9330 ||
+ ath79_soc == ATH79_SOC_AR9331);
+}
+
extern void __iomem *ath79_ddr_base;
extern void __iomem *ath79_pll_base;
extern void __iomem *ath79_reset_base;
--
1.7.2.1
^ permalink raw reply related [flat|nested] 33+ messages in thread* [PATCH 05/13] MIPS: ath79: add AR933X specific glue for ath79_device_reset_{set,clear}
2011-06-20 19:26 [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs Gabor Juhos
` (3 preceding siblings ...)
2011-06-20 19:26 ` [PATCH 04/13] MIPS: ath79: add AR933X specific clock init Gabor Juhos
@ 2011-06-20 19:26 ` Gabor Juhos
2011-11-16 19:11 ` Ralf Baechle
2011-06-20 19:26 ` [PATCH 06/13] MIPS: ath79: add AR933X specific IRQ initialization Gabor Juhos
` (8 subsequent siblings)
13 siblings, 1 reply; 33+ messages in thread
From: Gabor Juhos @ 2011-06-20 19:26 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips, Kathy Giori, Luis R. Rodriguez, Gabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
arch/mips/ath79/common.c | 4 ++++
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
2 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/mips/ath79/common.c b/arch/mips/ath79/common.c
index 58f60e7..38c2ad7 100644
--- a/arch/mips/ath79/common.c
+++ b/arch/mips/ath79/common.c
@@ -64,6 +64,8 @@ void ath79_device_reset_set(u32 mask)
reg = AR724X_RESET_REG_RESET_MODULE;
else if (soc_is_ar913x())
reg = AR913X_RESET_REG_RESET_MODULE;
+ else if (soc_is_ar933x())
+ reg = AR933X_RESET_REG_RESET_MODULE;
else
BUG();
@@ -86,6 +88,8 @@ void ath79_device_reset_clear(u32 mask)
reg = AR724X_RESET_REG_RESET_MODULE;
else if (soc_is_ar913x())
reg = AR913X_RESET_REG_RESET_MODULE;
+ else if (soc_is_ar933x())
+ reg = AR933X_RESET_REG_RESET_MODULE;
else
BUG();
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index 418b739..c7159e3 100644
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -173,6 +173,7 @@
#define AR724X_RESET_REG_RESET_MODULE 0x1c
+#define AR933X_RESET_REG_RESET_MODULE 0x1c
#define AR933X_RESET_REG_BOOTSTRAP 0xac
#define MISC_INT_ETHSW BIT(12)
--
1.7.2.1
^ permalink raw reply related [flat|nested] 33+ messages in thread* [PATCH 06/13] MIPS: ath79: add AR933X specific IRQ initialization
2011-06-20 19:26 [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs Gabor Juhos
` (4 preceding siblings ...)
2011-06-20 19:26 ` [PATCH 05/13] MIPS: ath79: add AR933X specific glue for ath79_device_reset_{set,clear} Gabor Juhos
@ 2011-06-20 19:26 ` Gabor Juhos
2011-11-16 19:11 ` Ralf Baechle
2011-06-20 19:26 ` [PATCH 07/13] MIPS: ath79: add AR933X specific GPIO initialization Gabor Juhos
` (7 subsequent siblings)
13 siblings, 1 reply; 33+ messages in thread
From: Gabor Juhos @ 2011-06-20 19:26 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips, Kathy Giori, Luis R. Rodriguez, Gabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
arch/mips/ath79/irq.c | 5 ++++-
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 5 +++++
2 files changed, 9 insertions(+), 1 deletions(-)
diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c
index 0d98114..1b073de 100644
--- a/arch/mips/ath79/irq.c
+++ b/arch/mips/ath79/irq.c
@@ -129,7 +129,7 @@ static void __init ath79_misc_irq_init(void)
if (soc_is_ar71xx() || soc_is_ar913x())
ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask;
- else if (soc_is_ar724x())
+ else if (soc_is_ar724x() || soc_is_ar933x())
ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
else
BUG();
@@ -186,6 +186,9 @@ void __init arch_init_irq(void)
} else if (soc_is_ar913x()) {
ath79_ip2_flush_reg = AR913X_DDR_REG_FLUSH_WMAC;
ath79_ip3_flush_reg = AR913X_DDR_REG_FLUSH_USB;
+ } else if (soc_is_ar933x()) {
+ ath79_ip2_flush_reg = AR933X_DDR_REG_FLUSH_WMAC;
+ ath79_ip3_flush_reg = AR933X_DDR_REG_FLUSH_USB;
} else
BUG();
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index c7159e3..9c76185 100644
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -82,6 +82,11 @@
#define AR913X_DDR_REG_FLUSH_USB 0x84
#define AR913X_DDR_REG_FLUSH_WMAC 0x88
+#define AR933X_DDR_REG_FLUSH_GE0 0x7c
+#define AR933X_DDR_REG_FLUSH_GE1 0x80
+#define AR933X_DDR_REG_FLUSH_USB 0x84
+#define AR933X_DDR_REG_FLUSH_WMAC 0x88
+
/*
* PLL block
*/
--
1.7.2.1
^ permalink raw reply related [flat|nested] 33+ messages in thread* [PATCH 07/13] MIPS: ath79: add AR933X specific GPIO initialization
2011-06-20 19:26 [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs Gabor Juhos
` (5 preceding siblings ...)
2011-06-20 19:26 ` [PATCH 06/13] MIPS: ath79: add AR933X specific IRQ initialization Gabor Juhos
@ 2011-06-20 19:26 ` Gabor Juhos
2011-11-16 19:11 ` Ralf Baechle
2011-06-20 19:26 ` [PATCH 08/13] MIPS: ath79: add config symbol for the AR933X SoCs Gabor Juhos
` (6 subsequent siblings)
13 siblings, 1 reply; 33+ messages in thread
From: Gabor Juhos @ 2011-06-20 19:26 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips, Kathy Giori, Luis R. Rodriguez, Gabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
arch/mips/ath79/gpio.c | 2 ++
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/mips/ath79/gpio.c b/arch/mips/ath79/gpio.c
index a0c426b..a2f8ca6 100644
--- a/arch/mips/ath79/gpio.c
+++ b/arch/mips/ath79/gpio.c
@@ -153,6 +153,8 @@ void __init ath79_gpio_init(void)
ath79_gpio_count = AR724X_GPIO_COUNT;
else if (soc_is_ar913x())
ath79_gpio_count = AR913X_GPIO_COUNT;
+ else if (soc_is_ar933x())
+ ath79_gpio_count = AR933X_GPIO_COUNT;
else
BUG();
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index 9c76185..e65c10d 100644
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -298,5 +298,6 @@
#define AR71XX_GPIO_COUNT 16
#define AR724X_GPIO_COUNT 18
#define AR913X_GPIO_COUNT 22
+#define AR933X_GPIO_COUNT 30
#endif /* __ASM_MACH_AR71XX_REGS_H */
--
1.7.2.1
^ permalink raw reply related [flat|nested] 33+ messages in thread* [PATCH 08/13] MIPS: ath79: add config symbol for the AR933X SoCs
2011-06-20 19:26 [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs Gabor Juhos
` (6 preceding siblings ...)
2011-06-20 19:26 ` [PATCH 07/13] MIPS: ath79: add AR933X specific GPIO initialization Gabor Juhos
@ 2011-06-20 19:26 ` Gabor Juhos
2011-11-16 19:12 ` Ralf Baechle
2011-06-20 19:26 ` [PATCH 09/13] USB: ehci-ath79: add device_id entry " Gabor Juhos
` (5 subsequent siblings)
13 siblings, 1 reply; 33+ messages in thread
From: Gabor Juhos @ 2011-06-20 19:26 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips, Kathy Giori, Luis R. Rodriguez, Gabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
arch/mips/ath79/Kconfig | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig
index af01669..90edf276 100644
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
@@ -41,6 +41,9 @@ config SOC_AR913X
select USB_ARCH_HAS_EHCI
def_bool n
+config SOC_AR933X
+ def_bool n
+
config ATH79_DEV_AR913X_WMAC
depends on SOC_AR913X
def_bool n
--
1.7.2.1
^ permalink raw reply related [flat|nested] 33+ messages in thread* [PATCH 09/13] USB: ehci-ath79: add device_id entry for the AR933X SoCs
2011-06-20 19:26 [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs Gabor Juhos
` (7 preceding siblings ...)
2011-06-20 19:26 ` [PATCH 08/13] MIPS: ath79: add config symbol for the AR933X SoCs Gabor Juhos
@ 2011-06-20 19:26 ` Gabor Juhos
2011-11-16 19:13 ` Ralf Baechle
2011-06-20 19:26 ` [PATCH 10/13] MIPS: ath79: add AR933X specific USB platform device registration Gabor Juhos
` (4 subsequent siblings)
13 siblings, 1 reply; 33+ messages in thread
From: Gabor Juhos @ 2011-06-20 19:26 UTC (permalink / raw)
To: Ralf Baechle
Cc: linux-mips, Kathy Giori, Luis R. Rodriguez, Gabor Juhos,
Greg Kroah-Hartman, Alan Stern, linux-usb
Also make the USB_EHCI_ATH79 selectable for the AR933X SoCs.
Cc: Greg Kroah-Hartman <gregkh@suse.de>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: linux-usb@vger.kernel.org
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
The patch should be merged via the MIPS tree.
---
drivers/usb/host/Kconfig | 2 +-
drivers/usb/host/ehci-ath79.c | 4 ++++
2 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index ab085f1..aee1e0f 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -210,7 +210,7 @@ config USB_CNS3XXX_EHCI
config USB_EHCI_ATH79
bool "EHCI support for AR7XXX/AR9XXX SoCs"
- depends on USB_EHCI_HCD && (SOC_AR71XX || SOC_AR724X || SOC_AR913X)
+ depends on USB_EHCI_HCD && (SOC_AR71XX || SOC_AR724X || SOC_AR913X || SOC_AR933X)
select USB_EHCI_ROOT_HUB_TT
default y
---help---
diff --git a/drivers/usb/host/ehci-ath79.c b/drivers/usb/host/ehci-ath79.c
index 98cc8a1..2665dd5 100644
--- a/drivers/usb/host/ehci-ath79.c
+++ b/drivers/usb/host/ehci-ath79.c
@@ -33,6 +33,10 @@ static const struct platform_device_id ehci_ath79_id_table[] = {
.driver_data = EHCI_ATH79_IP_V2,
},
{
+ .name = "ar933x-ehci",
+ .driver_data = EHCI_ATH79_IP_V2,
+ },
+ {
/* terminating entry */
},
};
--
1.7.2.1
^ permalink raw reply related [flat|nested] 33+ messages in thread* Re: [PATCH 09/13] USB: ehci-ath79: add device_id entry for the AR933X SoCs
2011-06-20 19:26 ` [PATCH 09/13] USB: ehci-ath79: add device_id entry " Gabor Juhos
@ 2011-11-16 19:13 ` Ralf Baechle
0 siblings, 0 replies; 33+ messages in thread
From: Ralf Baechle @ 2011-11-16 19:13 UTC (permalink / raw)
To: Gabor Juhos
Cc: linux-mips, Kathy Giori, Luis R. Rodriguez, Greg Kroah-Hartman,
Alan Stern, linux-usb
On Mon, Jun 20, 2011 at 09:26:09PM +0200, Gabor Juhos wrote:
> Cc: Greg Kroah-Hartman <gregkh@suse.de>
> Cc: Alan Stern <stern@rowland.harvard.edu>
> Cc: linux-usb@vger.kernel.org
> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
> ---
> The patch should be merged via the MIPS tree.
> ---
> drivers/usb/host/Kconfig | 2 +-
> drivers/usb/host/ehci-ath79.c | 4 ++++
> 2 files changed, 5 insertions(+), 1 deletions(-)
No (N)Ack or comments received and the patch is trivial, so queued for 3.3
Thanks,
Ralf
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH 10/13] MIPS: ath79: add AR933X specific USB platform device registration
2011-06-20 19:26 [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs Gabor Juhos
` (8 preceding siblings ...)
2011-06-20 19:26 ` [PATCH 09/13] USB: ehci-ath79: add device_id entry " Gabor Juhos
@ 2011-06-20 19:26 ` Gabor Juhos
2011-11-16 19:13 ` Ralf Baechle
2011-06-20 19:26 ` [PATCH 11/13] serial: add driver for the built-in UART of the AR933X SoC Gabor Juhos
` (3 subsequent siblings)
13 siblings, 1 reply; 33+ messages in thread
From: Gabor Juhos @ 2011-06-20 19:26 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips, Kathy Giori, Luis R. Rodriguez, Gabor Juhos
Also select the USB_ARCH_HAS_EHCI symbol in order to make the
EHCI driver available.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
arch/mips/ath79/Kconfig | 1 +
arch/mips/ath79/dev-usb.c | 19 +++++++++++++++++++
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 7 +++++++
3 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig
index 90edf276..c3680c8 100644
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
@@ -42,6 +42,7 @@ config SOC_AR913X
def_bool n
config SOC_AR933X
+ select USB_ARCH_HAS_EHCI
def_bool n
config ATH79_DEV_AR913X_WMAC
diff --git a/arch/mips/ath79/dev-usb.c b/arch/mips/ath79/dev-usb.c
index c3f1999..002d6d2 100644
--- a/arch/mips/ath79/dev-usb.c
+++ b/arch/mips/ath79/dev-usb.c
@@ -163,6 +163,23 @@ static void __init ar913x_usb_setup(void)
platform_device_register(&ath79_ehci_device);
}
+static void __init ar933x_usb_setup(void)
+{
+ ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE);
+ mdelay(10);
+
+ ath79_device_reset_clear(AR933X_RESET_USB_HOST);
+ mdelay(10);
+
+ ath79_device_reset_clear(AR933X_RESET_USB_PHY);
+ mdelay(10);
+
+ ath79_ehci_resources[0].start = AR933X_EHCI_BASE;
+ ath79_ehci_resources[0].end = AR933X_EHCI_BASE + AR933X_EHCI_SIZE - 1;
+ ath79_ehci_device.name = "ar933x-ehci";
+ platform_device_register(&ath79_ehci_device);
+}
+
void __init ath79_register_usb(void)
{
if (soc_is_ar71xx())
@@ -173,6 +190,8 @@ void __init ath79_register_usb(void)
ar724x_usb_setup();
else if (soc_is_ar913x())
ar913x_usb_setup();
+ else if (soc_is_ar933x())
+ ar933x_usb_setup();
else
BUG();
}
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index e65c10d..733baca 100644
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -56,6 +56,9 @@
#define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000)
#define AR933X_UART_SIZE 0x14
+#define AR933X_EHCI_BASE 0x1b000000
+#define AR933X_EHCI_SIZE 0x1000
+
/*
* DDR_CTRL block
*/
@@ -230,6 +233,10 @@
#define AR913X_RESET_USB_HOST BIT(5)
#define AR913X_RESET_USB_PHY BIT(4)
+#define AR933X_RESET_USB_HOST BIT(5)
+#define AR933X_RESET_USB_PHY BIT(4)
+#define AR933X_RESET_USBSUS_OVERRIDE BIT(3)
+
#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
#define REV_ID_MAJOR_MASK 0xfff0
--
1.7.2.1
^ permalink raw reply related [flat|nested] 33+ messages in thread* [PATCH 11/13] serial: add driver for the built-in UART of the AR933X SoC
2011-06-20 19:26 [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs Gabor Juhos
` (9 preceding siblings ...)
2011-06-20 19:26 ` [PATCH 10/13] MIPS: ath79: add AR933X specific USB platform device registration Gabor Juhos
@ 2011-06-20 19:26 ` Gabor Juhos
2011-06-21 8:59 ` Alan Cox
2011-06-20 19:26 ` [PATCH 12/13] MIPS: ath79: register UART device for the AR933X SoCs Gabor Juhos
` (2 subsequent siblings)
13 siblings, 1 reply; 33+ messages in thread
From: Gabor Juhos @ 2011-06-20 19:26 UTC (permalink / raw)
To: Ralf Baechle
Cc: linux-mips, Kathy Giori, Luis R. Rodriguez, Gabor Juhos, Alan Cox,
linux-serial
This patch adds the driver for the built-in UART of the
Atheros AR933X SoCs.
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: linux-serial@vger.kernel.org
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
The patch should be merged via the MIPS tree to avoid
cross tree dependencies.
---
.../include/asm/mach-ath79/ar933x_uart_platform.h | 18 +
drivers/tty/serial/Kconfig | 23 +
drivers/tty/serial/Makefile | 2 +
drivers/tty/serial/ar933x_uart.c | 688 ++++++++++++++++++++
include/linux/serial_core.h | 4 +
5 files changed, 735 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/include/asm/mach-ath79/ar933x_uart_platform.h
create mode 100644 drivers/tty/serial/ar933x_uart.c
diff --git a/arch/mips/include/asm/mach-ath79/ar933x_uart_platform.h b/arch/mips/include/asm/mach-ath79/ar933x_uart_platform.h
new file mode 100644
index 0000000..6cb30f2
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/ar933x_uart_platform.h
@@ -0,0 +1,18 @@
+/*
+ * Platform data definition for Atheros AR933X UART
+ *
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#ifndef _AR933X_UART_PLATFORM_H
+#define _AR933X_UART_PLATFORM_H
+
+struct ar933x_uart_platform_data {
+ unsigned uartclk;
+};
+
+#endif /* _AR933X_UART_PLATFORM_H */
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 636144c..39f8895 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1635,4 +1635,27 @@ config SERIAL_XILINX_PS_UART_CONSOLE
help
Enable a Xilinx PS UART port to be the system console.
+config SERIAL_AR933X
+ bool "AR933X serial port support"
+ depends on SOC_AR933X
+ select SERIAL_CORE
+ help
+ If you have an Atheros AR933X SOC based board and want to use the
+ built-in UART of the SoC, say Y to this option.
+
+config SERIAL_AR933X_CONSOLE
+ bool "Console on AR933X serial port"
+ depends on SERIAL_AR933X=y
+ select SERIAL_CORE_CONSOLE
+ help
+ Enable a built-in UART port of the AR933X to be the system console.
+
+config SERIAL_AR933X_NR_UARTS
+ int "Maximum number of AR933X serial ports"
+ depends on SERIAL_AR933X
+ default "2"
+ help
+ Set this to the number of serial ports you want the driver
+ to support.
+
endmenu
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index cb2628f..9bf807f 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -96,3 +96,5 @@ obj-$(CONFIG_SERIAL_MSM_SMD) += msm_smd_tty.o
obj-$(CONFIG_SERIAL_MXS_AUART) += mxs-auart.o
obj-$(CONFIG_SERIAL_LANTIQ) += lantiq.o
obj-$(CONFIG_SERIAL_XILINX_PS_UART) += xilinx_uartps.o
+obj-$(CONFIG_SERIAL_AR933X) += ar933x_uart.o
+
diff --git a/drivers/tty/serial/ar933x_uart.c b/drivers/tty/serial/ar933x_uart.c
new file mode 100644
index 0000000..e4f60e2b
--- /dev/null
+++ b/drivers/tty/serial/ar933x_uart.c
@@ -0,0 +1,688 @@
+/*
+ * Atheros AR933X SoC built-in UART driver
+ *
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/sysrq.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/serial_core.h>
+#include <linux/serial.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+
+#include <asm/mach-ath79/ar933x_uart.h>
+#include <asm/mach-ath79/ar933x_uart_platform.h>
+
+#define DRIVER_NAME "ar933x-uart"
+
+#define AR933X_DUMMY_STATUS_RD 0x01
+
+static struct uart_driver ar933x_uart_driver;
+
+struct ar933x_uart_port {
+ struct uart_port port;
+ unsigned int ier; /* shadow Interrupt Enable Register */
+};
+
+static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
+ int offset)
+{
+ return readl(up->port.membase + offset);
+}
+
+static inline void ar933x_uart_write(struct ar933x_uart_port *up,
+ int offset, unsigned int value)
+{
+ writel(value, up->port.membase + offset);
+}
+
+static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
+ unsigned int offset,
+ unsigned int mask,
+ unsigned int val)
+{
+ unsigned int t;
+
+ t = ar933x_uart_read(up, offset);
+ t &= ~mask;
+ t |= val;
+ ar933x_uart_write(up, offset, t);
+}
+
+static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
+ unsigned int offset,
+ unsigned int val)
+{
+ ar933x_uart_rmw(up, offset, 0, val);
+}
+
+static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
+ unsigned int offset,
+ unsigned int val)
+{
+ ar933x_uart_rmw(up, offset, val, 0);
+}
+
+static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
+{
+ up->ier |= AR933X_UART_INT_TX_EMPTY;
+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
+}
+
+static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
+{
+ up->ier &= ~AR933X_UART_INT_TX_EMPTY;
+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
+}
+
+static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
+{
+ unsigned int rdata;
+
+ rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
+ rdata |= AR933X_UART_DATA_TX_CSR;
+ ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
+}
+
+static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+ unsigned long flags;
+ unsigned int rdata;
+
+ spin_lock_irqsave(&up->port.lock, flags);
+ rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
+ spin_unlock_irqrestore(&up->port.lock, flags);
+
+ return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
+}
+
+static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
+{
+ return TIOCM_CAR;
+}
+
+static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+}
+
+static void ar933x_uart_start_tx(struct uart_port *port)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+
+ ar933x_uart_start_tx_interrupt(up);
+}
+
+static void ar933x_uart_stop_tx(struct uart_port *port)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+
+ ar933x_uart_stop_tx_interrupt(up);
+}
+
+static void ar933x_uart_stop_rx(struct uart_port *port)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+
+ up->ier &= ~AR933X_UART_INT_RX_VALID;
+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
+}
+
+static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+ unsigned long flags;
+
+ spin_lock_irqsave(&up->port.lock, flags);
+ if (break_state == -1)
+ ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
+ AR933X_UART_CS_TX_BREAK);
+ else
+ ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
+ AR933X_UART_CS_TX_BREAK);
+ spin_unlock_irqrestore(&up->port.lock, flags);
+}
+
+static void ar933x_uart_enable_ms(struct uart_port *port)
+{
+}
+
+static void ar933x_uart_set_termios(struct uart_port *port,
+ struct ktermios *new,
+ struct ktermios *old)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+ unsigned int cs;
+ unsigned long flags;
+ unsigned int baud, scale;
+
+ /* Only CS8 is supported */
+ new->c_cflag &= ~CSIZE;
+ new->c_cflag |= CS8;
+
+ /* Only one stop bit is supported */
+ new->c_cflag &= ~CSTOPB;
+
+ cs = 0;
+ if (new->c_cflag & PARENB) {
+ if (!(new->c_cflag & PARODD))
+ cs |= AR933X_UART_CS_PARITY_EVEN;
+ else
+ cs |= AR933X_UART_CS_PARITY_ODD;
+ } else {
+ cs |= AR933X_UART_CS_PARITY_NONE;
+ }
+
+ /* Mark/space parity is not supported */
+ new->c_cflag &= ~CMSPAR;
+
+ baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
+ scale = (port->uartclk / (16 * baud)) - 1;
+
+ /*
+ * Ok, we're now changing the port state. Do it with
+ * interrupts disabled.
+ */
+ spin_lock_irqsave(&up->port.lock, flags);
+
+ /* Update the per-port timeout. */
+ uart_update_timeout(port, new->c_cflag, baud);
+
+ up->port.ignore_status_mask = 0;
+
+ /* ignore all characters if CREAD is not set */
+ if ((new->c_cflag & CREAD) == 0)
+ up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
+
+ ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
+ scale << AR933X_UART_CLOCK_SCALE_S | 8192);
+
+ /* setup configuration register */
+ ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
+
+ /* enable host interrupt */
+ ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
+ AR933X_UART_CS_HOST_INT_EN);
+
+ spin_unlock_irqrestore(&up->port.lock, flags);
+
+ if (tty_termios_baud_rate(new))
+ tty_termios_encode_baud_rate(new, baud, baud);
+}
+
+static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
+{
+ struct tty_struct *tty;
+ int max_count = 256;
+
+ tty = tty_port_tty_get(&up->port.state->port);
+ do {
+ unsigned int rdata;
+ unsigned char ch;
+
+ rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
+ if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
+ break;
+
+ /* remove the character from the FIFO */
+ ar933x_uart_write(up, AR933X_UART_DATA_REG,
+ AR933X_UART_DATA_RX_CSR);
+
+ if (!tty) {
+ /* discard the data if no tty available */
+ continue;
+ }
+
+ up->port.icount.rx++;
+ ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
+
+ if (uart_handle_sysrq_char(&up->port, ch))
+ continue;
+
+ if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
+ tty_insert_flip_char(tty, ch, TTY_NORMAL);
+ } while (max_count-- > 0);
+
+ if (tty) {
+ tty_flip_buffer_push(tty);
+ tty_kref_put(tty);
+ }
+}
+
+static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
+{
+ struct circ_buf *xmit = &up->port.state->xmit;
+ int count;
+
+ if (uart_tx_stopped(&up->port))
+ return;
+
+ count = up->port.fifosize;
+ do {
+ unsigned int rdata;
+
+ rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
+ if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
+ break;
+
+ if (up->port.x_char) {
+ ar933x_uart_putc(up, up->port.x_char);
+ up->port.icount.tx++;
+ up->port.x_char = 0;
+ continue;
+ }
+
+ if (uart_circ_empty(xmit))
+ break;
+
+ ar933x_uart_putc(up, xmit->buf[xmit->tail]);
+
+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+ up->port.icount.tx++;
+ } while (--count > 0);
+
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+ uart_write_wakeup(&up->port);
+
+ if (!uart_circ_empty(xmit))
+ ar933x_uart_start_tx_interrupt(up);
+}
+
+static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
+{
+ struct ar933x_uart_port *up = dev_id;
+ unsigned int status;
+
+ status = ar933x_uart_read(up, AR933X_UART_CS_REG);
+ if ((status & AR933X_UART_CS_HOST_INT) == 0)
+ return IRQ_NONE;
+
+ spin_lock(&up->port.lock);
+
+ status = ar933x_uart_read(up, AR933X_UART_INT_REG);
+ status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
+
+ if (status & AR933X_UART_INT_RX_VALID) {
+ ar933x_uart_write(up, AR933X_UART_INT_REG,
+ AR933X_UART_INT_RX_VALID);
+ ar933x_uart_rx_chars(up);
+ }
+
+ if (status & AR933X_UART_INT_TX_EMPTY) {
+ ar933x_uart_write(up, AR933X_UART_INT_REG,
+ AR933X_UART_INT_TX_EMPTY);
+ ar933x_uart_stop_tx_interrupt(up);
+ ar933x_uart_tx_chars(up);
+ }
+
+ spin_unlock(&up->port.lock);
+
+ return IRQ_HANDLED;
+}
+
+static int ar933x_uart_startup(struct uart_port *port)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+ unsigned long flags;
+ int ret;
+
+ ret = request_irq(up->port.irq, ar933x_uart_interrupt,
+ up->port.irqflags, dev_name(up->port.dev), up);
+ if (ret)
+ return ret;
+
+ spin_lock_irqsave(&up->port.lock, flags);
+
+ /* Enable HOST interrupts */
+ ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
+ AR933X_UART_CS_HOST_INT_EN);
+
+ /* Enable RX interrupts */
+ up->ier = AR933X_UART_INT_RX_VALID;
+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
+
+ spin_unlock_irqrestore(&up->port.lock, flags);
+
+ return 0;
+}
+
+static void ar933x_uart_shutdown(struct uart_port *port)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+
+ /* Disable all interrupts */
+ up->ier = 0;
+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
+
+ /* Disable break condition */
+ ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
+ AR933X_UART_CS_TX_BREAK);
+
+ free_irq(up->port.irq, up);
+}
+
+static const char *ar933x_uart_type(struct uart_port *port)
+{
+ return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
+}
+
+static void ar933x_uart_release_port(struct uart_port *port)
+{
+ /* Nothing to release ... */
+}
+
+static int ar933x_uart_request_port(struct uart_port *port)
+{
+ /* UARTs always present */
+ return 0;
+}
+
+static void ar933x_uart_config_port(struct uart_port *port, int flags)
+{
+ if (flags & UART_CONFIG_TYPE)
+ port->type = PORT_AR933X;
+}
+
+static int ar933x_uart_verify_port(struct uart_port *port,
+ struct serial_struct *ser)
+{
+ if (ser->type != PORT_UNKNOWN &&
+ ser->type != PORT_AR933X)
+ return -EINVAL;
+
+ if (ser->irq < 0 || ser->irq >= NR_IRQS)
+ return -EINVAL;
+
+ if (ser->baud_base < 28800)
+ return -EINVAL;
+
+ return 0;
+}
+
+static struct uart_ops ar933x_uart_ops = {
+ .tx_empty = ar933x_uart_tx_empty,
+ .set_mctrl = ar933x_uart_set_mctrl,
+ .get_mctrl = ar933x_uart_get_mctrl,
+ .stop_tx = ar933x_uart_stop_tx,
+ .start_tx = ar933x_uart_start_tx,
+ .stop_rx = ar933x_uart_stop_rx,
+ .enable_ms = ar933x_uart_enable_ms,
+ .break_ctl = ar933x_uart_break_ctl,
+ .startup = ar933x_uart_startup,
+ .shutdown = ar933x_uart_shutdown,
+ .set_termios = ar933x_uart_set_termios,
+ .type = ar933x_uart_type,
+ .release_port = ar933x_uart_release_port,
+ .request_port = ar933x_uart_request_port,
+ .config_port = ar933x_uart_config_port,
+ .verify_port = ar933x_uart_verify_port,
+};
+
+#ifdef CONFIG_SERIAL_AR933X_CONSOLE
+
+static struct ar933x_uart_port *
+ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
+
+static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
+{
+ unsigned int status;
+ unsigned int timeout = 60000;
+
+ /* Wait up to 60ms for the character(s) to be sent. */
+ do {
+ status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
+ if (--timeout == 0)
+ break;
+ udelay(1);
+ } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
+}
+
+static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+
+ ar933x_uart_wait_xmitr(up);
+ ar933x_uart_putc(up, ch);
+}
+
+static void ar933x_uart_console_write(struct console *co, const char *s,
+ unsigned int count)
+{
+ struct ar933x_uart_port *up = ar933x_console_ports[co->index];
+ unsigned long flags;
+ unsigned int int_en;
+ int locked = 1;
+
+ local_irq_save(flags);
+
+ if (up->port.sysrq)
+ locked = 0;
+ else if (oops_in_progress)
+ locked = spin_trylock(&up->port.lock);
+ else
+ spin_lock(&up->port.lock);
+
+ /*
+ * First save the IER then disable the interrupts
+ */
+ int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
+
+ uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
+
+ /*
+ * Finally, wait for transmitter to become empty
+ * and restore the IER
+ */
+ ar933x_uart_wait_xmitr(up);
+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
+
+ ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
+
+ if (locked)
+ spin_unlock(&up->port.lock);
+
+ local_irq_restore(flags);
+}
+
+static int ar933x_uart_console_setup(struct console *co, char *options)
+{
+ struct ar933x_uart_port *up;
+ int baud = 115200;
+ int bits = 8;
+ int parity = 'n';
+ int flow = 'n';
+
+ if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
+ return -EINVAL;
+
+ up = ar933x_console_ports[co->index];
+ if (!up)
+ return -ENODEV;
+
+ if (options)
+ uart_parse_options(options, &baud, &parity, &bits, &flow);
+
+ return uart_set_options(&up->port, co, baud, parity, bits, flow);
+}
+
+static struct console ar933x_uart_console = {
+ .name = "ttyATH",
+ .write = ar933x_uart_console_write,
+ .device = uart_console_device,
+ .setup = ar933x_uart_console_setup,
+ .flags = CON_PRINTBUFFER,
+ .index = -1,
+ .data = &ar933x_uart_driver,
+};
+
+static void ar933x_uart_add_console_port(struct ar933x_uart_port *up)
+{
+ ar933x_console_ports[up->port.line] = up;
+}
+
+#define AR933X_SERIAL_CONSOLE (&ar933x_uart_console)
+
+#else
+
+static inline void ar933x_uart_add_console_port(struct ar933x_uart_port *up) {}
+
+#define AR933X_SERIAL_CONSOLE NULL
+
+#endif /* CONFIG_SERIAL_AR933X_CONSOLE */
+
+static struct uart_driver ar933x_uart_driver = {
+ .owner = THIS_MODULE,
+ .driver_name = DRIVER_NAME,
+ .dev_name = "ttyATH",
+ .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
+ .cons = AR933X_SERIAL_CONSOLE,
+};
+
+static int __devinit ar933x_uart_probe(struct platform_device *pdev)
+{
+ struct ar933x_uart_platform_data *pdata;
+ struct ar933x_uart_port *up;
+ struct uart_port *port;
+ struct resource *mem_res;
+ struct resource *irq_res;
+ int id;
+ int ret;
+
+ pdata = pdev->dev.platform_data;
+ if (!pdata)
+ return -EINVAL;
+
+ id = pdev->id;
+ if (id == -1)
+ id = 0;
+
+ if (id > CONFIG_SERIAL_AR933X_NR_UARTS)
+ return -EINVAL;
+
+ mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem_res) {
+ dev_err(&pdev->dev, "no MEM resource\n");
+ return -EINVAL;
+ }
+
+ irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (!irq_res) {
+ dev_err(&pdev->dev, "no IRQ resource\n");
+ return -EINVAL;
+ }
+
+ up = kzalloc(sizeof(struct ar933x_uart_port), GFP_KERNEL);
+ if (!up)
+ return -ENOMEM;
+
+ port = &up->port;
+ port->mapbase = mem_res->start;
+
+ port->membase = ioremap(mem_res->start, AR933X_UART_REGS_SIZE);
+ if (!port->membase) {
+ ret = -ENOMEM;
+ goto err_free_up;
+ }
+
+ port->line = id;
+ port->irq = irq_res->start;
+ port->dev = &pdev->dev;
+ port->type = PORT_AR933X;
+ port->iotype = UPIO_MEM32;
+ port->uartclk = pdata->uartclk;
+
+ port->regshift = 2;
+ port->fifosize = AR933X_UART_FIFO_SIZE;
+ port->ops = &ar933x_uart_ops;
+
+ ar933x_uart_add_console_port(up);
+
+ ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
+ if (ret)
+ goto err_unmap;
+
+ platform_set_drvdata(pdev, up);
+ return 0;
+
+err_unmap:
+ iounmap(up->port.membase);
+err_free_up:
+ kfree(up);
+ return ret;
+}
+
+static int __devexit ar933x_uart_remove(struct platform_device *pdev)
+{
+ struct ar933x_uart_port *up;
+
+ up = platform_get_drvdata(pdev);
+ platform_set_drvdata(pdev, NULL);
+
+ if (up) {
+ uart_remove_one_port(&ar933x_uart_driver, &up->port);
+ iounmap(up->port.membase);
+ kfree(up);
+ }
+
+ return 0;
+}
+
+static struct platform_driver ar933x_uart_platform_driver = {
+ .probe = ar933x_uart_probe,
+ .remove = __devexit_p(ar933x_uart_remove),
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init ar933x_uart_init(void)
+{
+ int ret;
+
+ ar933x_uart_driver.nr = CONFIG_SERIAL_AR933X_NR_UARTS;
+ ret = uart_register_driver(&ar933x_uart_driver);
+ if (ret)
+ goto err_out;
+
+ ret = platform_driver_register(&ar933x_uart_platform_driver);
+ if (ret)
+ goto err_unregister_uart_driver;
+
+ return 0;
+
+err_unregister_uart_driver:
+ uart_unregister_driver(&ar933x_uart_driver);
+err_out:
+ return ret;
+}
+
+static void __exit ar933x_uart_exit(void)
+{
+ platform_driver_unregister(&ar933x_uart_platform_driver);
+ uart_unregister_driver(&ar933x_uart_driver);
+}
+
+module_init(ar933x_uart_init);
+module_exit(ar933x_uart_exit);
+
+MODULE_DESCRIPTION("Atheros AR933X UART driver");
+MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:" DRIVER_NAME);
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index a5c3114..8e5a45d 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -206,6 +206,10 @@
/* Xilinx PSS UART */
#define PORT_XUARTPS 98
+/* Atheros AR933X SoC */
+#define PORT_AR933X 99
+
+
#ifdef __KERNEL__
#include <linux/compiler.h>
--
1.7.2.1
^ permalink raw reply related [flat|nested] 33+ messages in thread* Re: [PATCH 11/13] serial: add driver for the built-in UART of the AR933X SoC
2011-06-20 19:26 ` [PATCH 11/13] serial: add driver for the built-in UART of the AR933X SoC Gabor Juhos
@ 2011-06-21 8:59 ` Alan Cox
2011-06-21 18:55 ` Gabor Juhos
2011-07-01 21:11 ` Greg KH
0 siblings, 2 replies; 33+ messages in thread
From: Alan Cox @ 2011-06-21 8:59 UTC (permalink / raw)
To: Gabor Juhos
Cc: Ralf Baechle, linux-mips, Kathy Giori, Luis R. Rodriguez,
linux-serial
Looks good to me
Signed-off-by: Alan Cox <alan@linux.intel.com>
and no problem here with it going via the MIPS tree (but make sure GregKH
is happy)
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH 11/13] serial: add driver for the built-in UART of the AR933X SoC
2011-06-21 8:59 ` Alan Cox
@ 2011-06-21 18:55 ` Gabor Juhos
2011-07-01 21:11 ` Greg KH
1 sibling, 0 replies; 33+ messages in thread
From: Gabor Juhos @ 2011-06-21 18:55 UTC (permalink / raw)
To: Alan Cox
Cc: Ralf Baechle, linux-mips, Kathy Giori, Luis R. Rodriguez,
linux-serial
Hi Alan,
> Looks good to me
>
> Signed-off-by: Alan Cox <alan@linux.intel.com>
Thank you!
> and no problem here with it going via the MIPS tree (but make sure GregKH
> is happy)
Of course.
Regards,
Gabor
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH 11/13] serial: add driver for the built-in UART of the AR933X SoC
2011-06-21 8:59 ` Alan Cox
2011-06-21 18:55 ` Gabor Juhos
@ 2011-07-01 21:11 ` Greg KH
2011-11-16 19:13 ` Ralf Baechle
1 sibling, 1 reply; 33+ messages in thread
From: Greg KH @ 2011-07-01 21:11 UTC (permalink / raw)
To: Alan Cox
Cc: Gabor Juhos, Ralf Baechle, linux-mips, Kathy Giori,
Luis R. Rodriguez, linux-serial
On Tue, Jun 21, 2011 at 09:59:51AM +0100, Alan Cox wrote:
> Looks good to me
>
> Signed-off-by: Alan Cox <alan@linux.intel.com>
>
> and no problem here with it going via the MIPS tree (but make sure GregKH
> is happy)
I'm happy with this.
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH 11/13] serial: add driver for the built-in UART of the AR933X SoC
2011-07-01 21:11 ` Greg KH
@ 2011-11-16 19:13 ` Ralf Baechle
0 siblings, 0 replies; 33+ messages in thread
From: Ralf Baechle @ 2011-11-16 19:13 UTC (permalink / raw)
To: Greg KH
Cc: Alan Cox, Gabor Juhos, linux-mips, Kathy Giori, Luis R. Rodriguez,
linux-serial
On Fri, Jul 01, 2011 at 02:11:23PM -0700, Greg KH wrote:
> On Tue, Jun 21, 2011 at 09:59:51AM +0100, Alan Cox wrote:
> > Looks good to me
> >
> > Signed-off-by: Alan Cox <alan@linux.intel.com>
> >
> > and no problem here with it going via the MIPS tree (but make sure GregKH
> > is happy)
>
> I'm happy with this.
Queued for 3.3. Thanks folks!,
Ralf
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH 12/13] MIPS: ath79: register UART device for the AR933X SoCs
2011-06-20 19:26 [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs Gabor Juhos
` (10 preceding siblings ...)
2011-06-20 19:26 ` [PATCH 11/13] serial: add driver for the built-in UART of the AR933X SoC Gabor Juhos
@ 2011-06-20 19:26 ` Gabor Juhos
2011-11-16 19:14 ` Ralf Baechle
2011-06-20 19:26 ` [PATCH 13/13] MIPS: ath79: add initial support for the Atheros AP121 reference board Gabor Juhos
2011-11-16 19:18 ` [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs Ralf Baechle
13 siblings, 1 reply; 33+ messages in thread
From: Gabor Juhos @ 2011-06-20 19:26 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips, Kathy Giori, Luis R. Rodriguez, Gabor Juhos
The AR933X SoCs does not have a 8250 compatible UART, they
are using a different UART core. Register a different platform
device for the different UART.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
arch/mips/ath79/dev-common.c | 38 ++++++++++++++++++++++++++++++++++++--
1 files changed, 36 insertions(+), 2 deletions(-)
diff --git a/arch/mips/ath79/dev-common.c b/arch/mips/ath79/dev-common.c
index 3b82e32..f4956f8 100644
--- a/arch/mips/ath79/dev-common.c
+++ b/arch/mips/ath79/dev-common.c
@@ -20,6 +20,7 @@
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
+#include <asm/mach-ath79/ar933x_uart_platform.h>
#include "common.h"
#include "dev-common.h"
@@ -54,6 +55,30 @@ static struct platform_device ath79_uart_device = {
},
};
+static struct resource ar933x_uart_resources[] = {
+ {
+ .start = AR933X_UART_BASE,
+ .end = AR933X_UART_BASE + AR71XX_UART_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = ATH79_MISC_IRQ_UART,
+ .end = ATH79_MISC_IRQ_UART,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct ar933x_uart_platform_data ar933x_uart_data;
+static struct platform_device ar933x_uart_device = {
+ .name = "ar933x-uart",
+ .id = -1,
+ .resource = ar933x_uart_resources,
+ .num_resources = ARRAY_SIZE(ar933x_uart_resources),
+ .dev = {
+ .platform_data = &ar933x_uart_data,
+ },
+};
+
void __init ath79_register_uart(void)
{
struct clk *clk;
@@ -62,8 +87,17 @@ void __init ath79_register_uart(void)
if (IS_ERR(clk))
panic("unable to get UART clock, err=%ld", PTR_ERR(clk));
- ath79_uart_data[0].uartclk = clk_get_rate(clk);
- platform_device_register(&ath79_uart_device);
+ if (soc_is_ar71xx() ||
+ soc_is_ar724x() ||
+ soc_is_ar913x()) {
+ ath79_uart_data[0].uartclk = clk_get_rate(clk);
+ platform_device_register(&ath79_uart_device);
+ } else if (soc_is_ar933x()) {
+ ar933x_uart_data.uartclk = clk_get_rate(clk);
+ platform_device_register(&ar933x_uart_device);
+ } else {
+ BUG();
+ }
}
static struct platform_device ath79_wdt_device = {
--
1.7.2.1
^ permalink raw reply related [flat|nested] 33+ messages in thread* [PATCH 13/13] MIPS: ath79: add initial support for the Atheros AP121 reference board
2011-06-20 19:26 [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs Gabor Juhos
` (11 preceding siblings ...)
2011-06-20 19:26 ` [PATCH 12/13] MIPS: ath79: register UART device for the AR933X SoCs Gabor Juhos
@ 2011-06-20 19:26 ` Gabor Juhos
2011-11-16 19:14 ` Ralf Baechle
2011-11-16 19:18 ` [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs Ralf Baechle
13 siblings, 1 reply; 33+ messages in thread
From: Gabor Juhos @ 2011-06-20 19:26 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips, Kathy Giori, Luis R. Rodriguez, Gabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
arch/mips/ath79/Kconfig | 11 +++++
arch/mips/ath79/Makefile | 1 +
arch/mips/ath79/mach-ap121.c | 88 ++++++++++++++++++++++++++++++++++++++++++
arch/mips/ath79/machtypes.h | 1 +
4 files changed, 101 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/ath79/mach-ap121.c
diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig
index c3680c8..4a7e0e8 100644
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
@@ -2,6 +2,17 @@ if ATH79
menu "Atheros AR71XX/AR724X/AR913X machine selection"
+config ATH79_MACH_AP121
+ bool "Atheros AP121 reference board"
+ select SOC_AR933X
+ select ATH79_DEV_GPIO_BUTTONS
+ select ATH79_DEV_LEDS_GPIO
+ select ATH79_DEV_SPI
+ select ATH79_DEV_USB
+ help
+ Say 'Y' here if you want your kernel to support the
+ Atheros AP121 reference board.
+
config ATH79_MACH_AP81
bool "Atheros AP81 reference board"
select SOC_AR913X
diff --git a/arch/mips/ath79/Makefile b/arch/mips/ath79/Makefile
index 57188b6..8933d18 100644
--- a/arch/mips/ath79/Makefile
+++ b/arch/mips/ath79/Makefile
@@ -25,5 +25,6 @@ obj-$(CONFIG_ATH79_DEV_USB) += dev-usb.o
#
# Machines
#
+obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o
obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o
obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o
diff --git a/arch/mips/ath79/mach-ap121.c b/arch/mips/ath79/mach-ap121.c
new file mode 100644
index 0000000..353af55
--- /dev/null
+++ b/arch/mips/ath79/mach-ap121.c
@@ -0,0 +1,88 @@
+/*
+ * Atheros AP121 board support
+ *
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "machtypes.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-spi.h"
+#include "dev-usb.h"
+
+#define AP121_GPIO_LED_WLAN 0
+#define AP121_GPIO_LED_USB 1
+
+#define AP121_GPIO_BTN_JUMPSTART 11
+#define AP121_GPIO_BTN_RESET 12
+
+#define AP121_KEYS_POLL_INTERVAL 20 /* msecs */
+#define AP121_KEYS_DEBOUNCE_INTERVAL (3 * AP121_KEYS_POLL_INTERVAL)
+
+#define AP121_CAL_DATA_ADDR 0x1fff1000
+
+static struct gpio_led ap121_leds_gpio[] __initdata = {
+ {
+ .name = "ap121:green:usb",
+ .gpio = AP121_GPIO_LED_USB,
+ .active_low = 0,
+ },
+ {
+ .name = "ap121:green:wlan",
+ .gpio = AP121_GPIO_LED_WLAN,
+ .active_low = 0,
+ },
+};
+
+static struct gpio_keys_button ap121_gpio_keys[] __initdata = {
+ {
+ .desc = "jumpstart button",
+ .type = EV_KEY,
+ .code = KEY_WPS_BUTTON,
+ .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = AP121_GPIO_BTN_JUMPSTART,
+ .active_low = 1,
+ },
+ {
+ .desc = "reset button",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = AP121_GPIO_BTN_RESET,
+ .active_low = 1,
+ }
+};
+
+static struct spi_board_info ap121_spi_info[] = {
+ {
+ .bus_num = 0,
+ .chip_select = 0,
+ .max_speed_hz = 25000000,
+ .modalias = "mx25l1606e",
+ }
+};
+
+static struct ath79_spi_platform_data ap121_spi_data = {
+ .bus_num = 0,
+ .num_chipselect = 1,
+};
+
+static void __init ap121_setup(void)
+{
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_leds_gpio),
+ ap121_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(ap121_gpio_keys),
+ ap121_gpio_keys);
+
+ ath79_register_spi(&ap121_spi_data, ap121_spi_info,
+ ARRAY_SIZE(ap121_spi_info));
+ ath79_register_usb();
+}
+
+MIPS_MACHINE(ATH79_MACH_AP121, "AP121", "Atheros AP121 reference board",
+ ap121_setup);
diff --git a/arch/mips/ath79/machtypes.h b/arch/mips/ath79/machtypes.h
index 3940fe4..6e28d51 100644
--- a/arch/mips/ath79/machtypes.h
+++ b/arch/mips/ath79/machtypes.h
@@ -16,6 +16,7 @@
enum ath79_mach_type {
ATH79_MACH_GENERIC = 0,
+ ATH79_MACH_AP121, /* Atheros AP121 reference board */
ATH79_MACH_AP81, /* Atheros AP81 reference board */
ATH79_MACH_PB44, /* Atheros PB44 reference board */
};
--
1.7.2.1
^ permalink raw reply related [flat|nested] 33+ messages in thread* Re: [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs
2011-06-20 19:26 [PATCH 00/13] MIPS: ath79: add initial support for AR933X SoCs Gabor Juhos
` (12 preceding siblings ...)
2011-06-20 19:26 ` [PATCH 13/13] MIPS: ath79: add initial support for the Atheros AP121 reference board Gabor Juhos
@ 2011-11-16 19:18 ` Ralf Baechle
13 siblings, 0 replies; 33+ messages in thread
From: Ralf Baechle @ 2011-11-16 19:18 UTC (permalink / raw)
To: Gabor Juhos; +Cc: linux-mips, Kathy Giori, Luis R. Rodriguez
On Mon, Jun 20, 2011 at 09:26:00PM +0200, Gabor Juhos wrote:
> This patch set adds initial support for the Atheros AR933X SoCs.
>
> The patch set depends on the following unmerged patches:
> MIPS: ath79: modify number of available IRQs
> MIPS: ath79: handle more MISC IRQs
> MIPS: ath79: add common USB Host Controller device
>
> Gabor Juhos (13):
> MIPS: ath79: remove superfluous parentheses
> MIPS: ath79: add revision id for the AR933X SoCs
> MIPS: ath79: add early printk support for the AR933X SoCs
> MIPS: ath79: add AR933X specific clock init
> MIPS: ath79: add AR933X specific glue for
> ath79_device_reset_{set,clear}
> MIPS: ath79: add AR933X specific IRQ initialization
> MIPS: ath79: add AR933X specific GPIO initialization
> MIPS: ath79: add config symbol for the AR933X SoCs
> USB: ehci-ath79: add device_id entry for the AR933X SoCs
> MIPS: ath79: add AR933X specific USB platform device registration
> serial: add driver for the built-in UART of the AR933X SoC
> MIPS: ath79: register UART device for the AR933X SoCs
> MIPS: ath79: add initial support for the Atheros AP121 reference
> board
I've merged this entire series and a previous 3 part series that is
required for this series to be applied. But the patches are no longer
entirely fresh. I'm going to review it for changes needed due to
changes elsewhere in the kernel and try to fix it up. I don't have
hardware to test on so I'd appreciate testing by others as a valuable
help to get this upstream for 3.3 in a good shape!
Thanks,
Ralf
^ permalink raw reply [flat|nested] 33+ messages in thread