From: Joerg Roedel <joro@8bytes.org>
To: Ingo Molnar <mingo@elte.hu>
Cc: Avi Kivity <avi@redhat.com>,
Robert Richter <robert.richter@amd.com>,
Benjamin Block <bebl@mageta.org>,
Hans Rosenfeld <hans.rosenfeld@amd.com>,
hpa@zytor.com, tglx@linutronix.de, suresh.b.siddha@intel.com,
eranian@google.com, brgerst@gmail.com, Andreas.Herrmann3@amd.com,
x86@kernel.org, linux-kernel@vger.kernel.org,
Benjamin Block <benjamin.block@amd.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>
Subject: Re: [RFC 4/5] x86, perf: implements lwp-perf-integration (rc1)
Date: Wed, 21 Dec 2011 01:07:16 +0100 [thread overview]
Message-ID: <20111221000716.GB30127@8bytes.org> (raw)
In-Reply-To: <20111220184004.GE8408@elte.hu>
On Tue, Dec 20, 2011 at 07:40:04PM +0100, Ingo Molnar wrote:
> > I am fine with integrating LWP into perf as long as it makes
> > sense and does not break the intended usage scenario for LWP.
>
> That's the wrong way around - in reality we'll integrate LWP
> upstream only once it makes sense and works well with the
> primary instrumentation abstraction we have in the kernel.
I still don't see why you want an abstraction for a hardware feature
that clearly doesn't need it. From an enablement perspective LWP is much
closer to AVX than to the MSR based PMU. And nobody really wants or
needs a kernel abstraction for AVX, no?
> Me or PeterZ could just say "this feature is too limited and not
> convincing enough yet, sorry".
This statement shows very clearly the bottom-line of our conflict. You
see this as a perf-topic, for everyone else it is an x86 topic.
> But i'm being nice and helpful here [...]
And I appreciate the discussion. But we have fundamentally different
stand-points. I hope we can come to an agreement.
> There's no "security implications" whatsoever. LWP is a ring-3
> hw feature and it can do nothing that the user-space app could
> not already do ...
Really? How could an application count DCache misses today without
instrumentation? I guess your answer is 'with perf', but LWP is a much
more light-weight way to do that because it works _completly_ in
hardware when the kernel supports context-switching it.
>
> > [...] It also destroys the intended use-case for LWP because
> > it disturbs any process that is doing self-profiling with LWP.
>
> Why would it destroy that? Self-profiling can install events
> just fine, the kernel will arbitrate the resource.
Because you can't reliably hand over the LWPCB management to the kernel.
The instruction to load a new LWPCB is executable in ring-3. Any
kernel-use of LWP will never be reliable.
> > So what you are saying is (not just here, also in other emails
> > in this thread) that every hardware not designed for perf is
> > crap?
>
> No - PMU hardware designed to not allow the profiling of the
> kernel is obviously a crappy aspect of it. Also, PMU hardware
> that does not allow 100% encapsulation by the kernel is
> obviously not very wisely done either.
Why? Whats wrong with user-space having control over its own PMU in a
safe way? This is what the feature was designed for.
Thanks,
Joerg
next prev parent reply other threads:[~2011-12-21 0:07 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-29 12:41 [PATCH 0/9] rework of extended state handling, LWP support Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 1/9] x86, xsave: warn on #NM exceptions caused by the kernel Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 2/9] x86, xsave: cleanup fpu/xsave support Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 3/9] x86, xsave: cleanup fpu/xsave signal frame setup Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 4/9] x86, xsave: rework fpu/xsave support Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 5/9] x86, xsave: remove unused code Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 6/9] x86, xsave: more cleanups Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 7/9] x86, xsave: remove lazy allocation of xstate area Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 8/9] x86, xsave: add support for non-lazy xstates Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 9/9] x86, xsave: add kernel support for AMDs Lightweight Profiling (LWP) Hans Rosenfeld
2011-11-29 21:31 ` [PATCH 0/9] rework of extended state handling, LWP support Andi Kleen
2011-11-30 17:37 ` Hans Rosenfeld
2011-11-30 21:52 ` Andi Kleen
2011-12-01 20:36 ` Hans Rosenfeld
2011-12-02 2:01 ` H. Peter Anvin
2011-12-02 11:20 ` Hans Rosenfeld
2011-12-07 19:57 ` Hans Rosenfeld
2011-12-07 20:00 ` [PATCH 7/8] x86, xsave: add support for non-lazy xstates Hans Rosenfeld
2011-12-07 20:00 ` [PATCH 8/8] x86, xsave: add kernel support for AMDs Lightweight Profiling (LWP) Hans Rosenfeld
2011-12-05 10:22 ` [PATCH 0/9] rework of extended state handling, LWP support Ingo Molnar
2011-12-16 16:07 ` Hans Rosenfeld
2011-12-16 16:12 ` [RFC 1/5] x86, perf: Implement software-activation of lwp Hans Rosenfeld
2011-12-16 16:12 ` [RFC 2/5] perf: adds prototype for a new perf-context-type Hans Rosenfeld
2011-12-16 16:12 ` [RFC 3/5] perf: adds a new pmu-initialization-call Hans Rosenfeld
2011-12-16 16:12 ` [RFC 4/5] x86, perf: implements lwp-perf-integration (rc1) Hans Rosenfeld
2011-12-18 8:04 ` Ingo Molnar
2011-12-18 15:22 ` Benjamin Block
2011-12-18 23:43 ` Ingo Molnar
2011-12-19 9:09 ` Robert Richter
2011-12-19 10:54 ` Ingo Molnar
2011-12-19 11:12 ` Avi Kivity
2011-12-19 11:40 ` Ingo Molnar
2011-12-19 11:58 ` Avi Kivity
2011-12-19 18:13 ` Benjamin
2011-12-20 8:56 ` Ingo Molnar
2011-12-20 9:15 ` Ingo Molnar
2011-12-20 9:47 ` Avi Kivity
2011-12-20 10:09 ` Ingo Molnar
2011-12-20 15:27 ` Joerg Roedel
2011-12-20 18:40 ` Ingo Molnar
2011-12-21 0:07 ` Joerg Roedel [this message]
2011-12-21 12:34 ` Ingo Molnar
2011-12-21 12:44 ` Avi Kivity
2011-12-21 13:22 ` Ingo Molnar
2011-12-21 22:49 ` Joerg Roedel
2011-12-23 10:53 ` Ingo Molnar
2011-12-21 11:46 ` Gleb Natapov
2011-12-23 10:56 ` Ingo Molnar
2011-12-20 15:48 ` Vince Weaver
2011-12-20 18:27 ` Ingo Molnar
2011-12-20 22:47 ` Vince Weaver
2011-12-21 12:00 ` Ingo Molnar
2011-12-21 13:55 ` Vince Weaver
2011-12-16 16:12 ` [RFC 5/5] x86, perf: adds support for the LWP threshold-int Hans Rosenfeld
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