From: sameo@linux.intel.com (Samuel Ortiz)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 1/2] mfd: Add anatop mfd driver
Date: Tue, 21 Feb 2012 12:17:05 +0100 [thread overview]
Message-ID: <20120221111705.GV5387@sortiz-mobl> (raw)
In-Reply-To: <1328734286-30091-1-git-send-email-paul.liu@linaro.org>
Hi Paul,
I didn't get patch #2, so I don't get to see how the read/write functions ar
eused for example.
On Thu, Feb 09, 2012 at 04:51:25AM +0800, Ying-Chun Liu (PaulLiu) wrote:
> From: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
>
> Anatop is a mfd chip embedded in Freescale i.MX6Q SoC.
> Anatop provides regulators and thermal.
> This driver handles the address space and the operation of the mfd device.
A few comments here:
> +static u32 anatop_read(struct anatop *adata, u32 addr, int bit_shift, int bits)
> +{
> + u32 val;
> + int mask;
> + if (bits == 32)
> + mask = 0xff;
> + else
> + mask = (1 << bits) - 1;
> +
> + val = ioread32(adata->ioreg+addr);
> + val = (val >> bit_shift) & mask;
> + return val;
> +}
> +
> +static void anatop_write(struct anatop *adata, u32 addr, int bit_shift,
> + int bits, u32 data)
> +{
> + u32 val;
> + int mask;
> + if (bits == 32)
> + mask = 0xff;
> + else
> + mask = (1 << bits) - 1;
> +
> + val = ioread32(adata->ioreg+addr) & ~(mask << bit_shift);
> + iowrite32((data << bit_shift) | val, adata->ioreg);
> +}
Don't you need some sort of read/write atomic routine as well ? Locking would
be needed then...
> +static const struct of_device_id of_anatop_regulator_match[] = {
> + {
> + .compatible = "fsl,anatop-regulator",
> + },
> + {
> + .compatible = "fsl,anatop-thermal",
> + },
> + { },
> +};
> +
> +static int of_anatop_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *np = dev->of_node;
> + u64 ofaddr;
> + u64 ofsize;
> + void *ioreg;
> + struct anatop *drvdata;
> + int ret = 0;
> + const __be32 *rval;
> +
> + rval = of_get_address(np, 0, &ofsize, NULL);
> + if (rval)
> + ofaddr = be32_to_cpu(*rval);
> + else
> + return -EINVAL;
> +
> + ioreg = ioremap(ofaddr, ofsize);
> + if (!ioreg)
> + return -EINVAL;
> + drvdata = devm_kzalloc(dev, sizeof(struct anatop), GFP_KERNEL);
> + if (!drvdata)
> + return -EINVAL;
> + drvdata->ioreg = ioreg;
> + drvdata->read = anatop_read;
> + drvdata->write = anatop_write;
> + platform_set_drvdata(pdev, drvdata);
> + of_platform_bus_probe(np, of_anatop_regulator_match, dev);
> + return ret;
> +}
So it seems that your driver here does nothing but extending your device tree
definition. Correct me if I'm wrong, aren't you trying to fix a broken device
tree definition here ?
Cheers,
Samuel.
--
Intel Open Source Technology Centre
http://oss.intel.com/
WARNING: multiple messages have this Message-ID (diff)
From: Samuel Ortiz <sameo@linux.intel.com>
To: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
Cc: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linaro-dev@lists.linaro.org, patches@linaro.org,
eric.miao@linaro.org, shawn.guo@linaro.org
Subject: Re: [PATCH v4 1/2] mfd: Add anatop mfd driver
Date: Tue, 21 Feb 2012 12:17:05 +0100 [thread overview]
Message-ID: <20120221111705.GV5387@sortiz-mobl> (raw)
In-Reply-To: <1328734286-30091-1-git-send-email-paul.liu@linaro.org>
Hi Paul,
I didn't get patch #2, so I don't get to see how the read/write functions ar
eused for example.
On Thu, Feb 09, 2012 at 04:51:25AM +0800, Ying-Chun Liu (PaulLiu) wrote:
> From: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
>
> Anatop is a mfd chip embedded in Freescale i.MX6Q SoC.
> Anatop provides regulators and thermal.
> This driver handles the address space and the operation of the mfd device.
A few comments here:
> +static u32 anatop_read(struct anatop *adata, u32 addr, int bit_shift, int bits)
> +{
> + u32 val;
> + int mask;
> + if (bits == 32)
> + mask = 0xff;
> + else
> + mask = (1 << bits) - 1;
> +
> + val = ioread32(adata->ioreg+addr);
> + val = (val >> bit_shift) & mask;
> + return val;
> +}
> +
> +static void anatop_write(struct anatop *adata, u32 addr, int bit_shift,
> + int bits, u32 data)
> +{
> + u32 val;
> + int mask;
> + if (bits == 32)
> + mask = 0xff;
> + else
> + mask = (1 << bits) - 1;
> +
> + val = ioread32(adata->ioreg+addr) & ~(mask << bit_shift);
> + iowrite32((data << bit_shift) | val, adata->ioreg);
> +}
Don't you need some sort of read/write atomic routine as well ? Locking would
be needed then...
> +static const struct of_device_id of_anatop_regulator_match[] = {
> + {
> + .compatible = "fsl,anatop-regulator",
> + },
> + {
> + .compatible = "fsl,anatop-thermal",
> + },
> + { },
> +};
> +
> +static int of_anatop_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *np = dev->of_node;
> + u64 ofaddr;
> + u64 ofsize;
> + void *ioreg;
> + struct anatop *drvdata;
> + int ret = 0;
> + const __be32 *rval;
> +
> + rval = of_get_address(np, 0, &ofsize, NULL);
> + if (rval)
> + ofaddr = be32_to_cpu(*rval);
> + else
> + return -EINVAL;
> +
> + ioreg = ioremap(ofaddr, ofsize);
> + if (!ioreg)
> + return -EINVAL;
> + drvdata = devm_kzalloc(dev, sizeof(struct anatop), GFP_KERNEL);
> + if (!drvdata)
> + return -EINVAL;
> + drvdata->ioreg = ioreg;
> + drvdata->read = anatop_read;
> + drvdata->write = anatop_write;
> + platform_set_drvdata(pdev, drvdata);
> + of_platform_bus_probe(np, of_anatop_regulator_match, dev);
> + return ret;
> +}
So it seems that your driver here does nothing but extending your device tree
definition. Correct me if I'm wrong, aren't you trying to fix a broken device
tree definition here ?
Cheers,
Samuel.
--
Intel Open Source Technology Centre
http://oss.intel.com/
next prev parent reply other threads:[~2012-02-21 11:17 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-07 13:53 [PATCH] Regulator: Add Anatop regulator driver Ying-Chun Liu (PaulLiu)
2011-12-07 13:53 ` Ying-Chun Liu (PaulLiu)
2011-12-07 15:54 ` Mark Brown
2011-12-07 16:30 ` Ying-Chun Liu (PaulLiu)
2011-12-21 9:03 ` [PATCHv2] " Ying-Chun Liu (PaulLiu)
2011-12-22 11:33 ` Mark Brown
2011-12-24 12:37 ` Mark Brown
2011-12-27 10:06 ` Ying-Chun Liu (PaulLiu)
2011-12-27 10:40 ` Mark Brown
2011-12-27 10:16 ` [PATCH v3] " Ying-Chun Liu (PaulLiu)
2011-12-27 10:52 ` Mark Brown
2011-12-27 11:38 ` Shawn Guo
2012-02-08 20:51 ` [PATCH v4 1/2] mfd: Add anatop mfd driver Ying-Chun Liu (PaulLiu)
2012-02-08 20:51 ` Ying-Chun Liu (PaulLiu)
2012-02-08 20:51 ` [PATCH v4 2/2] Regulator: Add Anatop regulator driver Ying-Chun Liu (PaulLiu)
2012-02-08 20:51 ` Ying-Chun Liu (PaulLiu)
2012-02-09 11:24 ` Mark Brown
2012-02-09 11:24 ` Mark Brown
2012-02-11 6:36 ` Shawn Guo
2012-02-11 6:36 ` Shawn Guo
2012-02-11 13:17 ` Mark Brown
2012-02-11 13:17 ` Mark Brown
2012-02-11 6:05 ` [PATCH v4 1/2] mfd: Add anatop mfd driver Shawn Guo
2012-02-11 6:05 ` Shawn Guo
2012-02-21 11:17 ` Samuel Ortiz [this message]
2012-02-21 11:17 ` Samuel Ortiz
2012-03-01 9:19 ` Ying-Chun Liu (PaulLiu)
2012-03-01 9:19 ` Ying-Chun Liu (PaulLiu)
2012-03-01 9:10 ` [PATCH v5 " Ying-Chun Liu (PaulLiu)
2012-03-01 9:10 ` Ying-Chun Liu (PaulLiu)
2012-03-01 9:10 ` [PATCH v5 2/2] Regulator: Add Anatop regulator driver Ying-Chun Liu (PaulLiu)
2012-03-01 9:10 ` Ying-Chun Liu (PaulLiu)
2012-03-01 11:17 ` Mark Brown
2012-03-01 11:17 ` Mark Brown
2012-03-01 11:30 ` [PATCH v5 1/2] mfd: Add anatop mfd driver Mark Brown
2012-03-01 11:30 ` Mark Brown
2012-03-02 7:00 ` [PATCH v6 " Ying-Chun Liu (PaulLiu)
2012-03-02 7:00 ` Ying-Chun Liu (PaulLiu)
2012-03-02 7:00 ` [PATCH v6 2/2] Regulator: Add Anatop regulator driver Ying-Chun Liu (PaulLiu)
2012-03-02 7:00 ` Ying-Chun Liu (PaulLiu)
2012-03-04 6:51 ` Shawn Guo
2012-03-04 6:51 ` Shawn Guo
2012-03-04 13:29 ` Mark Brown
2012-03-04 13:29 ` Mark Brown
2012-03-02 7:07 ` [PATCH v6 1/2] mfd: Add anatop mfd driver Venu Byravarasu
2012-03-02 7:07 ` Venu Byravarasu
2012-03-02 7:51 ` Ying-Chun Liu (PaulLiu)
2012-03-02 7:51 ` Ying-Chun Liu (PaulLiu)
2012-03-02 8:02 ` Venu Byravarasu
2012-03-02 8:02 ` Venu Byravarasu
2012-03-02 14:00 ` Peter Korsgaard
2012-03-02 14:00 ` Peter Korsgaard
2012-03-03 17:39 ` [PATCH v7 " Ying-Chun Liu (PaulLiu)
2012-03-03 17:39 ` Ying-Chun Liu (PaulLiu)
2012-03-03 17:58 ` Mark Brown
2012-03-03 17:58 ` Mark Brown
2012-03-04 5:25 ` Shawn Guo
2012-03-04 5:25 ` Shawn Guo
2012-03-04 5:42 ` Shawn Guo
2012-03-04 5:42 ` Shawn Guo
2012-03-04 5:55 ` Shawn Guo
2012-03-04 5:55 ` Shawn Guo
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