From: Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
To: "Uwe Kleine-König"
<u.kleine-koenig-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Cc: Fabio Estevam <festevam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Wolfram Sang <w.sang-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH] i2c: mxs: disable QUEUE when sending is done
Date: Sat, 28 Apr 2012 15:33:35 +0200 [thread overview]
Message-ID: <201204281533.35277.marex@denx.de> (raw)
In-Reply-To: <20120428102601.GO20039-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Dear Uwe Kleine-König,
> On Fri, Apr 27, 2012 at 11:51:56AM -0300, Fabio Estevam wrote:
> > Hi Wolfram,
> >
> > On Fri, Apr 27, 2012 at 11:23 AM, Wolfram Sang <w.sang@pengutronix.de>
wrote:
> > > if (i2c->cmd_err == -ENXIO)
> > > mxs_i2c_reset(i2c);
> > > + else
> > > + writel(MXS_I2C_QUEUECTRL_QUEUE_RUN,
> > > + i2c->regs + MXS_I2C_QUEUECTRL_CLR);
> >
> > When setting the QUEUE_RUN, do we really want to clear all the other
> > bits of QUEUECTRL_CLR register?
> >
> > I am wondering if we should only set QUEUE_RUN bit here.
>
> I didn't check the manual, but I guess writing to MXS_I2C_QUEUECTRL_CLR
> just clears the QUEUE_RUN bit and nothing else?!
I think the RUN bit will be cleared by the controller anyway, so this patch is
pointless.
>
> Best regards
> Uwe
Best regards,
Marek Vasut
WARNING: multiple messages have this Message-ID (diff)
From: marex@denx.de (Marek Vasut)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] i2c: mxs: disable QUEUE when sending is done
Date: Sat, 28 Apr 2012 15:33:35 +0200 [thread overview]
Message-ID: <201204281533.35277.marex@denx.de> (raw)
In-Reply-To: <20120428102601.GO20039@pengutronix.de>
Dear Uwe Kleine-K?nig,
> On Fri, Apr 27, 2012 at 11:51:56AM -0300, Fabio Estevam wrote:
> > Hi Wolfram,
> >
> > On Fri, Apr 27, 2012 at 11:23 AM, Wolfram Sang <w.sang@pengutronix.de>
wrote:
> > > if (i2c->cmd_err == -ENXIO)
> > > mxs_i2c_reset(i2c);
> > > + else
> > > + writel(MXS_I2C_QUEUECTRL_QUEUE_RUN,
> > > + i2c->regs + MXS_I2C_QUEUECTRL_CLR);
> >
> > When setting the QUEUE_RUN, do we really want to clear all the other
> > bits of QUEUECTRL_CLR register?
> >
> > I am wondering if we should only set QUEUE_RUN bit here.
>
> I didn't check the manual, but I guess writing to MXS_I2C_QUEUECTRL_CLR
> just clears the QUEUE_RUN bit and nothing else?!
I think the RUN bit will be cleared by the controller anyway, so this patch is
pointless.
>
> Best regards
> Uwe
Best regards,
Marek Vasut
next prev parent reply other threads:[~2012-04-28 13:33 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-27 14:23 [PATCH] i2c: mxs: disable QUEUE when sending is done Wolfram Sang
2012-04-27 14:23 ` Wolfram Sang
[not found] ` <1335536631-28202-1-git-send-email-w.sang-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2012-04-27 14:51 ` Fabio Estevam
2012-04-27 14:51 ` Fabio Estevam
[not found] ` <CAOMZO5A1_Z7T5md61OJWmXbx2qCjFEByjyGvjhxqhfxzwfLEVQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2012-04-28 10:26 ` Uwe Kleine-König
2012-04-28 10:26 ` Uwe Kleine-König
[not found] ` <20120428102601.GO20039-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2012-04-28 13:33 ` Marek Vasut [this message]
2012-04-28 13:33 ` Marek Vasut
[not found] ` <201204281533.35277.marex-ynQEQJNshbs@public.gmane.org>
2012-04-29 8:43 ` Wolfram Sang
2012-04-29 8:43 ` Wolfram Sang
[not found] ` <20120429084324.GA3001-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2012-04-29 9:11 ` Marek Vasut
2012-04-29 9:11 ` Marek Vasut
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