From: catalin.marinas@arm.com (Catalin Marinas)
To: linux-arm-kernel@lists.infradead.org
Subject: Query about: ARM11 MPCore: preemption/task migration cache coherency
Date: Thu, 31 May 2012 11:12:23 +0800 [thread overview]
Message-ID: <20120531031222.GC29372@mbp> (raw)
In-Reply-To: <4FC6E172.4080601@gmail.com>
On Thu, May 31, 2012 at 04:11:46AM +0100, bill4carson wrote:
> On 2012?05?31? 11:00, Catalin Marinas wrote:
> > AFAIK, The SCU only snoops the D-cache, not the I-cache. We have a full
> > I-cache invalidation during task migration.
>
> ^^^^^^^^^^^^
> Could you please point it to me?
There is a check in switch_mm() in the asm/mmu_context.h file.
--
Catalin
next prev parent reply other threads:[~2012-05-31 3:12 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-09 9:11 Query about: ARM11 MPCore: preemption/task migration cache coherency bill4carson
2012-05-11 8:51 ` Will Deacon
2012-05-11 9:53 ` bill4carson
2012-05-29 5:28 ` bill4carson
2012-05-30 6:38 ` Will Deacon
2012-05-30 10:01 ` bill4carson
2012-05-31 3:00 ` Catalin Marinas
2012-05-31 3:11 ` bill4carson
2012-05-31 3:12 ` Catalin Marinas [this message]
2012-05-31 3:19 ` Catalin Marinas
2012-05-31 3:38 ` bill4carson
2012-05-31 3:58 ` Catalin Marinas
2012-05-31 5:06 ` bill4carson
2012-05-31 5:19 ` Catalin Marinas
2012-05-31 5:51 ` bill4carson
2012-05-31 6:56 ` Catalin Marinas
2012-05-31 7:21 ` bill4carson
2012-05-31 7:46 ` snakky.zhang at gmail.com
2012-05-31 16:04 ` Catalin Marinas
2012-06-01 1:11 ` snakky.zhang at gmail.com
2012-06-01 3:25 ` Catalin Marinas
2012-06-01 5:21 ` snakky.zhang at gmail.com
2012-06-01 1:34 ` snakky.zhang at gmail.com
2012-06-01 3:29 ` Catalin Marinas
2012-06-03 11:34 ` Russell King - ARM Linux
2012-06-04 9:20 ` snakky.zhang at gmail.com
2012-06-05 4:06 ` George G. Davis
2012-06-05 4:50 ` bill4carson
2012-06-06 6:18 ` Andrew Yan-Pai Chen
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