From: Zhao Chenhui <chenhui.zhao@freescale.com>
To: Scott Wood <scottwood@freescale.com>
Cc: Matthew McClintock <msm@freescale.com>,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 1/5] powerpc/85xx: implement hardware timebase sync
Date: Wed, 6 Jun 2012 17:31:42 +0800 [thread overview]
Message-ID: <20120606093142.GA23505@localhost.localdomain> (raw)
In-Reply-To: <4FCE2ECD.4050107@freescale.com>
On Tue, Jun 05, 2012 at 11:07:41AM -0500, Scott Wood wrote:
> On 06/05/2012 04:08 AM, Zhao Chenhui wrote:
> > On Fri, Jun 01, 2012 at 10:40:00AM -0500, Scott Wood wrote:
> >> I know you say this is for dual-core chips only, but it would be nice if
> >> you'd write this in a way that doesn't assume that (even if the
> >> corenet-specific timebase freezing comes later).
> >
> > At this point, I have not thought about how to implement the cornet-specific timebase freezing.
>
> I wasn't asking you to. I was asking you to not have logic that breaks
> with more than 2 CPUs.
These routines only called in the dual-core case.
>
> >> Do we need an isync after setting the timebase, to ensure it's happened
> >> before we enable the timebase? Likewise, do we need a readback after
> >> disabling the timebase to ensure it's disabled before we read the
> >> timebase in give_timebase?
> >
> > I checked the e500 core manual (Chapter 2.16 Synchronization Requirements for SPRs).
> > Only some SPR registers need an isync. The timebase registers do not.
>
> I don't trust that, and the consequences of having the sync be imperfect
> are too unpleasant to chance it.
>
> > I did a readback in mpc85xx_timebase_freeze().
>
> Sorry, missed that somehow.
>
> >>> +#ifdef CONFIG_KEXEC
> >>> + np = of_find_matching_node(NULL, guts_ids);
> >>> + if (np) {
> >>> + guts = of_iomap(np, 0);
> >>> + smp_85xx_ops.give_timebase = mpc85xx_give_timebase;
> >>> + smp_85xx_ops.take_timebase = mpc85xx_take_timebase;
> >>> + of_node_put(np);
> >>> + } else {
> >>> + smp_85xx_ops.give_timebase = smp_generic_give_timebase;
> >>> + smp_85xx_ops.take_timebase = smp_generic_take_timebase;
> >>> + }
> >>
> >> Do not use smp_generic_give/take_timebase, ever. If you don't have the
> >> guts node, then just assume the timebase is already synced.
> >>
> >> -Scott
> >
> > smp_generic_give/take_timebase is the default in KEXEC before.
>
> That was a mistake.
>
> > If do not set them, it may make KEXEC fail on other platforms.
>
> What platforms?
>
> -Scott
Such as P4080, P3041, etc.
-Chenhui
WARNING: multiple messages have this Message-ID (diff)
From: Zhao Chenhui <chenhui.zhao@freescale.com>
To: Scott Wood <scottwood@freescale.com>
Cc: <linuxppc-dev@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>,
<galak@kernel.crashing.org>, <leoli@freescale.com>,
Matthew McClintock <msm@freescale.com>
Subject: Re: [PATCH v5 1/5] powerpc/85xx: implement hardware timebase sync
Date: Wed, 6 Jun 2012 17:31:42 +0800 [thread overview]
Message-ID: <20120606093142.GA23505@localhost.localdomain> (raw)
In-Reply-To: <4FCE2ECD.4050107@freescale.com>
On Tue, Jun 05, 2012 at 11:07:41AM -0500, Scott Wood wrote:
> On 06/05/2012 04:08 AM, Zhao Chenhui wrote:
> > On Fri, Jun 01, 2012 at 10:40:00AM -0500, Scott Wood wrote:
> >> I know you say this is for dual-core chips only, but it would be nice if
> >> you'd write this in a way that doesn't assume that (even if the
> >> corenet-specific timebase freezing comes later).
> >
> > At this point, I have not thought about how to implement the cornet-specific timebase freezing.
>
> I wasn't asking you to. I was asking you to not have logic that breaks
> with more than 2 CPUs.
These routines only called in the dual-core case.
>
> >> Do we need an isync after setting the timebase, to ensure it's happened
> >> before we enable the timebase? Likewise, do we need a readback after
> >> disabling the timebase to ensure it's disabled before we read the
> >> timebase in give_timebase?
> >
> > I checked the e500 core manual (Chapter 2.16 Synchronization Requirements for SPRs).
> > Only some SPR registers need an isync. The timebase registers do not.
>
> I don't trust that, and the consequences of having the sync be imperfect
> are too unpleasant to chance it.
>
> > I did a readback in mpc85xx_timebase_freeze().
>
> Sorry, missed that somehow.
>
> >>> +#ifdef CONFIG_KEXEC
> >>> + np = of_find_matching_node(NULL, guts_ids);
> >>> + if (np) {
> >>> + guts = of_iomap(np, 0);
> >>> + smp_85xx_ops.give_timebase = mpc85xx_give_timebase;
> >>> + smp_85xx_ops.take_timebase = mpc85xx_take_timebase;
> >>> + of_node_put(np);
> >>> + } else {
> >>> + smp_85xx_ops.give_timebase = smp_generic_give_timebase;
> >>> + smp_85xx_ops.take_timebase = smp_generic_take_timebase;
> >>> + }
> >>
> >> Do not use smp_generic_give/take_timebase, ever. If you don't have the
> >> guts node, then just assume the timebase is already synced.
> >>
> >> -Scott
> >
> > smp_generic_give/take_timebase is the default in KEXEC before.
>
> That was a mistake.
>
> > If do not set them, it may make KEXEC fail on other platforms.
>
> What platforms?
>
> -Scott
Such as P4080, P3041, etc.
-Chenhui
next prev parent reply other threads:[~2012-06-06 9:31 UTC|newest]
Thread overview: 77+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-11 11:53 [PATCH v5 1/5] powerpc/85xx: implement hardware timebase sync Zhao Chenhui
2012-05-11 11:53 ` Zhao Chenhui
2012-05-11 11:53 ` [PATCH v5 2/5] powerpc/85xx: add HOTPLUG_CPU support Zhao Chenhui
2012-05-11 11:53 ` Zhao Chenhui
2012-06-01 21:27 ` Scott Wood
2012-06-01 21:27 ` Scott Wood
2012-06-04 11:04 ` Zhao Chenhui
2012-06-04 11:04 ` Zhao Chenhui
2012-06-04 16:32 ` Scott Wood
2012-06-04 16:32 ` Scott Wood
2012-06-05 11:18 ` Zhao Chenhui
2012-06-05 11:18 ` Zhao Chenhui
2012-06-05 16:15 ` Scott Wood
2012-06-05 16:15 ` Scott Wood
2012-06-06 9:59 ` Zhao Chenhui
2012-06-06 9:59 ` Zhao Chenhui
2012-06-06 18:19 ` Scott Wood
2012-06-06 18:19 ` Scott Wood
2012-05-11 11:53 ` [PATCH v5 3/5] powerpc/85xx: add sleep and deep sleep support Zhao Chenhui
2012-05-11 11:53 ` Zhao Chenhui
2012-06-01 21:54 ` Scott Wood
2012-06-01 21:54 ` Scott Wood
2012-06-04 11:12 ` Zhao Chenhui
2012-06-04 11:12 ` Zhao Chenhui
2012-06-04 22:58 ` Scott Wood
2012-06-04 22:58 ` Scott Wood
2012-06-05 11:35 ` Zhao Chenhui
2012-06-05 11:35 ` Zhao Chenhui
2012-06-05 16:13 ` Scott Wood
2012-06-05 16:13 ` Scott Wood
2012-05-11 11:53 ` [PATCH v5 4/5] fsl_pmc: Add API to enable device as wakeup event source Zhao Chenhui
2012-05-11 11:53 ` Zhao Chenhui
2012-06-01 22:08 ` Scott Wood
2012-06-01 22:08 ` Scott Wood
2012-06-04 11:36 ` Zhao Chenhui
2012-06-04 11:36 ` Zhao Chenhui
2012-06-04 23:02 ` Scott Wood
2012-06-04 23:02 ` Scott Wood
2012-06-05 4:08 ` Li Yang-R58472
2012-06-05 4:08 ` Li Yang-R58472
2012-06-05 16:11 ` Scott Wood
2012-06-05 16:11 ` Scott Wood
2012-06-05 16:49 ` Li Yang-R58472
2012-06-05 16:49 ` Li Yang-R58472
2012-06-05 18:05 ` Scott Wood
2012-06-05 18:05 ` Scott Wood
2012-06-06 4:06 ` Li Yang
2012-06-06 4:06 ` Li Yang
2012-06-06 18:29 ` Scott Wood
2012-06-06 18:29 ` Scott Wood
2012-06-07 4:10 ` Li Yang
2012-06-07 4:10 ` Li Yang
2012-05-11 11:53 ` [PATCH v5 5/5] powerpc/85xx: add support to JOG feature using cpufreq interface Zhao Chenhui
2012-05-11 11:53 ` Zhao Chenhui
2012-06-01 23:30 ` Scott Wood
2012-06-01 23:30 ` Scott Wood
2012-06-05 10:59 ` Zhao Chenhui
2012-06-05 10:59 ` Zhao Chenhui
2012-06-05 15:58 ` Scott Wood
2012-06-05 15:58 ` Scott Wood
2012-06-06 10:19 ` Zhao Chenhui
2012-06-06 10:19 ` Zhao Chenhui
2012-05-29 7:30 ` [PATCH v5 1/5] powerpc/85xx: implement hardware timebase sync Li Yang
2012-05-29 7:30 ` Li Yang
2012-05-29 12:20 ` [linuxppc-release] " Zhao Chenhui-B35336
2012-06-01 15:40 ` Scott Wood
2012-06-01 15:40 ` Scott Wood
2012-06-05 9:08 ` Zhao Chenhui
2012-06-05 9:08 ` Zhao Chenhui
2012-06-05 16:07 ` Scott Wood
2012-06-05 16:07 ` Scott Wood
2012-06-06 9:31 ` Zhao Chenhui [this message]
2012-06-06 9:31 ` Zhao Chenhui
2012-06-06 18:26 ` Scott Wood
2012-06-06 18:26 ` Scott Wood
2012-06-07 4:07 ` Zhao Chenhui
2012-06-07 4:07 ` Zhao Chenhui
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