From: Simon Horman <horms@verge.net.au>
To: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: linux-mmc@vger.kernel.org, linux-sh@vger.kernel.org,
Magnus Damm <magnus.damm@gmail.com>, Chris Ball <cjb@laptop.org>,
Mark Brown <broonie@opensource.wolfsonmicro.com>
Subject: Re: [PATCH 2/5 v4] mmc: sh_mmcif: fix clock management
Date: Wed, 20 Jun 2012 15:58:54 +0900 [thread overview]
Message-ID: <20120620065854.GM20030@verge.net.au> (raw)
In-Reply-To: <Pine.LNX.4.64.1206200839460.20254@axis700.grange>
On Wed, Jun 20, 2012 at 08:41:42AM +0200, Guennadi Liakhovetski wrote:
> On Wed, 20 Jun 2012, Simon Horman wrote:
>
> > Hi Guennadi,
> >
> > On Wed, Jun 13, 2012 at 03:37:19PM +0200, Guennadi Liakhovetski wrote:
> > > Regardless, whether the MMC bus clock is the same, as the PM clock on this
> > > specific interface, it has to be managed separately. Its proper management
> > > should also include enabling and disabling of the clock, whenever the
> > > interface is becoming active or going idle respectively.
> > >
> > > Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> > > ---
> > > drivers/mmc/host/sh_mmcif.c | 46 +++++++++++++++++++++---------------------
> > > 1 files changed, 23 insertions(+), 23 deletions(-)
> > >
> > > diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
> > > index d6ffb05..6a93b04 100644
> > > --- a/drivers/mmc/host/sh_mmcif.c
> > > +++ b/drivers/mmc/host/sh_mmcif.c
> > > @@ -942,6 +942,7 @@ static void sh_mmcif_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
> > > }
> > > if (host->power) {
> > > pm_runtime_put(&host->pd->dev);
> > > + clk_disable(host->hclk);
> > > host->power = false;
> > > if (p->down_pwr && ios->power_mode == MMC_POWER_OFF)
> > > p->down_pwr(host->pd);
> > > @@ -954,6 +955,7 @@ static void sh_mmcif_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
> > > if (!host->power) {
> > > if (p->set_pwr)
> > > p->set_pwr(host->pd, ios->power_mode);
> > > + clk_enable(host->hclk);
> > > pm_runtime_get_sync(&host->pd->dev);
> > > host->power = true;
> > > sh_mmcif_sync_reset(host);
> > > @@ -1278,22 +1280,11 @@ static int __devinit sh_mmcif_probe(struct platform_device *pdev)
> > > host->addr = reg;
> > > host->timeout = 1000;
> > >
> > > - snprintf(clk_name, sizeof(clk_name), "mmc%d", pdev->id);
> > > - host->hclk = clk_get(&pdev->dev, clk_name);
> > > - if (IS_ERR(host->hclk)) {
> > > - dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
> > > - ret = PTR_ERR(host->hclk);
> > > - goto eclkget;
> > > - }
> > > - clk_enable(host->hclk);
> > > - host->clk = clk_get_rate(host->hclk);
> > > host->pd = pdev;
> > >
> > > spin_lock_init(&host->lock);
> > >
> > > mmc->ops = &sh_mmcif_ops;
> > > - mmc->f_max = host->clk / 2;
> > > - mmc->f_min = host->clk / 512;
> > > if (pd->ocr)
> > > mmc->ocr_avail = pd->ocr;
> > > mmc->caps = MMC_CAP_MMC_HIGHSPEED;
> > > @@ -1305,18 +1296,30 @@ static int __devinit sh_mmcif_probe(struct platform_device *pdev)
> > > mmc->max_blk_count = mmc->max_req_size / mmc->max_blk_size;
> > > mmc->max_seg_size = mmc->max_req_size;
> > >
> > > - sh_mmcif_sync_reset(host);
> > > platform_set_drvdata(pdev, host);
> > >
> > > pm_runtime_enable(&pdev->dev);
> > > host->power = false;
> > >
> > > + snprintf(clk_name, sizeof(clk_name), "mmc%d", pdev->id);
> > > + host->hclk = clk_get(&pdev->dev, clk_name);
> > > + if (IS_ERR(host->hclk)) {
> > > + ret = PTR_ERR(host->hclk);
> > > + dev_err(&pdev->dev, "cannot get clock \"%s\": %d\n", clk_name, ret);
> > > + goto eclkget;
> > > + }
> > > + clk_enable(host->hclk);
> > > + host->clk = clk_get_rate(host->hclk);
> > > + mmc->f_max = host->clk / 2;
> > > + mmc->f_min = host->clk / 512;
> > > +
> > > ret = pm_runtime_resume(&pdev->dev);
> > > if (ret < 0)
> > > goto eresume;
> > >
> > > INIT_DELAYED_WORK(&host->timeout_work, mmcif_timeout_work);
> > >
> > > + sh_mmcif_sync_reset(host);
> > > sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL);
> > >
> > > ret = request_threaded_irq(irq[0], sh_mmcif_intr, sh_mmcif_irqt, 0, "sh_mmc:error", host);
> > > @@ -1330,6 +1333,7 @@ static int __devinit sh_mmcif_probe(struct platform_device *pdev)
> > > goto ereqirq1;
> > > }
> > >
> > > + clk_disable(host->hclk);
> > > ret = mmc_add_host(mmc);
> > > if (ret < 0)
> > > goto emmcaddh;
> >
> > Could you clarify the purpose of two hunks above.
> > They seem to move code down in sh_mmcif_probe().
> > Is this related to the call to pm_runtime_enable() ?
>
> The sh_mmcif_sync_reset() call accesses the hardware so it only makes
> sense after the hardware has been resumed. Moving the clk_enable() call
> down improves consistency by grouping clock and runtime PM code together
> during probe() similar to other paths.
Thanks.
Reviewed-by: Simon Horman <horms@verge.net.au>
WARNING: multiple messages have this Message-ID (diff)
From: Simon Horman <horms@verge.net.au>
To: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: linux-mmc@vger.kernel.org, linux-sh@vger.kernel.org,
Magnus Damm <magnus.damm@gmail.com>, Chris Ball <cjb@laptop.org>,
Mark Brown <broonie@opensource.wolfsonmicro.com>
Subject: Re: [PATCH 2/5 v4] mmc: sh_mmcif: fix clock management
Date: Wed, 20 Jun 2012 06:58:54 +0000 [thread overview]
Message-ID: <20120620065854.GM20030@verge.net.au> (raw)
In-Reply-To: <Pine.LNX.4.64.1206200839460.20254@axis700.grange>
On Wed, Jun 20, 2012 at 08:41:42AM +0200, Guennadi Liakhovetski wrote:
> On Wed, 20 Jun 2012, Simon Horman wrote:
>
> > Hi Guennadi,
> >
> > On Wed, Jun 13, 2012 at 03:37:19PM +0200, Guennadi Liakhovetski wrote:
> > > Regardless, whether the MMC bus clock is the same, as the PM clock on this
> > > specific interface, it has to be managed separately. Its proper management
> > > should also include enabling and disabling of the clock, whenever the
> > > interface is becoming active or going idle respectively.
> > >
> > > Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> > > ---
> > > drivers/mmc/host/sh_mmcif.c | 46 +++++++++++++++++++++---------------------
> > > 1 files changed, 23 insertions(+), 23 deletions(-)
> > >
> > > diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
> > > index d6ffb05..6a93b04 100644
> > > --- a/drivers/mmc/host/sh_mmcif.c
> > > +++ b/drivers/mmc/host/sh_mmcif.c
> > > @@ -942,6 +942,7 @@ static void sh_mmcif_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
> > > }
> > > if (host->power) {
> > > pm_runtime_put(&host->pd->dev);
> > > + clk_disable(host->hclk);
> > > host->power = false;
> > > if (p->down_pwr && ios->power_mode = MMC_POWER_OFF)
> > > p->down_pwr(host->pd);
> > > @@ -954,6 +955,7 @@ static void sh_mmcif_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
> > > if (!host->power) {
> > > if (p->set_pwr)
> > > p->set_pwr(host->pd, ios->power_mode);
> > > + clk_enable(host->hclk);
> > > pm_runtime_get_sync(&host->pd->dev);
> > > host->power = true;
> > > sh_mmcif_sync_reset(host);
> > > @@ -1278,22 +1280,11 @@ static int __devinit sh_mmcif_probe(struct platform_device *pdev)
> > > host->addr = reg;
> > > host->timeout = 1000;
> > >
> > > - snprintf(clk_name, sizeof(clk_name), "mmc%d", pdev->id);
> > > - host->hclk = clk_get(&pdev->dev, clk_name);
> > > - if (IS_ERR(host->hclk)) {
> > > - dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
> > > - ret = PTR_ERR(host->hclk);
> > > - goto eclkget;
> > > - }
> > > - clk_enable(host->hclk);
> > > - host->clk = clk_get_rate(host->hclk);
> > > host->pd = pdev;
> > >
> > > spin_lock_init(&host->lock);
> > >
> > > mmc->ops = &sh_mmcif_ops;
> > > - mmc->f_max = host->clk / 2;
> > > - mmc->f_min = host->clk / 512;
> > > if (pd->ocr)
> > > mmc->ocr_avail = pd->ocr;
> > > mmc->caps = MMC_CAP_MMC_HIGHSPEED;
> > > @@ -1305,18 +1296,30 @@ static int __devinit sh_mmcif_probe(struct platform_device *pdev)
> > > mmc->max_blk_count = mmc->max_req_size / mmc->max_blk_size;
> > > mmc->max_seg_size = mmc->max_req_size;
> > >
> > > - sh_mmcif_sync_reset(host);
> > > platform_set_drvdata(pdev, host);
> > >
> > > pm_runtime_enable(&pdev->dev);
> > > host->power = false;
> > >
> > > + snprintf(clk_name, sizeof(clk_name), "mmc%d", pdev->id);
> > > + host->hclk = clk_get(&pdev->dev, clk_name);
> > > + if (IS_ERR(host->hclk)) {
> > > + ret = PTR_ERR(host->hclk);
> > > + dev_err(&pdev->dev, "cannot get clock \"%s\": %d\n", clk_name, ret);
> > > + goto eclkget;
> > > + }
> > > + clk_enable(host->hclk);
> > > + host->clk = clk_get_rate(host->hclk);
> > > + mmc->f_max = host->clk / 2;
> > > + mmc->f_min = host->clk / 512;
> > > +
> > > ret = pm_runtime_resume(&pdev->dev);
> > > if (ret < 0)
> > > goto eresume;
> > >
> > > INIT_DELAYED_WORK(&host->timeout_work, mmcif_timeout_work);
> > >
> > > + sh_mmcif_sync_reset(host);
> > > sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL);
> > >
> > > ret = request_threaded_irq(irq[0], sh_mmcif_intr, sh_mmcif_irqt, 0, "sh_mmc:error", host);
> > > @@ -1330,6 +1333,7 @@ static int __devinit sh_mmcif_probe(struct platform_device *pdev)
> > > goto ereqirq1;
> > > }
> > >
> > > + clk_disable(host->hclk);
> > > ret = mmc_add_host(mmc);
> > > if (ret < 0)
> > > goto emmcaddh;
> >
> > Could you clarify the purpose of two hunks above.
> > They seem to move code down in sh_mmcif_probe().
> > Is this related to the call to pm_runtime_enable() ?
>
> The sh_mmcif_sync_reset() call accesses the hardware so it only makes
> sense after the hardware has been resumed. Moving the clk_enable() call
> down improves consistency by grouping clock and runtime PM code together
> during probe() similar to other paths.
Thanks.
Reviewed-by: Simon Horman <horms@verge.net.au>
next prev parent reply other threads:[~2012-06-20 6:58 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-13 13:37 [PATCH 0/5 v4] mmc: sh_mmcif: clock and power updates Guennadi Liakhovetski
2012-06-13 13:37 ` Guennadi Liakhovetski
2012-06-13 13:37 ` [PATCH 1/5 v4] mmc: sh_mmcif: simplify and use meaningful label names in error-handling Guennadi Liakhovetski
2012-06-13 13:37 ` Guennadi Liakhovetski
2012-06-20 5:02 ` Simon Horman
2012-06-20 5:02 ` Simon Horman
2012-06-13 13:37 ` [PATCH 2/5 v4] mmc: sh_mmcif: fix clock management Guennadi Liakhovetski
2012-06-13 13:37 ` Guennadi Liakhovetski
2012-06-20 5:18 ` Simon Horman
2012-06-20 5:18 ` Simon Horman
2012-06-20 6:41 ` Guennadi Liakhovetski
2012-06-20 6:41 ` Guennadi Liakhovetski
2012-06-20 6:58 ` Simon Horman [this message]
2012-06-20 6:58 ` Simon Horman
2012-06-13 13:37 ` [PATCH 3/5 v4] mmc: sh_mmcif: re-read the clock frequency every time the clock is turned on Guennadi Liakhovetski
2012-06-13 13:37 ` Guennadi Liakhovetski
2012-06-20 5:23 ` Simon Horman
2012-06-20 5:23 ` Simon Horman
2012-06-13 13:37 ` [PATCH 4/5 v4] mmc: sh_mmcif: remove redundant .down_pwr() callback Guennadi Liakhovetski
2012-06-13 13:37 ` Guennadi Liakhovetski
2012-06-20 4:58 ` Simon Horman
2012-06-20 4:58 ` Simon Horman
2012-06-20 6:19 ` Guennadi Liakhovetski
2012-06-20 6:19 ` Guennadi Liakhovetski
2012-06-20 6:57 ` Simon Horman
2012-06-20 6:57 ` Simon Horman
2012-06-13 13:37 ` [PATCH 5/5 v4] mmc: sh_mmcif: add regulator support Guennadi Liakhovetski
2012-06-13 13:37 ` Guennadi Liakhovetski
2012-06-17 17:23 ` Mark Brown
2012-06-17 17:23 ` Mark Brown
2012-06-20 5:12 ` Simon Horman
2012-06-20 5:12 ` Simon Horman
2012-06-20 6:38 ` Guennadi Liakhovetski
2012-06-20 6:38 ` Guennadi Liakhovetski
2012-06-20 6:58 ` Simon Horman
2012-06-20 6:58 ` Simon Horman
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