From: Zhao Chenhui <chenhui.zhao@freescale.com>
To: Kumar Gala <galak@kernel.crashing.org>
Cc: scottwood@freescale.com, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 1/5] powerpc/85xx: implement hardware timebase sync
Date: Wed, 27 Jun 2012 18:10:25 +0800 [thread overview]
Message-ID: <20120627101025.GA10476@localhost.localdomain> (raw)
In-Reply-To: <AB6D43A9-FC54-40D2-A9B0-8B2E785124F9@kernel.crashing.org>
On Tue, Jun 26, 2012 at 09:03:42AM -0500, Kumar Gala wrote:
>
> On Jun 26, 2012, at 5:25 AM, Zhao Chenhui wrote:
>
> > Do hardware timebase sync. Firstly, stop all timebases, and transfer
> > the timebase value of the boot core to the other core. Finally,
> > start all timebases.
> >
> > Only apply to dual-core chips, such as MPC8572, P2020, etc.
> >
> > Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> > Signed-off-by: Li Yang <leoli@freescale.com>
> > ---
> > Changes for v6:
> > * added 85xx_TB_SYNC
> > * added isync() after set_tb()
> > * removed extra entries from mpc85xx_smp_guts_ids
>
> Why only on dual-core chips? Is this because of something related to 2 cores, or related to corenet vs non-corenet SoCs and how turning on/off the timebase works in the SOC?
>
> - k
I am working on a timebase sync patch for corenet SoCs which have more than 2 cores.
It is based on this patch.
-Chenhui
WARNING: multiple messages have this Message-ID (diff)
From: Zhao Chenhui <chenhui.zhao@freescale.com>
To: Kumar Gala <galak@kernel.crashing.org>
Cc: <linuxppc-dev@lists.ozlabs.org>, <scottwood@freescale.com>,
<linux-kernel@vger.kernel.org>, <leoli@freescale.com>
Subject: Re: [PATCH v6 1/5] powerpc/85xx: implement hardware timebase sync
Date: Wed, 27 Jun 2012 18:10:25 +0800 [thread overview]
Message-ID: <20120627101025.GA10476@localhost.localdomain> (raw)
In-Reply-To: <AB6D43A9-FC54-40D2-A9B0-8B2E785124F9@kernel.crashing.org>
On Tue, Jun 26, 2012 at 09:03:42AM -0500, Kumar Gala wrote:
>
> On Jun 26, 2012, at 5:25 AM, Zhao Chenhui wrote:
>
> > Do hardware timebase sync. Firstly, stop all timebases, and transfer
> > the timebase value of the boot core to the other core. Finally,
> > start all timebases.
> >
> > Only apply to dual-core chips, such as MPC8572, P2020, etc.
> >
> > Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> > Signed-off-by: Li Yang <leoli@freescale.com>
> > ---
> > Changes for v6:
> > * added 85xx_TB_SYNC
> > * added isync() after set_tb()
> > * removed extra entries from mpc85xx_smp_guts_ids
>
> Why only on dual-core chips? Is this because of something related to 2 cores, or related to corenet vs non-corenet SoCs and how turning on/off the timebase works in the SOC?
>
> - k
I am working on a timebase sync patch for corenet SoCs which have more than 2 cores.
It is based on this patch.
-Chenhui
next prev parent reply other threads:[~2012-06-27 10:09 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-26 10:25 [PATCH v6 1/5] powerpc/85xx: implement hardware timebase sync Zhao Chenhui
2012-06-26 10:25 ` Zhao Chenhui
2012-06-26 10:25 ` [PATCH v6 2/5] powerpc/85xx: add HOTPLUG_CPU support Zhao Chenhui
2012-06-26 10:25 ` Zhao Chenhui
2012-06-26 10:25 ` [PATCH v6 3/5] powerpc/85xx: add sleep and deep sleep support Zhao Chenhui
2012-06-26 10:25 ` Zhao Chenhui
2012-07-13 12:27 ` Kumar Gala
2012-07-13 12:27 ` Kumar Gala
2012-06-26 10:25 ` [PATCH v6 4/5] fsl_pmc: Add API to enable device as wakeup event source Zhao Chenhui
2012-06-26 10:25 ` Zhao Chenhui
2012-06-26 10:25 ` [PATCH v6 5/5] powerpc/85xx: add support to JOG feature using cpufreq interface Zhao Chenhui
2012-06-26 10:25 ` Zhao Chenhui
2012-06-26 14:03 ` [PATCH v6 1/5] powerpc/85xx: implement hardware timebase sync Kumar Gala
2012-06-26 14:03 ` Kumar Gala
2012-06-26 21:45 ` Scott Wood
2012-06-26 21:45 ` Scott Wood
2012-06-26 22:10 ` Benjamin Herrenschmidt
2012-06-26 22:10 ` Benjamin Herrenschmidt
2012-06-27 10:10 ` Zhao Chenhui [this message]
2012-06-27 10:10 ` Zhao Chenhui
2012-06-26 22:10 ` Benjamin Herrenschmidt
2012-06-26 22:10 ` Benjamin Herrenschmidt
2012-06-27 10:21 ` Zhao Chenhui
2012-06-27 10:21 ` Zhao Chenhui
2012-06-27 11:48 ` Benjamin Herrenschmidt
2012-06-27 11:48 ` Benjamin Herrenschmidt
2012-06-28 3:38 ` Zhao Chenhui
2012-06-28 3:38 ` Zhao Chenhui
2012-06-28 10:50 ` Benjamin Herrenschmidt
2012-06-28 10:50 ` Benjamin Herrenschmidt
2012-06-28 18:30 ` Kumar Gala
2012-06-28 18:30 ` Kumar Gala
2012-06-29 10:33 ` Zhao Chenhui-B35336
2012-06-29 10:33 ` Zhao Chenhui-B35336
2012-07-02 10:44 ` Zhao Chenhui
2012-07-02 10:44 ` Zhao Chenhui
2012-06-29 15:39 ` Tabi Timur-B04825
2012-06-29 15:39 ` Tabi Timur-B04825
2012-06-29 15:57 ` Scott Wood
2012-06-29 15:57 ` Scott Wood
2012-06-29 16:04 ` Timur Tabi
2012-06-29 16:04 ` Timur Tabi
2012-06-29 16:10 ` Scott Wood
2012-06-29 16:10 ` Scott Wood
2012-06-29 16:12 ` Timur Tabi
2012-06-29 16:12 ` Timur Tabi
2012-06-29 17:10 ` Scott Wood
2012-06-29 17:10 ` Scott Wood
2012-07-02 10:10 ` Zhao Chenhui
2012-07-02 10:10 ` Zhao Chenhui
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