* [PATCH] 8250: Add new UART type SC16C550
@ 2012-07-11 19:54 Raphael Assenat
2012-07-12 8:59 ` Alan Cox
0 siblings, 1 reply; 2+ messages in thread
From: Raphael Assenat @ 2012-07-11 19:54 UTC (permalink / raw)
To: linux-serial
The NXP SC16C550 has a 16 Byte FIFO and support Automatic Flow Control,
enabled by setting bit 5 of MCR (a.k.a. AFE).
This patch adds a new 8250 port type (PORT_SC16C550) to support
this chip correcly. Should also work for TI TL16550C/D.
Tested on a custom OMAP board with an SC16C554 (quad uart) attached
to the GPMC. We experienced receive overruns when not using AFE.
Signed-off-by: Raphael Assenat <raph@8d.com>
diff --git a/drivers/tty/serial/8250/8250.c b/drivers/tty/serial/8250/8250.c
index 6e1958a..ffea4f3 100644
--- a/drivers/tty/serial/8250/8250.c
+++ b/drivers/tty/serial/8250/8250.c
@@ -282,6 +282,13 @@ static const struct serial8250_config uart_config[] = {
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR,
},
+ [PORT_SC16C550] = {
+ .name = "SC16C550",
+ .fifo_size = 16,
+ .tx_loadsz = 16,
+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
+ .flags = UART_CAP_FIFO | UART_CAP_AFE,
+ },
};
/* Uart divisor latch read */
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 65db992..e472af3 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -47,7 +47,8 @@
#define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */
#define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */
#define PORT_XR17D15X 21 /* Exar XR17D15x UART */
-#define PORT_MAX_8250 21 /* max port ID */
+#define PORT_SC16C550 22 /* NXP SC16C550 and equivalents */
+#define PORT_MAX_8250 22 /* max port ID */
/*
* ARM specific type numbers. These are not currently guaranteed
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH] 8250: Add new UART type SC16C550
2012-07-11 19:54 [PATCH] 8250: Add new UART type SC16C550 Raphael Assenat
@ 2012-07-12 8:59 ` Alan Cox
0 siblings, 0 replies; 2+ messages in thread
From: Alan Cox @ 2012-07-12 8:59 UTC (permalink / raw)
To: Raphael Assenat; +Cc: linux-serial
On Wed, 11 Jul 2012 15:54:53 -0400
Raphael Assenat <raph@8d.com> wrote:
> The NXP SC16C550 has a 16 Byte FIFO and support Automatic Flow Control,
> enabled by setting bit 5 of MCR (a.k.a. AFE).
>
> This patch adds a new 8250 port type (PORT_SC16C550) to support
> this chip correcly. Should also work for TI TL16550C/D.
>
> Tested on a custom OMAP board with an SC16C554 (quad uart) attached
> to the GPMC. We experienced receive overruns when not using AFE.
>
> Signed-off-by: Raphael Assenat <raph@8d.com>
Looks fine and ready to go in as and when patches for the mainline kernel
that actually use it go in (ie submit it with the board support once you
get that far)
Alan
^ permalink raw reply [flat|nested] 2+ messages in thread
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2012-07-11 19:54 [PATCH] 8250: Add new UART type SC16C550 Raphael Assenat
2012-07-12 8:59 ` Alan Cox
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