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From: b29396@freescale.com (Dong Aisheng)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/2] pinctrl: pinctrl-imx: add support for set bits for general purpose registers
Date: Thu, 12 Jul 2012 19:04:43 +0800	[thread overview]
Message-ID: <20120712110442.GE22640@shlinux2.ap.freescale.net> (raw)
In-Reply-To: <4FFE9D7E.1080302@gmail.com>

On Thu, Jul 12, 2012 at 05:48:46PM +0800, Hui Wang wrote:
...
> > +
> > +int imx_pinctrl_gpr_read(u8 gpr)
> > +{
> > +	if (!imx_pinctrl)
> > +		return -EPROBE_DEFER;
> > +
> > +	return readl(imx_pinctrl->base + gpr);
> >   
> Suppose the MSB of the register content is 1, how does the caller 
> distinguish if the function return an error or return a register content?
> 
Good catch, it's indeed an issue.
We need find a way to fix it, probably i would add a parameter for
read API to return a u32 value.

Thanks

Regards
Dong Aisheng

WARNING: multiple messages have this Message-ID (diff)
From: Dong Aisheng <b29396-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
To: Hui Wang <jason77.wang-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Zhao Richard-B20223
	<B20223-KZfg59tc24xl57MIdRCFDg@public.gmane.org>,
	"linus.walleij-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org"
	<linus.walleij-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org>,
	"devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org"
	<devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>,
	Guo Shawn-R65073 <r65073-KZfg59tc24xl57MIdRCFDg@public.gmane.org>,
	Liu Hui-R64343 <r64343-KZfg59tc24xl57MIdRCFDg@public.gmane.org>,
	"kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org"
	<kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	"s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org"
	<s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCH v2 1/2] pinctrl: pinctrl-imx: add support for set bits for general purpose registers
Date: Thu, 12 Jul 2012 19:04:43 +0800	[thread overview]
Message-ID: <20120712110442.GE22640@shlinux2.ap.freescale.net> (raw)
In-Reply-To: <4FFE9D7E.1080302-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

On Thu, Jul 12, 2012 at 05:48:46PM +0800, Hui Wang wrote:
...
> > +
> > +int imx_pinctrl_gpr_read(u8 gpr)
> > +{
> > +	if (!imx_pinctrl)
> > +		return -EPROBE_DEFER;
> > +
> > +	return readl(imx_pinctrl->base + gpr);
> >   
> Suppose the MSB of the register content is 1, how does the caller 
> distinguish if the function return an error or return a register content?
> 
Good catch, it's indeed an issue.
We need find a way to fix it, probably i would add a parameter for
read API to return a u32 value.

Thanks

Regards
Dong Aisheng

  parent reply	other threads:[~2012-07-12 11:04 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-12  9:07 [PATCH v2 1/2] pinctrl: pinctrl-imx: add support for set bits for general purpose registers Dong Aisheng
2012-07-12  9:07 ` Dong Aisheng
2012-07-12  9:08 ` [PATCH v2 2/2] pinctrl: pinctrl-imx6q: add missed mux function for USBOTG_ID Dong Aisheng
2012-07-12  9:08   ` Dong Aisheng
2012-07-12  9:31 ` [PATCH v2 1/2] pinctrl: pinctrl-imx: add support for set bits for general purpose registers Richard Zhao
2012-07-12  9:31   ` Richard Zhao
2012-07-12  9:48 ` Hui Wang
2012-07-12  9:48   ` Hui Wang
2012-07-12 10:24   ` Richard Zhao
2012-07-12 10:24     ` Richard Zhao
2012-07-12 11:04   ` Dong Aisheng [this message]
2012-07-12 11:04     ` Dong Aisheng
2012-07-14 20:43 ` Linus Walleij
2012-07-14 20:43   ` Linus Walleij
2012-07-16  8:17   ` Richard Zhao
2012-07-16  8:17     ` Richard Zhao
2012-07-16 13:40     ` Arnd Bergmann
2012-07-16 13:40       ` Arnd Bergmann
2012-07-16 22:15       ` Linus Walleij
2012-07-16 22:15         ` Linus Walleij
2012-07-17  3:04       ` Dong Aisheng
2012-07-17  3:04         ` Dong Aisheng
2012-07-17  3:02   ` Dong Aisheng
2012-07-17  3:02     ` Dong Aisheng
2012-07-17 18:15     ` Linus Walleij
2012-07-17 18:15       ` Linus Walleij
2012-07-17 18:24       ` Mark Brown
2012-07-17 18:24         ` Mark Brown

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