From: Pavel Machek <pavel@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
Date: Thu, 30 Aug 2012 18:59:51 +0200 [thread overview]
Message-ID: <20120830165951.GC5980@elf.ucw.cz> (raw)
In-Reply-To: <201208300156.32100.marex@denx.de>
Hi!
> > I took oportunity to cleanup whitespace in
> > arch/arm/cpu/armv7/omap-common/u-boot-spl.lds. Perhaps someone can
> > merge that...
>
> Argh ... what about using git send-email for the patch submission please?
I'm not supposed to submit patches here, these are just requests for
review ;-).
> NOTE: I really have a great deal of respect for Pavel, so i do have trouble
> stepping on him properly during the patch review ;-)
;-).
> > + ldr r0, =CONFIG_SYS_INIT_RAM_ADDR
> > + ldr r1, =CONFIG_SYS_INIT_RAM_SIZE
> > + add r0, r0, r1
>
> Won't the preprocessor compute (CONFIG_SYS_INIT_RAM_ADDR +
> CONFIG_SYS_INIT_RAM_SIZE) for you? Then you'd only have to do one LDR and no ADD
> instruction, saving two ticks of CPU :-)
:-). And opportunity for me to try my luck at arm assembly. Does this
look correct?
ldr r0, =(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)
ldr r1, =IRQ_STACK_START_IN
str r0, [r1]
bx lr
> > +static const struct socfpga_reset_manager *reset_manager_base =
> > + (void *)SOCFPGA_RSTMGR_ADDRESS;
> > +
> > +/*
> > + * Write the reset manager register to cause reset
> > + */
>
> You might want to add __attribute__((noreturn)) to this function :-)
Hmm... I guess that should go to the central header file? No need to
sprinkle it all through the C files. (Done).
> > + writel(TIMER_LOAD_VAL, &timer_base->load_val);
> > + writel(TIMER_LOAD_VAL, &timer_base->curr_val);
> > + writel((readl((&timer_base->ctrl)) | 0x3),
>
> I think you should stick to programming in C here, not ((((LISP)))), so try
> cutting down on the ((braces)) :-)
Some braces have been harmed by creation of this patch.
> btw. what's this 0x3 magic constant ?
Dinh has to help here :-(.
> > +static inline void delay(unsigned long loops)
> > +{
> > + __asm__ volatile ("1:\n"
> > + "subs %0, %1, #1\n"
> > + "bne 1b" : "=r" (loops) : "0" (loops));
> > +}
>
> Am I flat blind or is this not used here?
Killed, thanks. Lets see what the compiler thinks.
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
next prev parent reply other threads:[~2012-08-30 16:59 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-16 22:45 [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5 dinguyen at altera.com
2012-08-22 22:10 ` Pavel Machek
2012-08-22 22:26 ` Marek Vasut
2012-08-23 1:13 ` Tom Rini
2012-08-23 10:43 ` Pavel Machek
2012-08-23 11:18 ` Stefan Roese
2012-08-29 12:30 ` Pavel Machek
2012-08-29 12:32 ` Stefan Roese
2012-08-24 19:18 ` Tom Rini
2012-08-25 9:03 ` Pavel Machek
2012-08-25 10:42 ` Pavel Machek
2012-08-25 11:56 ` Pavel Machek
2012-08-27 15:43 ` Tom Rini
2012-08-29 12:07 ` Pavel Machek
2012-08-25 12:05 ` Pavel Machek
2012-08-27 15:57 ` Tom Rini
2012-08-29 12:27 ` Pavel Machek
2012-08-29 13:41 ` Pavel Machek
2012-08-29 18:26 ` Tom Rini
2012-08-29 23:21 ` Pavel Machek
2012-08-30 0:00 ` Tom Rini
2012-08-30 17:18 ` Pavel Machek
2012-08-30 17:34 ` Tom Rini
2012-08-30 17:46 ` Tom Rini
2012-08-30 18:05 ` Pavel Machek
2012-08-30 18:30 ` Tom Rini
2012-08-30 20:42 ` Pavel Machek
2012-08-30 22:25 ` Tom Rini
2012-08-31 21:26 ` Dinh Nguyen
2012-08-31 21:37 ` Tom Rini
2012-08-31 7:02 ` Stefan Roese
2012-08-29 23:34 ` Pavel Machek
2012-08-29 23:56 ` Marek Vasut
2012-08-30 16:59 ` Pavel Machek [this message]
2012-08-30 18:02 ` Marek Vasut
2012-08-30 18:12 ` Pavel Machek
2012-08-30 18:16 ` Marek Vasut
2012-09-03 2:59 ` Chin Liang See
2012-08-30 0:03 ` Tom Rini
2012-08-30 17:20 ` Pavel Machek
2012-08-23 10:56 ` Pavel Machek
2012-08-23 10:50 ` Pavel Machek
2012-08-24 22:59 ` Tom Rini
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