From: andrew@lunn.ch (Andrew Lunn)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 03/10] pinctrl: mvebu: kirkwood pinctrl driver
Date: Tue, 18 Sep 2012 20:59:40 +0200 [thread overview]
Message-ID: <20120918185940.GW28177@lunn.ch> (raw)
In-Reply-To: <1347550912-18021-4-git-send-email-sebastian.hesselbarth@gmail.com>
On Thu, Sep 13, 2012 at 05:41:45PM +0200, Sebastian Hesselbarth wrote:
> This patch adds a SoC specific pinctrl driver for Marvell Kirkwood SoCs
> plus DT binding documentation. This driver will use the mvebu pinctrl
> driver core.
>
> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> v2:
> - restructured pinctrl/Kconfig to hide pinctrl driver as it will be
> always selected by arch/arm/mach-mvebu/Kconfig
> - use enum for kirkwood variants instead of defines
>
> v3:
> - moved variant specific data to DT match struct
>
> v4:
> - fix bogus v3 patch set
Since Linus Walleij thinks that autoprobing is not going to happen,
Tested-by: Andrew Lunn <andrew@lunn.ch>
However, i still think it would be nice to have auto probing.
Andrew
> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Cc: Rob Herring <rob.herring@calxeda.com>
> Cc: Rob Landley <rob@landley.net>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Lior Amsalem <alior@marvell.com>
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: Jason Cooper <jason@lakedaemon.net>
> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
> Cc: Ben Dooks <ben.dooks@codethink.co.uk>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Stephen Warren <swarren@wwwdotorg.org>
> Cc: devicetree-discuss at lists.ozlabs.org
> Cc: linux-doc at vger.kernel.org
> Cc: linux-kernel at vger.kernel.org
> Cc: linux-arm-kernel at lists.infradead.org
> ---
> .../bindings/pinctrl/marvell,kirkwood-pinctrl.txt | 279 ++++++++++++
> drivers/pinctrl/Kconfig | 4 +
> drivers/pinctrl/Makefile | 1 +
> drivers/pinctrl/pinctrl-kirkwood.c | 472 ++++++++++++++++++++
> 4 files changed, 756 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt
> create mode 100644 drivers/pinctrl/pinctrl-kirkwood.c
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt
> new file mode 100644
> index 0000000..361bccb
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt
> @@ -0,0 +1,279 @@
> +* Marvell Kirkwood SoC pinctrl driver for mpp
> +
> +Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
> +part and usage.
> +
> +Required properties:
> +- compatible: "marvell,88f6180-pinctrl",
> + "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
> + "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl"
> +
> +This driver supports all kirkwood variants, i.e. 88f6180, 88f619x, and 88f628x.
> +
> +Available mpp pins/groups and functions:
> +Note: brackets (x) are not part of the mpp name for marvell,function and given
> +only for more detailed description in this document.
> +
> +* Marvell Kirkwood 88f6180
> +
> +name pins functions
> +================================================================================
> +mpp0 0 gpio, nand(io2), spi(cs)
> +mpp1 1 gpo, nand(io3), spi(mosi)
> +mpp2 2 gpo, nand(io4), spi(sck)
> +mpp3 3 gpo, nand(io5), spi(miso)
> +mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk)
> +mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig)
> +mpp6 6 sysrst(out), spi(mosi), ptp(trig)
> +mpp7 7 gpo, pex(rsto), spi(cs), ptp(trig)
> +mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
> + mii(col)
> +mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
> + mii(crs)
> +mpp10 10 gpo, spi(sck), uart0(txd), ptp(trig)
> +mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq),
> + ptp-2(trig)
> +mpp12 12 gpo, sdio(clk)
> +mpp13 13 gpio, sdio(cmd), uart1(txd)
> +mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col)
> +mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd)
> +mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs)
> +mpp17 17 gpio, sdio(d3)
> +mpp18 18 gpo, nand(io0)
> +mpp19 19 gpo, nand(io1)
> +mpp20 20 gpio, mii(rxerr)
> +mpp21 21 gpio, audio(spdifi)
> +mpp22 22 gpio, audio(spdifo)
> +mpp23 23 gpio, audio(rmclk)
> +mpp24 24 gpio, audio(bclk)
> +mpp25 25 gpio, audio(sdo)
> +mpp26 26 gpio, audio(lrclk)
> +mpp27 27 gpio, audio(mclk)
> +mpp28 28 gpio, audio(sdi)
> +mpp29 29 gpio, audio(extclk)
> +
> +* Marvell Kirkwood 88f6190
> +
> +name pins functions
> +================================================================================
> +mpp0 0 gpio, nand(io2), spi(cs)
> +mpp1 1 gpo, nand(io3), spi(mosi)
> +mpp2 2 gpo, nand(io4), spi(sck)
> +mpp3 3 gpo, nand(io5), spi(miso)
> +mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk)
> +mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig), sata0(act)
> +mpp6 6 sysrst(out), spi(mosi), ptp(trig)
> +mpp7 7 gpo, pex(rsto), spi(cs), ptp(trig)
> +mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
> + mii(col), mii-1(rxerr)
> +mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
> + mii(crs), sata0(prsnt)
> +mpp10 10 gpo, spi(sck), uart0(txd), ptp(trig)
> +mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq),
> + ptp-2(trig), sata0(act)
> +mpp12 12 gpo, sdio(clk)
> +mpp13 13 gpio, sdio(cmd), uart1(txd)
> +mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col)
> +mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd), sata0(act)
> +mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs)
> +mpp17 17 gpio, sdio(d3), sata0(prsnt)
> +mpp18 18 gpo, nand(io0)
> +mpp19 19 gpo, nand(io1)
> +mpp20 20 gpio, ge1(txd0)
> +mpp21 21 gpio, ge1(txd1), sata0(act)
> +mpp22 22 gpio, ge1(txd2)
> +mpp23 23 gpio, ge1(txd3), sata0(prsnt)
> +mpp24 24 gpio, ge1(rxd0)
> +mpp25 25 gpio, ge1(rxd1)
> +mpp26 26 gpio, ge1(rxd2)
> +mpp27 27 gpio, ge1(rxd3)
> +mpp28 28 gpio, ge1(col)
> +mpp29 29 gpio, ge1(txclk)
> +mpp30 30 gpio, ge1(rxclk)
> +mpp31 31 gpio, ge1(rxclk)
> +mpp32 32 gpio, ge1(txclko)
> +mpp33 33 gpo, ge1(txclk)
> +mpp34 34 gpio, ge1(txen)
> +mpp35 35 gpio, ge1(rxerr), sata0(act), mii(rxerr)
> +
> +* Marvell Kirkwood 88f6192
> +
> +name pins functions
> +================================================================================
> +mpp0 0 gpio, nand(io2), spi(cs)
> +mpp1 1 gpo, nand(io3), spi(mosi)
> +mpp2 2 gpo, nand(io4), spi(sck)
> +mpp3 3 gpo, nand(io5), spi(miso)
> +mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk), sata1(act)
> +mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig), sata0(act)
> +mpp6 6 sysrst(out), spi(mosi), ptp(trig)
> +mpp7 7 gpo, pex(rsto), spi(cs), ptp(trig)
> +mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
> + mii(col), mii-1(rxerr), sata1(prsnt)
> +mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
> + mii(crs), sata0(prsnt)
> +mpp10 10 gpo, spi(sck), uart0(txd), ptp(trig), sata1(act)
> +mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq),
> + ptp-2(trig), sata0(act)
> +mpp12 12 gpo, sdio(clk)
> +mpp13 13 gpio, sdio(cmd), uart1(txd)
> +mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col), sata1(prsnt)
> +mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd), sata0(act)
> +mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs),
> + sata1(act)
> +mpp17 17 gpio, sdio(d3), sata0(prsnt)
> +mpp18 18 gpo, nand(io0)
> +mpp19 19 gpo, nand(io1)
> +mpp20 20 gpio, ge1(txd0), ts(mp0), tdm(tx0ql), audio(spdifi),
> + sata1(act)
> +mpp21 21 gpio, ge1(txd1), sata0(act), ts(mp1), tdm(rx0ql),
> + audio(spdifo)
> +mpp22 22 gpio, ge1(txd2), ts(mp2), tdm(tx2ql), audio(rmclk),
> + sata1(prsnt)
> +mpp23 23 gpio, ge1(txd3), sata0(prsnt), ts(mp3), tdm(rx2ql),
> + audio(bclk)
> +mpp24 24 gpio, ge1(rxd0), ts(mp4), tdm(spi-cs0), audio(sdo)
> +mpp25 25 gpio, ge1(rxd1), ts(mp5), tdm(spi-sck), audio(lrclk)
> +mpp26 26 gpio, ge1(rxd2), ts(mp6), tdm(spi-miso), audio(mclk)
> +mpp27 27 gpio, ge1(rxd3), ts(mp7), tdm(spi-mosi), audio(sdi)
> +mpp28 28 gpio, ge1(col), ts(mp8), tdm(int), audio(extclk)
> +mpp29 29 gpio, ge1(txclk), ts(mp9), tdm(rst)
> +mpp30 30 gpio, ge1(rxclk), ts(mp10), tdm(pclk)
> +mpp31 31 gpio, ge1(rxclk), ts(mp11), tdm(fs)
> +mpp32 32 gpio, ge1(txclko), ts(mp12), tdm(drx)
> +mpp33 33 gpo, ge1(txclk), tdm(drx)
> +mpp34 34 gpio, ge1(txen), tdm(spi-cs1)
> +mpp35 35 gpio, ge1(rxerr), sata0(act), mii(rxerr), tdm(tx0ql)
> +
> +* Marvell Kirkwood 88f6281
> +
> +name pins functions
> +================================================================================
> +mpp0 0 gpio, nand(io2), spi(cs)
> +mpp1 1 gpo, nand(io3), spi(mosi)
> +mpp2 2 gpo, nand(io4), spi(sck)
> +mpp3 3 gpo, nand(io5), spi(miso)
> +mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk), sata1(act)
> +mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig), sata0(act)
> +mpp6 6 sysrst(out), spi(mosi), ptp(trig)
> +mpp7 7 gpo, pex(rsto), spi(cs), ptp(trig)
> +mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
> + mii(col), mii-1(rxerr), sata1(prsnt)
> +mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
> + mii(crs), sata0(prsnt)
> +mpp10 10 gpo, spi(sck), uart0(txd), ptp(trig), sata1(act)
> +mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq),
> + ptp-2(trig), sata0(act)
> +mpp12 12 gpio, sdio(clk)
> +mpp13 13 gpio, sdio(cmd), uart1(txd)
> +mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col), sata1(prsnt)
> +mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd), sata0(act)
> +mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs),
> + sata1(act)
> +mpp17 17 gpio, sdio(d3), sata0(prsnt)
> +mpp18 18 gpo, nand(io0)
> +mpp19 19 gpo, nand(io1)
> +mpp20 20 gpio, ge1(txd0), ts(mp0), tdm(tx0ql), audio(spdifi),
> + sata1(act)
> +mpp21 21 gpio, ge1(txd1), sata0(act), ts(mp1), tdm(rx0ql),
> + audio(spdifo)
> +mpp22 22 gpio, ge1(txd2), ts(mp2), tdm(tx2ql), audio(rmclk),
> + sata1(prsnt)
> +mpp23 23 gpio, ge1(txd3), sata0(prsnt), ts(mp3), tdm(rx2ql),
> + audio(bclk)
> +mpp24 24 gpio, ge1(rxd0), ts(mp4), tdm(spi-cs0), audio(sdo)
> +mpp25 25 gpio, ge1(rxd1), ts(mp5), tdm(spi-sck), audio(lrclk)
> +mpp26 26 gpio, ge1(rxd2), ts(mp6), tdm(spi-miso), audio(mclk)
> +mpp27 27 gpio, ge1(rxd3), ts(mp7), tdm(spi-mosi), audio(sdi)
> +mpp28 28 gpio, ge1(col), ts(mp8), tdm(int), audio(extclk)
> +mpp29 29 gpio, ge1(txclk), ts(mp9), tdm(rst)
> +mpp30 30 gpio, ge1(rxclk), ts(mp10), tdm(pclk)
> +mpp31 31 gpio, ge1(rxclk), ts(mp11), tdm(fs)
> +mpp32 32 gpio, ge1(txclko), ts(mp12), tdm(drx)
> +mpp33 33 gpo, ge1(txclk), tdm(drx)
> +mpp34 34 gpio, ge1(txen), tdm(spi-cs1), sata1(act)
> +mpp35 35 gpio, ge1(rxerr), sata0(act), mii(rxerr), tdm(tx0ql)
> +mpp36 36 gpio, ts(mp0), tdm(spi-cs1), audio(spdifi)
> +mpp37 37 gpio, ts(mp1), tdm(tx2ql), audio(spdifo)
> +mpp38 38 gpio, ts(mp2), tdm(rx2ql), audio(rmclk)
> +mpp39 39 gpio, ts(mp3), tdm(spi-cs0), audio(bclk)
> +mpp40 40 gpio, ts(mp4), tdm(spi-sck), audio(sdo)
> +mpp41 41 gpio, ts(mp5), tdm(spi-miso), audio(lrclk)
> +mpp42 42 gpio, ts(mp6), tdm(spi-mosi), audio(mclk)
> +mpp43 43 gpio, ts(mp7), tdm(int), audio(sdi)
> +mpp44 44 gpio, ts(mp8), tdm(rst), audio(extclk)
> +mpp45 45 gpio, ts(mp9), tdm(pclk)
> +mpp46 46 gpio, ts(mp10), tdm(fs)
> +mpp47 47 gpio, ts(mp11), tdm(drx)
> +mpp48 48 gpio, ts(mp12), tdm(dtx)
> +mpp49 49 gpio, ts(mp9), tdm(rx0ql), ptp(clk)
> +
> +* Marvell Kirkwood 88f6282
> +
> +name pins functions
> +================================================================================
> +mpp0 0 gpio, nand(io2), spi(cs)
> +mpp1 1 gpo, nand(io3), spi(mosi)
> +mpp2 2 gpo, nand(io4), spi(sck)
> +mpp3 3 gpo, nand(io5), spi(miso)
> +mpp4 4 gpio, nand(io6), uart0(rxd), sata1(act), lcd(hsync)
> +mpp5 5 gpo, nand(io7), uart0(txd), sata0(act), lcd(vsync)
> +mpp6 6 sysrst(out), spi(mosi)
> +mpp7 7 gpo, spi(cs), lcd(pwm)
> +mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), mii(col),
> + mii-1(rxerr), sata1(prsnt)
> +mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), mii(crs),
> + sata0(prsnt)
> +mpp10 10 gpo, spi(sck), uart0(txd), sata1(act)
> +mpp11 11 gpio, spi(miso), uart0(rxd), sata0(act)
> +mpp12 12 gpo, sdio(clk), audio(spdifo), spi(mosi), twsi(sda)
> +mpp13 13 gpio, sdio(cmd), uart1(txd), audio(rmclk), lcd(pwm)
> +mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col), sata1(prsnt),
> + audio(spdifi), audio-1(sdi)
> +mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd), sata0(act),
> + spi(cs)
> +mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs),
> + sata1(act), lcd(extclk)
> +mpp17 17 gpio, sdio(d3), sata0(prsnt), sata1(act), twsi1(sck)
> +mpp18 18 gpo, nand(io0), pex(clkreq)
> +mpp19 19 gpo, nand(io1)
> +mpp20 20 gpio, ge1(txd0), ts(mp0), tdm(tx0ql), audio(spdifi),
> + sata1(act), lcd(d0)
> +mpp21 21 gpio, ge1(txd1), sata0(act), ts(mp1), tdm(rx0ql),
> + audio(spdifo), lcd(d1)
> +mpp22 22 gpio, ge1(txd2), ts(mp2), tdm(tx2ql), audio(rmclk),
> + sata1(prsnt), lcd(d2)
> +mpp23 23 gpio, ge1(txd3), sata0(prsnt), ts(mp3), tdm(rx2ql),
> + audio(bclk), lcd(d3)
> +mpp24 24 gpio, ge1(rxd0), ts(mp4), tdm(spi-cs0), audio(sdo),
> + lcd(d4)
> +mpp25 25 gpio, ge1(rxd1), ts(mp5), tdm(spi-sck), audio(lrclk),
> + lcd(d5)
> +mpp26 26 gpio, ge1(rxd2), ts(mp6), tdm(spi-miso), audio(mclk),
> + lcd(d6)
> +mpp27 27 gpio, ge1(rxd3), ts(mp7), tdm(spi-mosi), audio(sdi),
> + lcd(d7)
> +mpp28 28 gpio, ge1(col), ts(mp8), tdm(int), audio(extclk),
> + lcd(d8)
> +mpp29 29 gpio, ge1(txclk), ts(mp9), tdm(rst), lcd(d9)
> +mpp30 30 gpio, ge1(rxclk), ts(mp10), tdm(pclk), lcd(d10)
> +mpp31 31 gpio, ge1(rxclk), ts(mp11), tdm(fs), lcd(d11)
> +mpp32 32 gpio, ge1(txclko), ts(mp12), tdm(drx), lcd(d12)
> +mpp33 33 gpo, ge1(txclk), tdm(drx), lcd(d13)
> +mpp34 34 gpio, ge1(txen), tdm(spi-cs1), sata1(act), lcd(d14)
> +mpp35 35 gpio, ge1(rxerr), sata0(act), mii(rxerr), tdm(tx0ql),
> + lcd(d15)
> +mpp36 36 gpio, ts(mp0), tdm(spi-cs1), audio(spdifi), twsi1(sda)
> +mpp37 37 gpio, ts(mp1), tdm(tx2ql), audio(spdifo), twsi1(sck)
> +mpp38 38 gpio, ts(mp2), tdm(rx2ql), audio(rmclk), lcd(d18)
> +mpp39 39 gpio, ts(mp3), tdm(spi-cs0), audio(bclk), lcd(d19)
> +mpp40 40 gpio, ts(mp4), tdm(spi-sck), audio(sdo), lcd(d20)
> +mpp41 41 gpio, ts(mp5), tdm(spi-miso), audio(lrclk), lcd(d21)
> +mpp42 42 gpio, ts(mp6), tdm(spi-mosi), audio(mclk), lcd(d22)
> +mpp43 43 gpio, ts(mp7), tdm(int), audio(sdi), lcd(d23)
> +mpp44 44 gpio, ts(mp8), tdm(rst), audio(extclk), lcd(clk)
> +mpp45 45 gpio, ts(mp9), tdm(pclk), lcd(e)
> +mpp46 46 gpio, ts(mp10), tdm(fs), lcd(hsync)
> +mpp47 47 gpio, ts(mp11), tdm(drx), lcd(vsync)
> +mpp48 48 gpio, ts(mp12), tdm(dtx), lcd(d16)
> +mpp49 49 gpo, tdm(rx0ql), pex(clkreq), lcd(d17)
> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
> index f15eba4..31c0bba 100644
> --- a/drivers/pinctrl/Kconfig
> +++ b/drivers/pinctrl/Kconfig
> @@ -155,6 +155,10 @@ config PINCTRL_DOVE
> bool
> select PINCTRL_MVEBU
>
> +config PINCTRL_KIRKWOOD
> + bool
> + select PINCTRL_MVEBU
> +
> source "drivers/pinctrl/spear/Kconfig"
>
> endmenu
> diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
> index d1327df..3006294 100644
> --- a/drivers/pinctrl/Makefile
> +++ b/drivers/pinctrl/Makefile
> @@ -31,5 +31,6 @@ obj-$(CONFIG_PINCTRL_U300) += pinctrl-u300.o
> obj-$(CONFIG_PINCTRL_COH901) += pinctrl-coh901.o
> obj-$(CONFIG_PINCTRL_MVEBU) += pinctrl-mvebu.o
> obj-$(CONFIG_PINCTRL_DOVE) += pinctrl-dove.o
> +obj-$(CONFIG_PINCTRL_KIRKWOOD) += pinctrl-kirkwood.o
>
> obj-$(CONFIG_PLAT_SPEAR) += spear/
> diff --git a/drivers/pinctrl/pinctrl-kirkwood.c b/drivers/pinctrl/pinctrl-kirkwood.c
> new file mode 100644
> index 0000000..9a74ef6
> --- /dev/null
> +++ b/drivers/pinctrl/pinctrl-kirkwood.c
> @@ -0,0 +1,472 @@
> +/*
> + * Marvell Kirkwood pinctrl driver based on mvebu pinctrl core
> + *
> + * Author: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#include <linux/err.h>
> +#include <linux/init.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/clk.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/pinctrl/pinctrl.h>
> +
> +#include "pinctrl-mvebu.h"
> +
> +#define V(f6180, f6190, f6192, f6281, f6282) \
> + ((f6180 << 0) | (f6190 << 1) | (f6192 << 2) | \
> + (f6281 << 3) | (f6282 << 4))
> +
> +enum kirkwood_variant {
> + VARIANT_MV88F6180 = V(1, 0, 0, 0, 0),
> + VARIANT_MV88F6190 = V(0, 1, 0, 0, 0),
> + VARIANT_MV88F6192 = V(0, 0, 1, 0, 0),
> + VARIANT_MV88F6281 = V(0, 0, 0, 1, 0),
> + VARIANT_MV88F6282 = V(0, 0, 0, 0, 1),
> +};
> +
> +static struct mvebu_mpp_mode mv88f6xxx_mpp_modes[] = {
> + MPP_MODE(0,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "nand", "io2", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "spi", "cs", V(1, 1, 1, 1, 1))),
> + MPP_MODE(1,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "nand", "io3", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "spi", "mosi", V(1, 1, 1, 1, 1))),
> + MPP_MODE(2,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "nand", "io4", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "spi", "sck", V(1, 1, 1, 1, 1))),
> + MPP_MODE(3,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "nand", "io5", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "spi", "miso", V(1, 1, 1, 1, 1))),
> + MPP_MODE(4,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "nand", "io6", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "uart0", "rxd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata1", "act", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "hsync", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xd, "ptp", "clk", V(1, 1, 1, 1, 0))),
> + MPP_MODE(5,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "nand", "io7", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "uart0", "txd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "ptp", "trig", V(1, 1, 1, 1, 0)),
> + MPP_VAR_FUNCTION(0x5, "sata0", "act", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "vsync", V(0, 0, 0, 0, 1))),
> + MPP_MODE(6,
> + MPP_VAR_FUNCTION(0x0, "sysrst", "out", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "spi", "mosi", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "ptp", "trig", V(1, 1, 1, 1, 0))),
> + MPP_MODE(7,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "pex", "rsto", V(1, 1, 1, 1, 0)),
> + MPP_VAR_FUNCTION(0x2, "spi", "cs", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ptp", "trig", V(1, 1, 1, 1, 0)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "pwm", V(0, 0, 0, 0, 1))),
> + MPP_MODE(8,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "twsi0", "sda", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "uart0", "rts", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "uart1", "rts", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "mii-1", "rxerr", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata1", "prsnt", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xc, "ptp", "clk", V(1, 1, 1, 1, 0)),
> + MPP_VAR_FUNCTION(0xd, "mii", "col", V(1, 1, 1, 1, 1))),
> + MPP_MODE(9,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "twsi0", "sck", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "uart0", "cts", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "uart1", "cts", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata0", "prsnt", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xc, "ptp", "evreq", V(1, 1, 1, 1, 0)),
> + MPP_VAR_FUNCTION(0xd, "mii", "crs", V(1, 1, 1, 1, 1))),
> + MPP_MODE(10,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "spi", "sck", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0X3, "uart0", "txd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata1", "act", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xc, "ptp", "trig", V(1, 1, 1, 1, 0))),
> + MPP_MODE(11,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "spi", "miso", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "uart0", "rxd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "ptp-1", "evreq", V(1, 1, 1, 1, 0)),
> + MPP_VAR_FUNCTION(0xc, "ptp-2", "trig", V(1, 1, 1, 1, 0)),
> + MPP_VAR_FUNCTION(0xd, "ptp", "clk", V(1, 1, 1, 1, 0)),
> + MPP_VAR_FUNCTION(0x5, "sata0", "act", V(0, 1, 1, 1, 1))),
> + MPP_MODE(12,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 0, 1)),
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 0)),
> + MPP_VAR_FUNCTION(0x1, "sdio", "clk", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xa, "audio", "spdifo", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xb, "spi", "mosi", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xd, "twsi1", "sda", V(0, 0, 0, 0, 1))),
> + MPP_MODE(13,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "sdio", "cmd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "uart1", "txd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xa, "audio", "rmclk", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "pwm", V(0, 0, 0, 0, 1))),
> + MPP_MODE(14,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "sdio", "d0", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "sata1", "prsnt", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xa, "audio", "spdifi", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xb, "audio-1", "sdi", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xd, "mii", "col", V(1, 1, 1, 1, 1))),
> + MPP_MODE(15,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "sdio", "d1", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "uart0", "rts", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "uart1", "txd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "sata0", "act", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "spi", "cs", V(0, 0, 0, 0, 1))),
> + MPP_MODE(16,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "sdio", "d2", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "uart0", "cts", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "sata1", "act", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "extclk", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xd, "mii", "crs", V(1, 1, 1, 1, 1))),
> + MPP_MODE(17,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "sdio", "d3", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "sata0", "prsnt", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xa, "sata1", "act", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xd, "twsi1", "sck", V(0, 0, 0, 0, 1))),
> + MPP_MODE(18,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "nand", "io0", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "pex", "clkreq", V(0, 0, 0, 0, 1))),
> + MPP_MODE(19,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "nand", "io1", V(1, 1, 1, 1, 1))),
> + MPP_MODE(20,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp0", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "tx0ql", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "txd0", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "spdifi", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata1", "act", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d0", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xc, "mii", "rxerr", V(1, 0, 0, 0, 0))),
> + MPP_MODE(21,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp1", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "rx0ql", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "txd1", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "spdifi", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0x4, "audio", "spdifo", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata0", "act", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d1", V(0, 0, 0, 0, 1))),
> + MPP_MODE(22,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp2", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "tx2ql", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "txd2", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "spdifo", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0x4, "audio", "rmclk", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata1", "prsnt", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d2", V(0, 0, 0, 0, 1))),
> + MPP_MODE(23,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp3", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "rx2ql", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "txd3", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "rmclk", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0x4, "audio", "bclk", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata0", "prsnt", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d3", V(0, 0, 0, 0, 1))),
> + MPP_MODE(24,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp4", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-cs0", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "rxd0", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "bclk", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0x4, "audio", "sdo", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d4", V(0, 0, 0, 0, 1))),
> + MPP_MODE(25,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp5", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-sck", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "rxd1", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "sdo", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0x4, "audio", "lrclk", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d5", V(0, 0, 0, 0, 1))),
> + MPP_MODE(26,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp6", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-miso", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "rxd2", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "lrclk", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0x4, "audio", "mclk", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d6", V(0, 0, 0, 0, 1))),
> + MPP_MODE(27,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp7", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-mosi", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "rxd3", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "mclk", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0x4, "audio", "sdi", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d7", V(0, 0, 0, 0, 1))),
> + MPP_MODE(28,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp8", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "int", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "col", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "sdi", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0x4, "audio", "extclk", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d8", V(0, 0, 0, 0, 1))),
> + MPP_MODE(29,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp9", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "rst", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "txclk", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "extclk", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d9", V(0, 0, 0, 0, 1))),
> + MPP_MODE(30,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp10", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "pclk", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "rxctl", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d10", V(0, 0, 0, 0, 1))),
> + MPP_MODE(31,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp11", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "fs", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "rxclk", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d11", V(0, 0, 0, 0, 1))),
> + MPP_MODE(32,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp12", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "drx", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "txclko", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d12", V(0, 0, 0, 0, 1))),
> + MPP_MODE(33,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "dtx", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "txctl", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d13", V(0, 0, 0, 0, 1))),
> + MPP_MODE(34,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-cs1", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "txen", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata1", "act", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d14", V(0, 0, 0, 0, 1))),
> + MPP_MODE(35,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "tx0ql", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "rxerr", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata0", "act", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d15", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xc, "mii", "rxerr", V(0, 1, 1, 1, 1))),
> + MPP_MODE(36,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp0", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-cs1", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "spdifi", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "twsi1", "sda", V(0, 0, 0, 0, 1))),
> + MPP_MODE(37,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp1", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "tx2ql", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "spdifo", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "twsi1", "sck", V(0, 0, 0, 0, 1))),
> + MPP_MODE(38,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp2", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "rx2ql", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "rmclk", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d18", V(0, 0, 0, 0, 1))),
> + MPP_MODE(39,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp3", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-cs0", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "bclk", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d19", V(0, 0, 0, 0, 1))),
> + MPP_MODE(40,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp4", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-sck", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "sdo", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d20", V(0, 0, 0, 0, 1))),
> + MPP_MODE(41,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp5", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-miso", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "lrclk", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d21", V(0, 0, 0, 0, 1))),
> + MPP_MODE(42,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp6", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-mosi", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "mclk", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d22", V(0, 0, 0, 0, 1))),
> + MPP_MODE(43,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp7", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "int", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "sdi", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d23", V(0, 0, 0, 0, 1))),
> + MPP_MODE(44,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp8", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "rst", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "extclk", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "clk", V(0, 0, 0, 0, 1))),
> + MPP_MODE(45,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp9", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "pclk", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "e", V(0, 0, 0, 0, 1))),
> + MPP_MODE(46,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp10", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "fs", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "hsync", V(0, 0, 0, 0, 1))),
> + MPP_MODE(47,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp11", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "drx", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "vsync", V(0, 0, 0, 0, 1))),
> + MPP_MODE(48,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp12", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "dtx", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d16", V(0, 0, 0, 0, 1))),
> + MPP_MODE(49,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 0)),
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp9", V(0, 0, 0, 1, 0)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "rx0ql", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "ptp", "clk", V(0, 0, 0, 1, 0)),
> + MPP_VAR_FUNCTION(0xa, "pex", "clkreq", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d17", V(0, 0, 0, 0, 1))),
> +};
> +
> +static struct mvebu_mpp_ctrl mv88f6180_mpp_controls[] = {
> + MPP_REG_CTRL(0, 29),
> +};
> +
> +static struct pinctrl_gpio_range mv88f6180_gpio_ranges[] = {
> + MPP_GPIO_RANGE(0, 0, 0, 30),
> +};
> +
> +static struct mvebu_mpp_ctrl mv88f619x_mpp_controls[] = {
> + MPP_REG_CTRL(0, 35),
> +};
> +
> +static struct pinctrl_gpio_range mv88f619x_gpio_ranges[] = {
> + MPP_GPIO_RANGE(0, 0, 0, 32),
> + MPP_GPIO_RANGE(1, 32, 32, 4),
> +};
> +
> +static struct mvebu_mpp_ctrl mv88f628x_mpp_controls[] = {
> + MPP_REG_CTRL(0, 49),
> +};
> +
> +static struct pinctrl_gpio_range mv88f628x_gpio_ranges[] = {
> + MPP_GPIO_RANGE(0, 0, 0, 32),
> + MPP_GPIO_RANGE(1, 32, 32, 18),
> +};
> +
> +static struct mvebu_pinctrl_soc_info mv88f6180_info = {
> + .variant = VARIANT_MV88F6180,
> + .controls = mv88f6180_mpp_controls,
> + .ncontrols = ARRAY_SIZE(mv88f6180_mpp_controls),
> + .modes = mv88f6xxx_mpp_modes,
> + .nmodes = ARRAY_SIZE(mv88f6xxx_mpp_modes),
> + .gpioranges = mv88f6180_gpio_ranges,
> + .ngpioranges = ARRAY_SIZE(mv88f6180_gpio_ranges),
> +};
> +
> +static struct mvebu_pinctrl_soc_info mv88f6190_info = {
> + .variant = VARIANT_MV88F6190,
> + .controls = mv88f619x_mpp_controls,
> + .ncontrols = ARRAY_SIZE(mv88f619x_mpp_controls),
> + .modes = mv88f6xxx_mpp_modes,
> + .nmodes = ARRAY_SIZE(mv88f6xxx_mpp_modes),
> + .gpioranges = mv88f619x_gpio_ranges,
> + .ngpioranges = ARRAY_SIZE(mv88f619x_gpio_ranges),
> +};
> +
> +static struct mvebu_pinctrl_soc_info mv88f6192_info = {
> + .variant = VARIANT_MV88F6192,
> + .controls = mv88f619x_mpp_controls,
> + .ncontrols = ARRAY_SIZE(mv88f619x_mpp_controls),
> + .modes = mv88f6xxx_mpp_modes,
> + .nmodes = ARRAY_SIZE(mv88f6xxx_mpp_modes),
> + .gpioranges = mv88f619x_gpio_ranges,
> + .ngpioranges = ARRAY_SIZE(mv88f619x_gpio_ranges),
> +};
> +
> +static struct mvebu_pinctrl_soc_info mv88f6281_info = {
> + .variant = VARIANT_MV88F6281,
> + .controls = mv88f628x_mpp_controls,
> + .ncontrols = ARRAY_SIZE(mv88f628x_mpp_controls),
> + .modes = mv88f6xxx_mpp_modes,
> + .nmodes = ARRAY_SIZE(mv88f6xxx_mpp_modes),
> + .gpioranges = mv88f628x_gpio_ranges,
> + .ngpioranges = ARRAY_SIZE(mv88f628x_gpio_ranges),
> +};
> +
> +static struct mvebu_pinctrl_soc_info mv88f6282_info = {
> + .variant = VARIANT_MV88F6282,
> + .controls = mv88f628x_mpp_controls,
> + .ncontrols = ARRAY_SIZE(mv88f628x_mpp_controls),
> + .modes = mv88f6xxx_mpp_modes,
> + .nmodes = ARRAY_SIZE(mv88f6xxx_mpp_modes),
> + .gpioranges = mv88f628x_gpio_ranges,
> + .ngpioranges = ARRAY_SIZE(mv88f628x_gpio_ranges),
> +};
> +
> +static struct of_device_id kirkwood_pinctrl_of_match[] __devinitdata = {
> + { .compatible = "marvell,88f6180-pinctrl", .data = &mv88f6180_info },
> + { .compatible = "marvell,88f6190-pinctrl", .data = &mv88f6190_info },
> + { .compatible = "marvell,88f6192-pinctrl", .data = &mv88f6192_info },
> + { .compatible = "marvell,88f6281-pinctrl", .data = &mv88f6281_info },
> + { .compatible = "marvell,88f6282-pinctrl", .data = &mv88f6282_info },
> + { }
> +};
> +
> +static int __devinit kirkwood_pinctrl_probe(struct platform_device *pdev)
> +{
> + const struct of_device_id *match =
> + of_match_device(kirkwood_pinctrl_of_match, &pdev->dev);
> + pdev->dev.platform_data = match->data;
> + return mvebu_pinctrl_probe(pdev);
> +}
> +
> +static int __devexit kirkwood_pinctrl_remove(struct platform_device *pdev)
> +{
> + return mvebu_pinctrl_remove(pdev);
> +}
> +
> +static struct platform_driver kirkwood_pinctrl_driver = {
> + .driver = {
> + .name = "kirkwood-pinctrl",
> + .owner = THIS_MODULE,
> + .of_match_table = of_match_ptr(kirkwood_pinctrl_of_match),
> + },
> + .probe = kirkwood_pinctrl_probe,
> + .remove = __devexit_p(kirkwood_pinctrl_remove),
> +};
> +
> +module_platform_driver(kirkwood_pinctrl_driver);
> +
> +MODULE_AUTHOR("Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>");
> +MODULE_DESCRIPTION("Marvell Kirkwood pinctrl driver");
> +MODULE_LICENSE("GPL v2");
> --
> 1.7.10.4
>
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Lunn <andrew@lunn.ch>
To: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
Grant Likely <grant.likely@secretlab.ca>,
Rob Herring <rob.herring@calxeda.com>,
Rob Landley <rob@landley.net>,
Russell King <linux@arm.linux.org.uk>,
Lior Amsalem <alior@marvell.com>, Andrew Lunn <andrew@lunn.ch>,
Jason Cooper <jason@lakedaemon.net>,
Gregory CLEMENT <gregory.clement@free-electrons.com>,
Ben Dooks <ben.dooks@codethink.co.uk>,
Linus Walleij <linus.walleij@linaro.org>,
Stephen Warren <swarren@wwwdotorg.org>,
devicetree-discuss@lists.ozlabs.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 03/10] pinctrl: mvebu: kirkwood pinctrl driver
Date: Tue, 18 Sep 2012 20:59:40 +0200 [thread overview]
Message-ID: <20120918185940.GW28177@lunn.ch> (raw)
In-Reply-To: <1347550912-18021-4-git-send-email-sebastian.hesselbarth@gmail.com>
On Thu, Sep 13, 2012 at 05:41:45PM +0200, Sebastian Hesselbarth wrote:
> This patch adds a SoC specific pinctrl driver for Marvell Kirkwood SoCs
> plus DT binding documentation. This driver will use the mvebu pinctrl
> driver core.
>
> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> v2:
> - restructured pinctrl/Kconfig to hide pinctrl driver as it will be
> always selected by arch/arm/mach-mvebu/Kconfig
> - use enum for kirkwood variants instead of defines
>
> v3:
> - moved variant specific data to DT match struct
>
> v4:
> - fix bogus v3 patch set
Since Linus Walleij thinks that autoprobing is not going to happen,
Tested-by: Andrew Lunn <andrew@lunn.ch>
However, i still think it would be nice to have auto probing.
Andrew
> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Cc: Rob Herring <rob.herring@calxeda.com>
> Cc: Rob Landley <rob@landley.net>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Lior Amsalem <alior@marvell.com>
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: Jason Cooper <jason@lakedaemon.net>
> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
> Cc: Ben Dooks <ben.dooks@codethink.co.uk>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Stephen Warren <swarren@wwwdotorg.org>
> Cc: devicetree-discuss@lists.ozlabs.org
> Cc: linux-doc@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-arm-kernel@lists.infradead.org
> ---
> .../bindings/pinctrl/marvell,kirkwood-pinctrl.txt | 279 ++++++++++++
> drivers/pinctrl/Kconfig | 4 +
> drivers/pinctrl/Makefile | 1 +
> drivers/pinctrl/pinctrl-kirkwood.c | 472 ++++++++++++++++++++
> 4 files changed, 756 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt
> create mode 100644 drivers/pinctrl/pinctrl-kirkwood.c
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt
> new file mode 100644
> index 0000000..361bccb
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt
> @@ -0,0 +1,279 @@
> +* Marvell Kirkwood SoC pinctrl driver for mpp
> +
> +Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
> +part and usage.
> +
> +Required properties:
> +- compatible: "marvell,88f6180-pinctrl",
> + "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
> + "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl"
> +
> +This driver supports all kirkwood variants, i.e. 88f6180, 88f619x, and 88f628x.
> +
> +Available mpp pins/groups and functions:
> +Note: brackets (x) are not part of the mpp name for marvell,function and given
> +only for more detailed description in this document.
> +
> +* Marvell Kirkwood 88f6180
> +
> +name pins functions
> +================================================================================
> +mpp0 0 gpio, nand(io2), spi(cs)
> +mpp1 1 gpo, nand(io3), spi(mosi)
> +mpp2 2 gpo, nand(io4), spi(sck)
> +mpp3 3 gpo, nand(io5), spi(miso)
> +mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk)
> +mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig)
> +mpp6 6 sysrst(out), spi(mosi), ptp(trig)
> +mpp7 7 gpo, pex(rsto), spi(cs), ptp(trig)
> +mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
> + mii(col)
> +mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
> + mii(crs)
> +mpp10 10 gpo, spi(sck), uart0(txd), ptp(trig)
> +mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq),
> + ptp-2(trig)
> +mpp12 12 gpo, sdio(clk)
> +mpp13 13 gpio, sdio(cmd), uart1(txd)
> +mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col)
> +mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd)
> +mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs)
> +mpp17 17 gpio, sdio(d3)
> +mpp18 18 gpo, nand(io0)
> +mpp19 19 gpo, nand(io1)
> +mpp20 20 gpio, mii(rxerr)
> +mpp21 21 gpio, audio(spdifi)
> +mpp22 22 gpio, audio(spdifo)
> +mpp23 23 gpio, audio(rmclk)
> +mpp24 24 gpio, audio(bclk)
> +mpp25 25 gpio, audio(sdo)
> +mpp26 26 gpio, audio(lrclk)
> +mpp27 27 gpio, audio(mclk)
> +mpp28 28 gpio, audio(sdi)
> +mpp29 29 gpio, audio(extclk)
> +
> +* Marvell Kirkwood 88f6190
> +
> +name pins functions
> +================================================================================
> +mpp0 0 gpio, nand(io2), spi(cs)
> +mpp1 1 gpo, nand(io3), spi(mosi)
> +mpp2 2 gpo, nand(io4), spi(sck)
> +mpp3 3 gpo, nand(io5), spi(miso)
> +mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk)
> +mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig), sata0(act)
> +mpp6 6 sysrst(out), spi(mosi), ptp(trig)
> +mpp7 7 gpo, pex(rsto), spi(cs), ptp(trig)
> +mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
> + mii(col), mii-1(rxerr)
> +mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
> + mii(crs), sata0(prsnt)
> +mpp10 10 gpo, spi(sck), uart0(txd), ptp(trig)
> +mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq),
> + ptp-2(trig), sata0(act)
> +mpp12 12 gpo, sdio(clk)
> +mpp13 13 gpio, sdio(cmd), uart1(txd)
> +mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col)
> +mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd), sata0(act)
> +mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs)
> +mpp17 17 gpio, sdio(d3), sata0(prsnt)
> +mpp18 18 gpo, nand(io0)
> +mpp19 19 gpo, nand(io1)
> +mpp20 20 gpio, ge1(txd0)
> +mpp21 21 gpio, ge1(txd1), sata0(act)
> +mpp22 22 gpio, ge1(txd2)
> +mpp23 23 gpio, ge1(txd3), sata0(prsnt)
> +mpp24 24 gpio, ge1(rxd0)
> +mpp25 25 gpio, ge1(rxd1)
> +mpp26 26 gpio, ge1(rxd2)
> +mpp27 27 gpio, ge1(rxd3)
> +mpp28 28 gpio, ge1(col)
> +mpp29 29 gpio, ge1(txclk)
> +mpp30 30 gpio, ge1(rxclk)
> +mpp31 31 gpio, ge1(rxclk)
> +mpp32 32 gpio, ge1(txclko)
> +mpp33 33 gpo, ge1(txclk)
> +mpp34 34 gpio, ge1(txen)
> +mpp35 35 gpio, ge1(rxerr), sata0(act), mii(rxerr)
> +
> +* Marvell Kirkwood 88f6192
> +
> +name pins functions
> +================================================================================
> +mpp0 0 gpio, nand(io2), spi(cs)
> +mpp1 1 gpo, nand(io3), spi(mosi)
> +mpp2 2 gpo, nand(io4), spi(sck)
> +mpp3 3 gpo, nand(io5), spi(miso)
> +mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk), sata1(act)
> +mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig), sata0(act)
> +mpp6 6 sysrst(out), spi(mosi), ptp(trig)
> +mpp7 7 gpo, pex(rsto), spi(cs), ptp(trig)
> +mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
> + mii(col), mii-1(rxerr), sata1(prsnt)
> +mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
> + mii(crs), sata0(prsnt)
> +mpp10 10 gpo, spi(sck), uart0(txd), ptp(trig), sata1(act)
> +mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq),
> + ptp-2(trig), sata0(act)
> +mpp12 12 gpo, sdio(clk)
> +mpp13 13 gpio, sdio(cmd), uart1(txd)
> +mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col), sata1(prsnt)
> +mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd), sata0(act)
> +mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs),
> + sata1(act)
> +mpp17 17 gpio, sdio(d3), sata0(prsnt)
> +mpp18 18 gpo, nand(io0)
> +mpp19 19 gpo, nand(io1)
> +mpp20 20 gpio, ge1(txd0), ts(mp0), tdm(tx0ql), audio(spdifi),
> + sata1(act)
> +mpp21 21 gpio, ge1(txd1), sata0(act), ts(mp1), tdm(rx0ql),
> + audio(spdifo)
> +mpp22 22 gpio, ge1(txd2), ts(mp2), tdm(tx2ql), audio(rmclk),
> + sata1(prsnt)
> +mpp23 23 gpio, ge1(txd3), sata0(prsnt), ts(mp3), tdm(rx2ql),
> + audio(bclk)
> +mpp24 24 gpio, ge1(rxd0), ts(mp4), tdm(spi-cs0), audio(sdo)
> +mpp25 25 gpio, ge1(rxd1), ts(mp5), tdm(spi-sck), audio(lrclk)
> +mpp26 26 gpio, ge1(rxd2), ts(mp6), tdm(spi-miso), audio(mclk)
> +mpp27 27 gpio, ge1(rxd3), ts(mp7), tdm(spi-mosi), audio(sdi)
> +mpp28 28 gpio, ge1(col), ts(mp8), tdm(int), audio(extclk)
> +mpp29 29 gpio, ge1(txclk), ts(mp9), tdm(rst)
> +mpp30 30 gpio, ge1(rxclk), ts(mp10), tdm(pclk)
> +mpp31 31 gpio, ge1(rxclk), ts(mp11), tdm(fs)
> +mpp32 32 gpio, ge1(txclko), ts(mp12), tdm(drx)
> +mpp33 33 gpo, ge1(txclk), tdm(drx)
> +mpp34 34 gpio, ge1(txen), tdm(spi-cs1)
> +mpp35 35 gpio, ge1(rxerr), sata0(act), mii(rxerr), tdm(tx0ql)
> +
> +* Marvell Kirkwood 88f6281
> +
> +name pins functions
> +================================================================================
> +mpp0 0 gpio, nand(io2), spi(cs)
> +mpp1 1 gpo, nand(io3), spi(mosi)
> +mpp2 2 gpo, nand(io4), spi(sck)
> +mpp3 3 gpo, nand(io5), spi(miso)
> +mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk), sata1(act)
> +mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig), sata0(act)
> +mpp6 6 sysrst(out), spi(mosi), ptp(trig)
> +mpp7 7 gpo, pex(rsto), spi(cs), ptp(trig)
> +mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
> + mii(col), mii-1(rxerr), sata1(prsnt)
> +mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
> + mii(crs), sata0(prsnt)
> +mpp10 10 gpo, spi(sck), uart0(txd), ptp(trig), sata1(act)
> +mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq),
> + ptp-2(trig), sata0(act)
> +mpp12 12 gpio, sdio(clk)
> +mpp13 13 gpio, sdio(cmd), uart1(txd)
> +mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col), sata1(prsnt)
> +mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd), sata0(act)
> +mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs),
> + sata1(act)
> +mpp17 17 gpio, sdio(d3), sata0(prsnt)
> +mpp18 18 gpo, nand(io0)
> +mpp19 19 gpo, nand(io1)
> +mpp20 20 gpio, ge1(txd0), ts(mp0), tdm(tx0ql), audio(spdifi),
> + sata1(act)
> +mpp21 21 gpio, ge1(txd1), sata0(act), ts(mp1), tdm(rx0ql),
> + audio(spdifo)
> +mpp22 22 gpio, ge1(txd2), ts(mp2), tdm(tx2ql), audio(rmclk),
> + sata1(prsnt)
> +mpp23 23 gpio, ge1(txd3), sata0(prsnt), ts(mp3), tdm(rx2ql),
> + audio(bclk)
> +mpp24 24 gpio, ge1(rxd0), ts(mp4), tdm(spi-cs0), audio(sdo)
> +mpp25 25 gpio, ge1(rxd1), ts(mp5), tdm(spi-sck), audio(lrclk)
> +mpp26 26 gpio, ge1(rxd2), ts(mp6), tdm(spi-miso), audio(mclk)
> +mpp27 27 gpio, ge1(rxd3), ts(mp7), tdm(spi-mosi), audio(sdi)
> +mpp28 28 gpio, ge1(col), ts(mp8), tdm(int), audio(extclk)
> +mpp29 29 gpio, ge1(txclk), ts(mp9), tdm(rst)
> +mpp30 30 gpio, ge1(rxclk), ts(mp10), tdm(pclk)
> +mpp31 31 gpio, ge1(rxclk), ts(mp11), tdm(fs)
> +mpp32 32 gpio, ge1(txclko), ts(mp12), tdm(drx)
> +mpp33 33 gpo, ge1(txclk), tdm(drx)
> +mpp34 34 gpio, ge1(txen), tdm(spi-cs1), sata1(act)
> +mpp35 35 gpio, ge1(rxerr), sata0(act), mii(rxerr), tdm(tx0ql)
> +mpp36 36 gpio, ts(mp0), tdm(spi-cs1), audio(spdifi)
> +mpp37 37 gpio, ts(mp1), tdm(tx2ql), audio(spdifo)
> +mpp38 38 gpio, ts(mp2), tdm(rx2ql), audio(rmclk)
> +mpp39 39 gpio, ts(mp3), tdm(spi-cs0), audio(bclk)
> +mpp40 40 gpio, ts(mp4), tdm(spi-sck), audio(sdo)
> +mpp41 41 gpio, ts(mp5), tdm(spi-miso), audio(lrclk)
> +mpp42 42 gpio, ts(mp6), tdm(spi-mosi), audio(mclk)
> +mpp43 43 gpio, ts(mp7), tdm(int), audio(sdi)
> +mpp44 44 gpio, ts(mp8), tdm(rst), audio(extclk)
> +mpp45 45 gpio, ts(mp9), tdm(pclk)
> +mpp46 46 gpio, ts(mp10), tdm(fs)
> +mpp47 47 gpio, ts(mp11), tdm(drx)
> +mpp48 48 gpio, ts(mp12), tdm(dtx)
> +mpp49 49 gpio, ts(mp9), tdm(rx0ql), ptp(clk)
> +
> +* Marvell Kirkwood 88f6282
> +
> +name pins functions
> +================================================================================
> +mpp0 0 gpio, nand(io2), spi(cs)
> +mpp1 1 gpo, nand(io3), spi(mosi)
> +mpp2 2 gpo, nand(io4), spi(sck)
> +mpp3 3 gpo, nand(io5), spi(miso)
> +mpp4 4 gpio, nand(io6), uart0(rxd), sata1(act), lcd(hsync)
> +mpp5 5 gpo, nand(io7), uart0(txd), sata0(act), lcd(vsync)
> +mpp6 6 sysrst(out), spi(mosi)
> +mpp7 7 gpo, spi(cs), lcd(pwm)
> +mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), mii(col),
> + mii-1(rxerr), sata1(prsnt)
> +mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), mii(crs),
> + sata0(prsnt)
> +mpp10 10 gpo, spi(sck), uart0(txd), sata1(act)
> +mpp11 11 gpio, spi(miso), uart0(rxd), sata0(act)
> +mpp12 12 gpo, sdio(clk), audio(spdifo), spi(mosi), twsi(sda)
> +mpp13 13 gpio, sdio(cmd), uart1(txd), audio(rmclk), lcd(pwm)
> +mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col), sata1(prsnt),
> + audio(spdifi), audio-1(sdi)
> +mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd), sata0(act),
> + spi(cs)
> +mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs),
> + sata1(act), lcd(extclk)
> +mpp17 17 gpio, sdio(d3), sata0(prsnt), sata1(act), twsi1(sck)
> +mpp18 18 gpo, nand(io0), pex(clkreq)
> +mpp19 19 gpo, nand(io1)
> +mpp20 20 gpio, ge1(txd0), ts(mp0), tdm(tx0ql), audio(spdifi),
> + sata1(act), lcd(d0)
> +mpp21 21 gpio, ge1(txd1), sata0(act), ts(mp1), tdm(rx0ql),
> + audio(spdifo), lcd(d1)
> +mpp22 22 gpio, ge1(txd2), ts(mp2), tdm(tx2ql), audio(rmclk),
> + sata1(prsnt), lcd(d2)
> +mpp23 23 gpio, ge1(txd3), sata0(prsnt), ts(mp3), tdm(rx2ql),
> + audio(bclk), lcd(d3)
> +mpp24 24 gpio, ge1(rxd0), ts(mp4), tdm(spi-cs0), audio(sdo),
> + lcd(d4)
> +mpp25 25 gpio, ge1(rxd1), ts(mp5), tdm(spi-sck), audio(lrclk),
> + lcd(d5)
> +mpp26 26 gpio, ge1(rxd2), ts(mp6), tdm(spi-miso), audio(mclk),
> + lcd(d6)
> +mpp27 27 gpio, ge1(rxd3), ts(mp7), tdm(spi-mosi), audio(sdi),
> + lcd(d7)
> +mpp28 28 gpio, ge1(col), ts(mp8), tdm(int), audio(extclk),
> + lcd(d8)
> +mpp29 29 gpio, ge1(txclk), ts(mp9), tdm(rst), lcd(d9)
> +mpp30 30 gpio, ge1(rxclk), ts(mp10), tdm(pclk), lcd(d10)
> +mpp31 31 gpio, ge1(rxclk), ts(mp11), tdm(fs), lcd(d11)
> +mpp32 32 gpio, ge1(txclko), ts(mp12), tdm(drx), lcd(d12)
> +mpp33 33 gpo, ge1(txclk), tdm(drx), lcd(d13)
> +mpp34 34 gpio, ge1(txen), tdm(spi-cs1), sata1(act), lcd(d14)
> +mpp35 35 gpio, ge1(rxerr), sata0(act), mii(rxerr), tdm(tx0ql),
> + lcd(d15)
> +mpp36 36 gpio, ts(mp0), tdm(spi-cs1), audio(spdifi), twsi1(sda)
> +mpp37 37 gpio, ts(mp1), tdm(tx2ql), audio(spdifo), twsi1(sck)
> +mpp38 38 gpio, ts(mp2), tdm(rx2ql), audio(rmclk), lcd(d18)
> +mpp39 39 gpio, ts(mp3), tdm(spi-cs0), audio(bclk), lcd(d19)
> +mpp40 40 gpio, ts(mp4), tdm(spi-sck), audio(sdo), lcd(d20)
> +mpp41 41 gpio, ts(mp5), tdm(spi-miso), audio(lrclk), lcd(d21)
> +mpp42 42 gpio, ts(mp6), tdm(spi-mosi), audio(mclk), lcd(d22)
> +mpp43 43 gpio, ts(mp7), tdm(int), audio(sdi), lcd(d23)
> +mpp44 44 gpio, ts(mp8), tdm(rst), audio(extclk), lcd(clk)
> +mpp45 45 gpio, ts(mp9), tdm(pclk), lcd(e)
> +mpp46 46 gpio, ts(mp10), tdm(fs), lcd(hsync)
> +mpp47 47 gpio, ts(mp11), tdm(drx), lcd(vsync)
> +mpp48 48 gpio, ts(mp12), tdm(dtx), lcd(d16)
> +mpp49 49 gpo, tdm(rx0ql), pex(clkreq), lcd(d17)
> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
> index f15eba4..31c0bba 100644
> --- a/drivers/pinctrl/Kconfig
> +++ b/drivers/pinctrl/Kconfig
> @@ -155,6 +155,10 @@ config PINCTRL_DOVE
> bool
> select PINCTRL_MVEBU
>
> +config PINCTRL_KIRKWOOD
> + bool
> + select PINCTRL_MVEBU
> +
> source "drivers/pinctrl/spear/Kconfig"
>
> endmenu
> diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
> index d1327df..3006294 100644
> --- a/drivers/pinctrl/Makefile
> +++ b/drivers/pinctrl/Makefile
> @@ -31,5 +31,6 @@ obj-$(CONFIG_PINCTRL_U300) += pinctrl-u300.o
> obj-$(CONFIG_PINCTRL_COH901) += pinctrl-coh901.o
> obj-$(CONFIG_PINCTRL_MVEBU) += pinctrl-mvebu.o
> obj-$(CONFIG_PINCTRL_DOVE) += pinctrl-dove.o
> +obj-$(CONFIG_PINCTRL_KIRKWOOD) += pinctrl-kirkwood.o
>
> obj-$(CONFIG_PLAT_SPEAR) += spear/
> diff --git a/drivers/pinctrl/pinctrl-kirkwood.c b/drivers/pinctrl/pinctrl-kirkwood.c
> new file mode 100644
> index 0000000..9a74ef6
> --- /dev/null
> +++ b/drivers/pinctrl/pinctrl-kirkwood.c
> @@ -0,0 +1,472 @@
> +/*
> + * Marvell Kirkwood pinctrl driver based on mvebu pinctrl core
> + *
> + * Author: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#include <linux/err.h>
> +#include <linux/init.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/clk.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/pinctrl/pinctrl.h>
> +
> +#include "pinctrl-mvebu.h"
> +
> +#define V(f6180, f6190, f6192, f6281, f6282) \
> + ((f6180 << 0) | (f6190 << 1) | (f6192 << 2) | \
> + (f6281 << 3) | (f6282 << 4))
> +
> +enum kirkwood_variant {
> + VARIANT_MV88F6180 = V(1, 0, 0, 0, 0),
> + VARIANT_MV88F6190 = V(0, 1, 0, 0, 0),
> + VARIANT_MV88F6192 = V(0, 0, 1, 0, 0),
> + VARIANT_MV88F6281 = V(0, 0, 0, 1, 0),
> + VARIANT_MV88F6282 = V(0, 0, 0, 0, 1),
> +};
> +
> +static struct mvebu_mpp_mode mv88f6xxx_mpp_modes[] = {
> + MPP_MODE(0,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "nand", "io2", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "spi", "cs", V(1, 1, 1, 1, 1))),
> + MPP_MODE(1,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "nand", "io3", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "spi", "mosi", V(1, 1, 1, 1, 1))),
> + MPP_MODE(2,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "nand", "io4", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "spi", "sck", V(1, 1, 1, 1, 1))),
> + MPP_MODE(3,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "nand", "io5", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "spi", "miso", V(1, 1, 1, 1, 1))),
> + MPP_MODE(4,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "nand", "io6", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "uart0", "rxd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata1", "act", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "hsync", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xd, "ptp", "clk", V(1, 1, 1, 1, 0))),
> + MPP_MODE(5,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "nand", "io7", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "uart0", "txd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "ptp", "trig", V(1, 1, 1, 1, 0)),
> + MPP_VAR_FUNCTION(0x5, "sata0", "act", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "vsync", V(0, 0, 0, 0, 1))),
> + MPP_MODE(6,
> + MPP_VAR_FUNCTION(0x0, "sysrst", "out", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "spi", "mosi", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "ptp", "trig", V(1, 1, 1, 1, 0))),
> + MPP_MODE(7,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "pex", "rsto", V(1, 1, 1, 1, 0)),
> + MPP_VAR_FUNCTION(0x2, "spi", "cs", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ptp", "trig", V(1, 1, 1, 1, 0)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "pwm", V(0, 0, 0, 0, 1))),
> + MPP_MODE(8,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "twsi0", "sda", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "uart0", "rts", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "uart1", "rts", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "mii-1", "rxerr", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata1", "prsnt", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xc, "ptp", "clk", V(1, 1, 1, 1, 0)),
> + MPP_VAR_FUNCTION(0xd, "mii", "col", V(1, 1, 1, 1, 1))),
> + MPP_MODE(9,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "twsi0", "sck", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "uart0", "cts", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "uart1", "cts", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata0", "prsnt", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xc, "ptp", "evreq", V(1, 1, 1, 1, 0)),
> + MPP_VAR_FUNCTION(0xd, "mii", "crs", V(1, 1, 1, 1, 1))),
> + MPP_MODE(10,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "spi", "sck", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0X3, "uart0", "txd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata1", "act", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xc, "ptp", "trig", V(1, 1, 1, 1, 0))),
> + MPP_MODE(11,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "spi", "miso", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "uart0", "rxd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "ptp-1", "evreq", V(1, 1, 1, 1, 0)),
> + MPP_VAR_FUNCTION(0xc, "ptp-2", "trig", V(1, 1, 1, 1, 0)),
> + MPP_VAR_FUNCTION(0xd, "ptp", "clk", V(1, 1, 1, 1, 0)),
> + MPP_VAR_FUNCTION(0x5, "sata0", "act", V(0, 1, 1, 1, 1))),
> + MPP_MODE(12,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 0, 1)),
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 0)),
> + MPP_VAR_FUNCTION(0x1, "sdio", "clk", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xa, "audio", "spdifo", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xb, "spi", "mosi", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xd, "twsi1", "sda", V(0, 0, 0, 0, 1))),
> + MPP_MODE(13,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "sdio", "cmd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "uart1", "txd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xa, "audio", "rmclk", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "pwm", V(0, 0, 0, 0, 1))),
> + MPP_MODE(14,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "sdio", "d0", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "sata1", "prsnt", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xa, "audio", "spdifi", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xb, "audio-1", "sdi", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xd, "mii", "col", V(1, 1, 1, 1, 1))),
> + MPP_MODE(15,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "sdio", "d1", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "uart0", "rts", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "uart1", "txd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "sata0", "act", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "spi", "cs", V(0, 0, 0, 0, 1))),
> + MPP_MODE(16,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "sdio", "d2", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "uart0", "cts", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "sata1", "act", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "extclk", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xd, "mii", "crs", V(1, 1, 1, 1, 1))),
> + MPP_MODE(17,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "sdio", "d3", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "sata0", "prsnt", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xa, "sata1", "act", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xd, "twsi1", "sck", V(0, 0, 0, 0, 1))),
> + MPP_MODE(18,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "nand", "io0", V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "pex", "clkreq", V(0, 0, 0, 0, 1))),
> + MPP_MODE(19,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "nand", "io1", V(1, 1, 1, 1, 1))),
> + MPP_MODE(20,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp0", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "tx0ql", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "txd0", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "spdifi", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata1", "act", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d0", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xc, "mii", "rxerr", V(1, 0, 0, 0, 0))),
> + MPP_MODE(21,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp1", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "rx0ql", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "txd1", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "spdifi", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0x4, "audio", "spdifo", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata0", "act", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d1", V(0, 0, 0, 0, 1))),
> + MPP_MODE(22,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp2", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "tx2ql", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "txd2", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "spdifo", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0x4, "audio", "rmclk", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata1", "prsnt", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d2", V(0, 0, 0, 0, 1))),
> + MPP_MODE(23,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp3", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "rx2ql", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "txd3", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "rmclk", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0x4, "audio", "bclk", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata0", "prsnt", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d3", V(0, 0, 0, 0, 1))),
> + MPP_MODE(24,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp4", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-cs0", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "rxd0", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "bclk", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0x4, "audio", "sdo", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d4", V(0, 0, 0, 0, 1))),
> + MPP_MODE(25,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp5", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-sck", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "rxd1", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "sdo", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0x4, "audio", "lrclk", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d5", V(0, 0, 0, 0, 1))),
> + MPP_MODE(26,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp6", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-miso", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "rxd2", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "lrclk", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0x4, "audio", "mclk", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d6", V(0, 0, 0, 0, 1))),
> + MPP_MODE(27,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp7", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-mosi", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "rxd3", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "mclk", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0x4, "audio", "sdi", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d7", V(0, 0, 0, 0, 1))),
> + MPP_MODE(28,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp8", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "int", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "col", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "sdi", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0x4, "audio", "extclk", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d8", V(0, 0, 0, 0, 1))),
> + MPP_MODE(29,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp9", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "rst", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "txclk", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "extclk", V(1, 0, 0, 0, 0)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d9", V(0, 0, 0, 0, 1))),
> + MPP_MODE(30,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp10", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "pclk", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "rxctl", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d10", V(0, 0, 0, 0, 1))),
> + MPP_MODE(31,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp11", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "fs", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "rxclk", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d11", V(0, 0, 0, 0, 1))),
> + MPP_MODE(32,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp12", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "drx", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "txclko", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d12", V(0, 0, 0, 0, 1))),
> + MPP_MODE(33,
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "dtx", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "txctl", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d13", V(0, 0, 0, 0, 1))),
> + MPP_MODE(34,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-cs1", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "txen", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata1", "act", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d14", V(0, 0, 0, 0, 1))),
> + MPP_MODE(35,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "tx0ql", V(0, 0, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x3, "ge1", "rxerr", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "sata0", "act", V(0, 1, 1, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d15", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xc, "mii", "rxerr", V(0, 1, 1, 1, 1))),
> + MPP_MODE(36,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp0", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-cs1", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "spdifi", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "twsi1", "sda", V(0, 0, 0, 0, 1))),
> + MPP_MODE(37,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp1", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "tx2ql", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "spdifo", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "twsi1", "sck", V(0, 0, 0, 0, 1))),
> + MPP_MODE(38,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp2", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "rx2ql", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "rmclk", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d18", V(0, 0, 0, 0, 1))),
> + MPP_MODE(39,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp3", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-cs0", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "bclk", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d19", V(0, 0, 0, 0, 1))),
> + MPP_MODE(40,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp4", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-sck", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "sdo", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d20", V(0, 0, 0, 0, 1))),
> + MPP_MODE(41,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp5", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-miso", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "lrclk", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d21", V(0, 0, 0, 0, 1))),
> + MPP_MODE(42,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp6", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "spi-mosi", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "mclk", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d22", V(0, 0, 0, 0, 1))),
> + MPP_MODE(43,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp7", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "int", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "sdi", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d23", V(0, 0, 0, 0, 1))),
> + MPP_MODE(44,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp8", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "rst", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x4, "audio", "extclk", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "clk", V(0, 0, 0, 0, 1))),
> + MPP_MODE(45,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp9", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "pclk", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "e", V(0, 0, 0, 0, 1))),
> + MPP_MODE(46,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp10", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "fs", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "hsync", V(0, 0, 0, 0, 1))),
> + MPP_MODE(47,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp11", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "drx", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "vsync", V(0, 0, 0, 0, 1))),
> + MPP_MODE(48,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp12", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "dtx", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d16", V(0, 0, 0, 0, 1))),
> + MPP_MODE(49,
> + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 0)),
> + MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0x1, "ts", "mp9", V(0, 0, 0, 1, 0)),
> + MPP_VAR_FUNCTION(0x2, "tdm", "rx0ql", V(0, 0, 0, 1, 1)),
> + MPP_VAR_FUNCTION(0x5, "ptp", "clk", V(0, 0, 0, 1, 0)),
> + MPP_VAR_FUNCTION(0xa, "pex", "clkreq", V(0, 0, 0, 0, 1)),
> + MPP_VAR_FUNCTION(0xb, "lcd", "d17", V(0, 0, 0, 0, 1))),
> +};
> +
> +static struct mvebu_mpp_ctrl mv88f6180_mpp_controls[] = {
> + MPP_REG_CTRL(0, 29),
> +};
> +
> +static struct pinctrl_gpio_range mv88f6180_gpio_ranges[] = {
> + MPP_GPIO_RANGE(0, 0, 0, 30),
> +};
> +
> +static struct mvebu_mpp_ctrl mv88f619x_mpp_controls[] = {
> + MPP_REG_CTRL(0, 35),
> +};
> +
> +static struct pinctrl_gpio_range mv88f619x_gpio_ranges[] = {
> + MPP_GPIO_RANGE(0, 0, 0, 32),
> + MPP_GPIO_RANGE(1, 32, 32, 4),
> +};
> +
> +static struct mvebu_mpp_ctrl mv88f628x_mpp_controls[] = {
> + MPP_REG_CTRL(0, 49),
> +};
> +
> +static struct pinctrl_gpio_range mv88f628x_gpio_ranges[] = {
> + MPP_GPIO_RANGE(0, 0, 0, 32),
> + MPP_GPIO_RANGE(1, 32, 32, 18),
> +};
> +
> +static struct mvebu_pinctrl_soc_info mv88f6180_info = {
> + .variant = VARIANT_MV88F6180,
> + .controls = mv88f6180_mpp_controls,
> + .ncontrols = ARRAY_SIZE(mv88f6180_mpp_controls),
> + .modes = mv88f6xxx_mpp_modes,
> + .nmodes = ARRAY_SIZE(mv88f6xxx_mpp_modes),
> + .gpioranges = mv88f6180_gpio_ranges,
> + .ngpioranges = ARRAY_SIZE(mv88f6180_gpio_ranges),
> +};
> +
> +static struct mvebu_pinctrl_soc_info mv88f6190_info = {
> + .variant = VARIANT_MV88F6190,
> + .controls = mv88f619x_mpp_controls,
> + .ncontrols = ARRAY_SIZE(mv88f619x_mpp_controls),
> + .modes = mv88f6xxx_mpp_modes,
> + .nmodes = ARRAY_SIZE(mv88f6xxx_mpp_modes),
> + .gpioranges = mv88f619x_gpio_ranges,
> + .ngpioranges = ARRAY_SIZE(mv88f619x_gpio_ranges),
> +};
> +
> +static struct mvebu_pinctrl_soc_info mv88f6192_info = {
> + .variant = VARIANT_MV88F6192,
> + .controls = mv88f619x_mpp_controls,
> + .ncontrols = ARRAY_SIZE(mv88f619x_mpp_controls),
> + .modes = mv88f6xxx_mpp_modes,
> + .nmodes = ARRAY_SIZE(mv88f6xxx_mpp_modes),
> + .gpioranges = mv88f619x_gpio_ranges,
> + .ngpioranges = ARRAY_SIZE(mv88f619x_gpio_ranges),
> +};
> +
> +static struct mvebu_pinctrl_soc_info mv88f6281_info = {
> + .variant = VARIANT_MV88F6281,
> + .controls = mv88f628x_mpp_controls,
> + .ncontrols = ARRAY_SIZE(mv88f628x_mpp_controls),
> + .modes = mv88f6xxx_mpp_modes,
> + .nmodes = ARRAY_SIZE(mv88f6xxx_mpp_modes),
> + .gpioranges = mv88f628x_gpio_ranges,
> + .ngpioranges = ARRAY_SIZE(mv88f628x_gpio_ranges),
> +};
> +
> +static struct mvebu_pinctrl_soc_info mv88f6282_info = {
> + .variant = VARIANT_MV88F6282,
> + .controls = mv88f628x_mpp_controls,
> + .ncontrols = ARRAY_SIZE(mv88f628x_mpp_controls),
> + .modes = mv88f6xxx_mpp_modes,
> + .nmodes = ARRAY_SIZE(mv88f6xxx_mpp_modes),
> + .gpioranges = mv88f628x_gpio_ranges,
> + .ngpioranges = ARRAY_SIZE(mv88f628x_gpio_ranges),
> +};
> +
> +static struct of_device_id kirkwood_pinctrl_of_match[] __devinitdata = {
> + { .compatible = "marvell,88f6180-pinctrl", .data = &mv88f6180_info },
> + { .compatible = "marvell,88f6190-pinctrl", .data = &mv88f6190_info },
> + { .compatible = "marvell,88f6192-pinctrl", .data = &mv88f6192_info },
> + { .compatible = "marvell,88f6281-pinctrl", .data = &mv88f6281_info },
> + { .compatible = "marvell,88f6282-pinctrl", .data = &mv88f6282_info },
> + { }
> +};
> +
> +static int __devinit kirkwood_pinctrl_probe(struct platform_device *pdev)
> +{
> + const struct of_device_id *match =
> + of_match_device(kirkwood_pinctrl_of_match, &pdev->dev);
> + pdev->dev.platform_data = match->data;
> + return mvebu_pinctrl_probe(pdev);
> +}
> +
> +static int __devexit kirkwood_pinctrl_remove(struct platform_device *pdev)
> +{
> + return mvebu_pinctrl_remove(pdev);
> +}
> +
> +static struct platform_driver kirkwood_pinctrl_driver = {
> + .driver = {
> + .name = "kirkwood-pinctrl",
> + .owner = THIS_MODULE,
> + .of_match_table = of_match_ptr(kirkwood_pinctrl_of_match),
> + },
> + .probe = kirkwood_pinctrl_probe,
> + .remove = __devexit_p(kirkwood_pinctrl_remove),
> +};
> +
> +module_platform_driver(kirkwood_pinctrl_driver);
> +
> +MODULE_AUTHOR("Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>");
> +MODULE_DESCRIPTION("Marvell Kirkwood pinctrl driver");
> +MODULE_LICENSE("GPL v2");
> --
> 1.7.10.4
>
next prev parent reply other threads:[~2012-09-18 18:59 UTC|newest]
Thread overview: 305+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-11 12:56 [PATCH 00/11] pinctrl: mvebu: pinctrl driver Sebastian Hesselbarth
2012-08-11 12:56 ` Sebastian Hesselbarth
2012-08-11 12:56 ` [PATCH 01/11] pinctrl: mvebu: pinctrl driver core Sebastian Hesselbarth
2012-08-11 12:56 ` Sebastian Hesselbarth
2012-08-11 12:56 ` Sebastian Hesselbarth
2012-08-20 9:09 ` Linus Walleij
2012-08-20 9:09 ` Linus Walleij
2012-08-20 9:46 ` Sebastian Hesselbarth
2012-08-20 9:46 ` Sebastian Hesselbarth
2012-08-20 12:51 ` Thomas Petazzoni
2012-08-20 12:51 ` Thomas Petazzoni
2012-08-20 14:18 ` Linus Walleij
2012-08-20 14:18 ` Linus Walleij
2012-08-20 14:51 ` Sebastian Hesselbarth
2012-08-20 14:51 ` Sebastian Hesselbarth
2012-08-25 8:22 ` Andrew Lunn
2012-08-25 8:22 ` Andrew Lunn
2012-08-25 8:22 ` Andrew Lunn
2012-08-20 14:11 ` Linus Walleij
2012-08-20 14:11 ` Linus Walleij
2012-08-11 12:56 ` [PATCH 02/11] pinctrl: mvebu: dove pinctrl driver Sebastian Hesselbarth
2012-08-11 12:56 ` Sebastian Hesselbarth
2012-08-20 13:43 ` Linus Walleij
2012-08-20 13:43 ` Linus Walleij
2012-08-20 14:43 ` Sebastian Hesselbarh
2012-08-20 14:43 ` Sebastian Hesselbarh
2012-08-20 17:16 ` Thomas Petazzoni
2012-08-20 17:16 ` Thomas Petazzoni
2012-08-11 12:56 ` [PATCH 03/11] pinctrl: mvebu: kirkwood " Sebastian Hesselbarth
2012-08-11 12:56 ` Sebastian Hesselbarth
2012-08-20 13:49 ` Linus Walleij
2012-08-20 13:49 ` Linus Walleij
2012-08-27 13:43 ` Ben Dooks
2012-08-27 13:43 ` Ben Dooks
2012-08-27 13:43 ` Ben Dooks
2012-08-27 19:19 ` Sebastian Hesselbarth
2012-08-27 19:19 ` Sebastian Hesselbarth
2012-08-27 20:02 ` Stephen Warren
2012-08-27 20:02 ` Stephen Warren
2012-08-11 12:56 ` [PATCH 04/11] pinctrl: mvebu: add pinctrl driver for Armada 370 Sebastian Hesselbarth
2012-08-11 12:56 ` Sebastian Hesselbarth
2012-08-11 12:56 ` Sebastian Hesselbarth
2012-08-20 14:25 ` Linus Walleij
2012-08-20 14:25 ` Linus Walleij
2012-08-20 16:48 ` Sebastian Hesselbarth
2012-08-20 16:48 ` Sebastian Hesselbarth
2012-08-20 17:36 ` Thomas Petazzoni
2012-08-20 17:36 ` Thomas Petazzoni
2012-08-20 18:01 ` Sebastian Hesselbarth
2012-08-20 18:01 ` Sebastian Hesselbarth
2012-08-20 18:51 ` Thomas Petazzoni
2012-08-20 18:51 ` Thomas Petazzoni
2012-08-21 7:12 ` Gregory CLEMENT
2012-08-21 7:12 ` Gregory CLEMENT
2012-08-11 12:56 ` [PATCH 05/11] pinctrl: mvebu: add pinctrl driver for Armada XP Sebastian Hesselbarth
2012-08-11 12:56 ` Sebastian Hesselbarth
2012-08-20 14:26 ` Linus Walleij
2012-08-20 14:26 ` Linus Walleij
2012-08-20 14:26 ` Linus Walleij
2012-08-11 12:56 ` [PATCH 06/11] ARM: mvebu: add pinctrl device in DT for Armada 370/XP SoCs Sebastian Hesselbarth
2012-08-11 12:56 ` Sebastian Hesselbarth
2012-08-20 14:27 ` Linus Walleij
2012-08-20 14:27 ` Linus Walleij
2012-08-11 12:56 ` [PATCH 07/11] ARM: mvebu: Add pinctrl support to Armada XP SoCs Sebastian Hesselbarth
2012-08-11 12:56 ` Sebastian Hesselbarth
2012-08-20 14:27 ` Linus Walleij
2012-08-20 14:27 ` Linus Walleij
2012-08-11 12:56 ` [PATCH 08/11] ARM: mvebu: Add pinctrl support to Armada 370 SoC Sebastian Hesselbarth
2012-08-11 12:56 ` Sebastian Hesselbarth
2012-08-20 14:28 ` Linus Walleij
2012-08-20 14:28 ` Linus Walleij
2012-08-11 12:56 ` [PATCH 09/11] ARM: mvebu: adjust Armada XP evaluation board DTS Sebastian Hesselbarth
2012-08-11 12:56 ` Sebastian Hesselbarth
2012-08-20 14:28 ` Linus Walleij
2012-08-20 14:28 ` Linus Walleij
2012-08-11 12:56 ` [PATCH 10/11] arm: mvebu: enable PINCTRL usage Sebastian Hesselbarth
2012-08-11 12:56 ` Sebastian Hesselbarth
2012-08-20 14:29 ` Linus Walleij
2012-08-20 14:29 ` Linus Walleij
2012-08-11 12:56 ` [PATCH 11/11] arm: mvebu: add pinctrl support in defconfig Sebastian Hesselbarth
2012-08-11 12:56 ` Sebastian Hesselbarth
2012-08-20 14:31 ` Linus Walleij
2012-08-20 14:31 ` Linus Walleij
2012-08-20 14:54 ` Sebastian Hesselbarth
2012-08-20 14:54 ` Sebastian Hesselbarth
2012-08-20 17:37 ` Thomas Petazzoni
2012-08-20 17:37 ` Thomas Petazzoni
2012-08-20 8:12 ` [PATCH 00/11] pinctrl: mvebu: pinctrl driver Linus Walleij
2012-08-20 8:12 ` Linus Walleij
2012-08-22 8:22 ` [PATCH v2 0/9] " Sebastian Hesselbarth
2012-08-22 8:22 ` Sebastian Hesselbarth
2012-08-22 8:22 ` [PATCH v2 1/9] pinctrl: mvebu: pinctrl driver core Sebastian Hesselbarth
2012-08-22 8:22 ` Sebastian Hesselbarth
2012-08-22 8:22 ` Sebastian Hesselbarth
2012-08-22 20:43 ` Stephen Warren
2012-08-22 20:43 ` Stephen Warren
2012-08-23 9:45 ` Sebastian Hesselbarth
2012-08-23 9:45 ` Sebastian Hesselbarth
2012-08-23 17:54 ` Stephen Warren
2012-08-23 17:54 ` Stephen Warren
2012-08-23 20:31 ` Sebastian Hesselbarth
2012-08-23 20:31 ` Sebastian Hesselbarth
2012-08-23 21:26 ` Stephen Warren
2012-08-23 21:26 ` Stephen Warren
2012-08-23 23:01 ` Sebastian Hesselbarth
2012-08-23 23:01 ` Sebastian Hesselbarth
2012-08-24 3:34 ` Stephen Warren
2012-08-24 3:34 ` Stephen Warren
2012-08-25 15:53 ` Sebastian Hesselbarth
2012-08-25 15:53 ` Sebastian Hesselbarth
2012-08-27 4:33 ` Stephen Warren
2012-08-27 4:33 ` Stephen Warren
2012-09-02 7:30 ` Linus Walleij
2012-09-02 7:30 ` Linus Walleij
2012-09-02 8:27 ` Sebastian Hesselbarth
2012-09-02 8:27 ` Sebastian Hesselbarth
2012-09-02 8:27 ` Sebastian Hesselbarth
2012-09-03 9:32 ` Linus Walleij
2012-09-03 9:32 ` Linus Walleij
2012-09-03 19:47 ` Jason Cooper
2012-09-03 19:47 ` Jason Cooper
2012-09-09 19:56 ` Jason Cooper
2012-09-09 19:56 ` Jason Cooper
2012-08-22 8:22 ` [PATCH v2 2/9] pinctrl: mvebu: dove pinctrl driver Sebastian Hesselbarth
2012-08-22 8:22 ` Sebastian Hesselbarth
2012-08-22 8:22 ` Sebastian Hesselbarth
2012-08-22 8:22 ` [PATCH v2 3/9] pinctrl: mvebu: kirkwood " Sebastian Hesselbarth
2012-08-22 8:22 ` Sebastian Hesselbarth
2012-08-22 8:22 ` [PATCH v2 4/9] pinctrl: mvebu: add pinctrl driver for Armada 370 Sebastian Hesselbarth
2012-08-22 8:22 ` Sebastian Hesselbarth
2012-08-22 8:22 ` [PATCH v2 5/9] pinctrl: mvebu: add pinctrl driver for Armada XP Sebastian Hesselbarth
2012-08-22 8:22 ` Sebastian Hesselbarth
2012-08-22 8:22 ` Sebastian Hesselbarth
2012-08-22 8:22 ` [PATCH v2 6/9] ARM: mvebu: add pinctrl device in DT for Armada 370/XP SoCs Sebastian Hesselbarth
2012-08-22 8:22 ` Sebastian Hesselbarth
2012-08-22 8:22 ` [PATCH v2 7/9] ARM: mvebu: Add pinctrl support to Armada XP SoCs Sebastian Hesselbarth
2012-08-22 8:22 ` Sebastian Hesselbarth
2012-08-22 20:45 ` Stephen Warren
2012-08-22 20:45 ` Stephen Warren
2012-08-22 8:22 ` [PATCH v2 8/9] ARM: mvebu: Add pinctrl support to Armada 370 SoC Sebastian Hesselbarth
2012-08-22 8:22 ` Sebastian Hesselbarth
2012-08-22 20:46 ` Stephen Warren
2012-08-22 20:46 ` Stephen Warren
2012-08-22 8:22 ` [PATCH v2 9/9] ARM: mvebu: adjust Armada XP evaluation board DTS Sebastian Hesselbarth
2012-08-22 8:22 ` Sebastian Hesselbarth
2012-09-10 8:39 ` [PATCH v3 0/9] pinctrl: mvebu: pinctrl driver Sebastian Hesselbarth
2012-09-10 8:39 ` Sebastian Hesselbarth
2012-09-10 8:39 ` [PATCH v3 1/9] pinctrl: mvebu: pinctrl driver core Sebastian Hesselbarth
2012-09-10 8:39 ` Sebastian Hesselbarth
2012-09-10 8:39 ` Sebastian Hesselbarth
2012-09-10 15:39 ` Linus Walleij
2012-09-10 15:39 ` Linus Walleij
2012-09-10 15:39 ` Linus Walleij
2012-09-11 14:44 ` Thomas Petazzoni
2012-09-11 14:44 ` Thomas Petazzoni
2012-09-11 22:17 ` Stephen Warren
2012-09-11 22:17 ` Stephen Warren
2012-09-12 6:04 ` Linus Walleij
2012-09-12 6:04 ` Linus Walleij
2012-09-12 6:54 ` Thomas Petazzoni
2012-09-12 6:54 ` Thomas Petazzoni
2012-09-12 15:50 ` Linus Walleij
2012-09-12 15:50 ` Linus Walleij
2012-09-12 16:01 ` Thomas Petazzoni
2012-09-12 16:01 ` Thomas Petazzoni
2012-09-12 16:17 ` Linus Walleij
2012-09-12 16:17 ` Linus Walleij
2012-09-12 21:10 ` Stephen Warren
2012-09-12 21:10 ` Stephen Warren
2012-09-10 8:39 ` [PATCH v3 2/9] pinctrl: mvebu: dove pinctrl driver Sebastian Hesselbarth
2012-09-10 8:39 ` Sebastian Hesselbarth
2012-09-10 15:40 ` Linus Walleij
2012-09-10 15:40 ` Linus Walleij
2012-09-11 22:18 ` Stephen Warren
2012-09-11 22:18 ` Stephen Warren
2012-09-10 8:39 ` [PATCH v3 3/9] pinctrl: mvebu: kirkwood " Sebastian Hesselbarth
2012-09-10 8:39 ` Sebastian Hesselbarth
2012-09-10 15:42 ` Linus Walleij
2012-09-10 15:42 ` Linus Walleij
2012-09-10 8:39 ` [PATCH v3 4/9] pinctrl: mvebu: add pinctrl driver for Armada 370 Sebastian Hesselbarth
2012-09-10 8:39 ` Sebastian Hesselbarth
2012-09-10 15:43 ` Linus Walleij
2012-09-10 15:43 ` Linus Walleij
2012-09-10 8:39 ` [PATCH v3 5/9] pinctrl: mvebu: add pinctrl driver for Armada XP Sebastian Hesselbarth
2012-09-10 8:39 ` Sebastian Hesselbarth
2012-09-10 15:43 ` Linus Walleij
2012-09-10 15:43 ` Linus Walleij
2012-09-10 8:39 ` [PATCH v3 6/9] ARM: mvebu: add pinctrl device in DT for Armada 370/XP SoCs Sebastian Hesselbarth
2012-09-10 8:39 ` Sebastian Hesselbarth
2012-09-10 8:39 ` Sebastian Hesselbarth
2012-09-11 22:23 ` Stephen Warren
2012-09-11 22:23 ` Stephen Warren
2012-09-12 6:56 ` Thomas Petazzoni
2012-09-12 6:56 ` Thomas Petazzoni
2012-09-12 20:57 ` Stephen Warren
2012-09-12 20:57 ` Stephen Warren
2012-09-10 8:39 ` [PATCH v3 7/9] ARM: mvebu: Add pinctrl support to Armada XP SoCs Sebastian Hesselbarth
2012-09-10 8:39 ` Sebastian Hesselbarth
2012-09-10 8:39 ` [PATCH v3 8/9] ARM: mvebu: Add pinctrl support to Armada 370 SoC Sebastian Hesselbarth
2012-09-10 8:39 ` Sebastian Hesselbarth
2012-09-10 8:39 ` [PATCH v3 9/9] ARM: mvebu: adjust Armada XP evaluation board DTS Sebastian Hesselbarth
2012-09-10 8:39 ` Sebastian Hesselbarth
2012-09-10 15:45 ` [PATCH v3 0/9] pinctrl: mvebu: pinctrl driver Linus Walleij
2012-09-10 15:45 ` Linus Walleij
2012-09-10 15:57 ` Sebastian Hesselbarth
2012-09-10 15:57 ` Sebastian Hesselbarth
2012-09-11 14:20 ` pinctrl: mvebu: minor fixes Thomas Petazzoni
2012-09-11 14:20 ` [PATCH 1/2] pinctrl: mvebu: mark internal functions as static Thomas Petazzoni
2012-09-11 17:54 ` Linus Walleij
2012-09-11 14:20 ` [PATCH 2/2] pinctrl: mvebu: remove dead code Thomas Petazzoni
2012-09-11 17:55 ` Linus Walleij
2012-09-11 15:31 ` pinctrl: mvebu: minor fixes Sebastian Hesselbarth
2012-09-11 15:35 ` Thomas Petazzoni
2012-09-11 15:37 ` arm: mvebu: improve Kconfig options handling for pinctrl Thomas Petazzoni
2012-09-11 15:37 ` [PATCH 1/2] arm: mvebu: split Kconfig options for Armada 370 and XP Thomas Petazzoni
2012-09-11 17:35 ` Sebastian Hesselbarth
2012-09-11 15:37 ` [PATCH 2/2] arm: mvebu: select the pinctrl drivers for Armada 370 and Armada XP platforms Thomas Petazzoni
2012-09-11 17:40 ` Sebastian Hesselbarth
2012-09-12 10:48 ` Thomas Petazzoni
2012-09-11 16:17 ` arm: mvebu: improve Kconfig options handling for pinctrl Gregory CLEMENT
2012-09-11 17:32 ` Sebastian Hesselbarth
2012-09-12 10:47 ` Thomas Petazzoni
2012-09-13 15:41 ` [PATCH v4 00/10] pinctrl: mvebu: pinctrl driver Sebastian Hesselbarth
2012-09-13 15:41 ` Sebastian Hesselbarth
2012-09-13 15:41 ` [PATCH v4 01/10] pinctrl: mvebu: pinctrl driver core Sebastian Hesselbarth
2012-09-13 15:41 ` Sebastian Hesselbarth
2012-09-13 15:41 ` [PATCH v4 02/10] pinctrl: mvebu: dove pinctrl driver Sebastian Hesselbarth
2012-09-13 15:41 ` Sebastian Hesselbarth
2013-06-18 11:36 ` Russell King - ARM Linux
2013-06-18 11:36 ` Russell King - ARM Linux
2013-06-18 12:01 ` Sebastian Hesselbarth
2013-06-18 12:01 ` Sebastian Hesselbarth
2013-06-18 15:02 ` Linus Walleij
2013-06-18 15:02 ` Linus Walleij
2013-06-18 15:02 ` Linus Walleij
2013-06-18 15:11 ` Russell King - ARM Linux
2013-06-18 15:11 ` Russell King - ARM Linux
2013-06-18 15:23 ` Linus Walleij
2013-06-18 15:23 ` Linus Walleij
2013-06-18 18:33 ` Mark Brown
2013-06-18 18:33 ` Mark Brown
2013-06-18 18:33 ` Mark Brown
2012-09-13 15:41 ` [PATCH v4 03/10] pinctrl: mvebu: kirkwood " Sebastian Hesselbarth
2012-09-13 15:41 ` Sebastian Hesselbarth
2012-09-16 7:46 ` Andrew Lunn
2012-09-16 7:46 ` Andrew Lunn
2012-09-16 7:46 ` Andrew Lunn
2012-09-16 9:09 ` Sebastian Hesselbarth
2012-09-16 9:09 ` Sebastian Hesselbarth
2012-09-17 8:45 ` Linus Walleij
2012-09-17 8:45 ` Linus Walleij
2012-09-17 8:45 ` Linus Walleij
2012-09-20 15:30 ` Arnd Bergmann
2012-09-20 15:30 ` Arnd Bergmann
2012-09-20 18:34 ` Andrew Lunn
2012-09-20 18:34 ` Andrew Lunn
2012-09-20 19:28 ` Linus Walleij
2012-09-20 19:28 ` Linus Walleij
2012-09-20 19:36 ` Thomas Petazzoni
2012-09-20 19:36 ` Thomas Petazzoni
2012-09-20 19:51 ` Andrew Lunn
2012-09-20 19:51 ` Andrew Lunn
2012-09-21 10:56 ` Ben Dooks
2012-09-21 10:56 ` Ben Dooks
2012-09-21 18:14 ` Linus Walleij
2012-09-21 18:14 ` Linus Walleij
2012-09-16 12:40 ` Jason Cooper
2012-09-16 12:40 ` Jason Cooper
2012-09-16 12:40 ` Jason Cooper
2012-09-17 1:55 ` Nicolas Pitre
2012-09-17 1:55 ` Nicolas Pitre
2012-09-17 6:36 ` Sebastian Hesselbarth
2012-09-17 6:36 ` Sebastian Hesselbarth
2012-09-17 8:32 ` Andrew Lunn
2012-09-17 8:32 ` Andrew Lunn
2012-09-18 18:59 ` Andrew Lunn [this message]
2012-09-18 18:59 ` Andrew Lunn
2012-09-13 15:41 ` [PATCH v4 04/10] pinctrl: mvebu: add pinctrl driver for Armada 370 Sebastian Hesselbarth
2012-09-13 15:41 ` Sebastian Hesselbarth
2012-09-13 15:41 ` [PATCH v4 05/10] pinctrl: mvebu: add pinctrl driver for Armada XP Sebastian Hesselbarth
2012-09-13 15:41 ` Sebastian Hesselbarth
2012-09-13 15:41 ` [PATCH v4 06/10] ARM: mvebu: Add pinctrl support to Armada XP SoCs Sebastian Hesselbarth
2012-09-13 15:41 ` Sebastian Hesselbarth
2012-09-13 15:41 ` [PATCH v4 07/10] ARM: mvebu: Add pinctrl support to Armada 370 SoC Sebastian Hesselbarth
2012-09-13 15:41 ` Sebastian Hesselbarth
2012-09-13 15:41 ` [PATCH v4 08/10] ARM: mvebu: adjust Armada XP evaluation board DTS Sebastian Hesselbarth
2012-09-13 15:41 ` Sebastian Hesselbarth
2012-09-13 15:41 ` [PATCH v4 09/10] arm: mvebu: split Kconfig options for Armada 370 and XP Sebastian Hesselbarth
2012-09-13 15:41 ` Sebastian Hesselbarth
2012-09-13 15:41 ` [PATCH v4 10/10] arm: mvebu: select the pinctrl drivers for Armada 370 and Armada XP platforms Sebastian Hesselbarth
2012-09-13 15:41 ` Sebastian Hesselbarth
2012-09-13 15:48 ` [PATCH v4 00/10] pinctrl: mvebu: pinctrl driver Thomas Petazzoni
2012-09-13 15:48 ` Thomas Petazzoni
2012-09-14 16:41 ` Stephen Warren
2012-09-14 16:41 ` Stephen Warren
2012-09-20 8:13 ` [PATCH 00/11] " Linus Walleij
2012-09-20 8:13 ` Linus Walleij
2012-09-20 8:17 ` Sebastian Hesselbarth
2012-09-20 8:17 ` Sebastian Hesselbarth
2012-09-20 9:04 ` Thomas Petazzoni
2012-09-20 9:04 ` Thomas Petazzoni
2012-09-20 10:02 ` Andrew Lunn
2012-09-20 10:02 ` Andrew Lunn
2012-09-20 10:32 ` Thomas Petazzoni
2012-09-20 10:32 ` Thomas Petazzoni
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