From: Alberto Garcia <agarcia@igalia.com>
To: Avi Kivity <avi@redhat.com>
Cc: "Anthony Liguori" <aliguori@us.ibm.com>,
qemu-devel@nongnu.org, "Blue Swirl" <blauwirbel@gmail.com>,
"Paul Brook" <paul@codesourcery.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Andreas Färber" <afaerber@suse.de>
Subject: Re: [Qemu-devel] Ping [PATCH 0/2] Add TPCI200 and IP-Octal 232 IndustryPack emulation
Date: Wed, 10 Oct 2012 12:24:56 +0200 [thread overview]
Message-ID: <20121010102455.GA18381@igalia.com> (raw)
In-Reply-To: <507155E1.6090907@redhat.com>
On Sun, Oct 07, 2012 at 12:13:53PM +0200, Avi Kivity wrote:
> Luckily the low-order bits are used for offsets, and the high-order
> bits are used for selecting the sub-device.
>
> So you could easily have
>
> struct IPackDevice {
> DeviceState qdev;
> int32_t slot;
> /* IRQ objects for the IndustryPack INT0# and INT1# */
> qemu_irq *irq;
> MemoryRegion io_space;
> MemoryRegion id_space;
> MemoryRegion int_space;
> MemoryRegion mem8_space; /* for las3 */
> MemoryRegion mem16_space; /* for las2 */
> };
>
> The PCI device would then just map each space (with
> memory_region_add_subregion()) into las1/las2/las3 such that the
> high bits select the device/space. The low bits would automatically
> become the offset into the space.
Hey, I finally found some time to look into this, the problem that I
see is that the PCI carrier doesn't just map each space into its local
address spaces, in addition to that:
1) it changes the data and addresses according to the endianness
configuration in the local configuration registers (PCI BAR0).
See adjust_addr()/adjust_value() and page 20 of the user manual.
http://www.tews.com/Products/ArticleGroup/TPCI/TPCI200.html
2) read accesses to the local address space 1 are also used to
acknowledge interrupts (manual page 33 and tpci200_read_las1()).
On a related note, I was wondering whether it would be simpler to get
rid of tpci200_cfg_ops and replace the current implementation of the
local configuration registers with something like this:
memory_region_init_ram_ptr(&s->mmio, "tpci200_mmio", 128, s->local_cfg);
memory_region_init_alias(&s->io, "tpci200_io", &s->mmio, 0, 128);
pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio);
pci_register_bar(&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io);
(s->local_cfg would contain the config registers data)
But it doesn't seem to work.
Berto
next prev parent reply other threads:[~2012-10-10 10:29 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-23 13:59 [Qemu-devel] [PATCH 0/2] Add TPCI200 and IP-Octal 232 IndustryPack emulation Alberto Garcia
2012-08-23 13:59 ` [Qemu-devel] [PATCH 1/2] Add TEWS TPCI200 " Alberto Garcia
2012-08-23 13:59 ` [Qemu-devel] [PATCH 2/2] Add IP-Octal 232 " Alberto Garcia
2012-08-31 14:12 ` [Qemu-devel] Ping [PATCH 0/2] Add TPCI200 and " Alberto Garcia
2012-08-31 16:09 ` Andreas Färber
2012-09-10 13:10 ` Alberto Garcia
2012-10-05 13:20 ` Alberto Garcia
2012-10-05 14:28 ` Paolo Bonzini
2012-10-05 14:52 ` Anthony Liguori
2012-10-05 16:24 ` Blue Swirl
2012-10-06 11:29 ` Alberto Garcia
2012-10-07 10:13 ` Avi Kivity
2012-10-07 10:19 ` Avi Kivity
2012-10-08 8:02 ` Alberto Garcia
2012-10-10 10:24 ` Alberto Garcia [this message]
2012-10-10 11:35 ` Avi Kivity
2012-10-10 17:59 ` Alberto Garcia
2012-10-05 14:54 ` Andreas Färber
2012-12-05 13:16 ` [Qemu-devel] [PATCH v2 " Alberto Garcia
2012-12-05 13:16 ` [Qemu-devel] [PATCH v2 1/2] Add TEWS TPCI200 " Alberto Garcia
2012-12-05 13:16 ` [Qemu-devel] [PATCH v2 2/2] Add GE IP-Octal 232 " Alberto Garcia
2012-12-05 14:03 ` [Qemu-devel] [PATCH v2 0/2] Add TPCI200 and " Andreas Färber
2012-12-05 15:24 ` [Qemu-devel] [PATCH v3 " Alberto Garcia
2012-12-05 15:24 ` [Qemu-devel] [PATCH v3 1/2] Add TEWS TPCI200 " Alberto Garcia
2012-12-05 15:24 ` [Qemu-devel] [PATCH v3 2/2] Add GE IP-Octal 232 " Alberto Garcia
2012-12-17 15:27 ` [Qemu-devel] Ping [PATCH v3 0/2] Add TPCI200 and " Alberto Garcia
2013-01-07 20:32 ` Anthony Liguori
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