Re: [Qemu-devel] [PATCH v2] target-mips: Add comments on POOL32Axf encoding

[Aurelien Jarno <aurelien@aurel32.net>]

On Wed, Nov 21, 2012 at 01:50:45PM +0800, 陳韋任 (Wei-Ren Chen) wrote:
>   Current QEMU MIPS POOL32AXF encoding comes from microMIPS32
> and microMIPS32 DSP. Add comment here to help reading.
> 
> Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw>
> ---
> 
> v2: Correct commit message formatting
> 
>  target-mips/translate.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)

Thanks, applied.

> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index 8b438f8..e453d9e 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -10359,6 +10359,19 @@ enum {
>  
>  /* POOL32AXF encoding of minor opcode field extension */
>  
> +/*
> + * 1. MIPS Architecture for Programmers Volume II-B:
> + *      The microMIPS32 Instruction Set (Revision 3.05)
> + *
> + *    Table 6.5 POOL32Axf Encoding of Minor Opcode Extension Field
> + *
> + * 2. MIPS Architecture for Programmers VolumeIV-e:
> + *      The MIPS DSP Application-Specific Extension
> + *        to the microMIPS32 Architecture (Revision 2.34)
> + *
> + *    Table 5.5 POOL32Axf Encoding of Minor Opcode Extension Field
> + */ 
> +
>  enum {
>      /* bits 11..6 */
>      TEQ = 0x00,
> @@ -10371,6 +10384,8 @@ enum {
>      MFC0 = 0x03,
>      MTC0 = 0x0b,
>  
> +    /* begin of microMIPS32 DSP */
> +
>      /* bits 13..12 for 0x01 */
>      MFHI_ACC = 0x0,
>      MFLO_ACC = 0x1,
> @@ -10387,6 +10402,8 @@ enum {
>      MULT_ACC = 0x0,
>      MULTU_ACC = 0x1,
>  
> +    /* end of microMIPS32 DSP */
> +
>      /* bits 15..12 for 0x2c */
>      SEB = 0x2,
>      SEH = 0x3,
> -- 
> 1.7.12.3
> 

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net