From: Markus Trippelsdorf <markus@trippelsdorf.de>
To: dri-devel@lists.freedesktop.org
Subject: GPU lockup CP stall for more than 10000msec on latest vanilla git
Date: Mon, 17 Dec 2012 19:27:52 +0100 [thread overview]
Message-ID: <20121217182752.GA351@x4> (raw)
As soon as I open the following website:
http://www.boston.com/bigpicture/2012/12/2012_year_in_pictures_part_i.html
my Radeon RS780 stalls (GPU lockup) leaving the machine unusable:
Dec 17 17:41:39 x4 kernel: [drm] Initialized drm 1.1.0 20060810
Dec 17 17:41:39 x4 kernel: [drm] radeon defaulting to kernel modesetting.
Dec 17 17:41:39 x4 kernel: [drm] radeon kernel modesetting enabled.
Dec 17 17:41:39 x4 kernel: [drm] initializing kernel modesetting (RS780 0x1002:0x9614 0x1043:0x834D).
Dec 17 17:41:39 x4 kernel: [drm] register mmio base: 0xFBEE0000
Dec 17 17:41:39 x4 kernel: [drm] register mmio size: 65536
Dec 17 17:41:39 x4 kernel: ATOM BIOS: 113
Dec 17 17:41:39 x4 kernel: radeon 0000:01:05.0: VRAM: 128M 0x00000000C0000000 - 0x00000000C7FFFFFF (128M used)
Dec 17 17:41:39 x4 kernel: radeon 0000:01:05.0: GTT: 512M 0x00000000A0000000 - 0x00000000BFFFFFFF
Dec 17 17:41:39 x4 kernel: [drm] Detected VRAM RAM=128M, BAR=128M
Dec 17 17:41:39 x4 kernel: [drm] RAM width 32bits DDR
Dec 17 17:41:39 x4 kernel: [TTM] Zone kernel: Available graphics memory: 4083532 kiB
Dec 17 17:41:39 x4 kernel: [TTM] Zone dma32: Available graphics memory: 2097152 kiB
Dec 17 17:41:39 x4 kernel: [TTM] Initializing pool allocator
Dec 17 17:41:39 x4 kernel: [TTM] Initializing DMA pool allocator
Dec 17 17:41:39 x4 kernel: [drm] radeon: 128M of VRAM memory ready
Dec 17 17:41:39 x4 kernel: [drm] radeon: 512M of GTT memory ready.
Dec 17 17:41:39 x4 kernel: [drm] Supports vblank timestamp caching Rev 1 (10.10.2010).
Dec 17 17:41:39 x4 kernel: [drm] Driver supports precise vblank timestamp query.
Dec 17 17:41:39 x4 kernel: [drm] radeon: irq initialized.
Dec 17 17:41:39 x4 kernel: [drm] GART: num cpu pages 131072, num gpu pages 131072
Dec 17 17:41:39 x4 kernel: [drm] Loading RS780 Microcode
Dec 17 17:41:39 x4 kernel: [drm] PCIE GART of 512M enabled (table at 0x00000000C0040000).
Dec 17 17:41:39 x4 kernel: radeon 0000:01:05.0: WB enabled
Dec 17 17:41:39 x4 kernel: radeon 0000:01:05.0: fence driver on ring 0 use gpu addr 0x00000000a0000c00 and cpu addr 0xffff8802163acc00
Dec 17 17:41:39 x4 kernel: radeon 0000:01:05.0: fence driver on ring 3 use gpu addr 0x00000000a0000c0c and cpu addr 0xffff8802163acc0c
Dec 17 17:41:39 x4 kernel: radeon 0000:01:05.0: setting latency timer to 64
Dec 17 17:41:39 x4 kernel: [drm] ring test on 0 succeeded in 0 usecs
Dec 17 17:41:39 x4 kernel: [drm] ring test on 3 succeeded in 1 usecs
Dec 17 17:41:39 x4 kernel: [drm] ib test on ring 0 succeeded in 0 usecs
Dec 17 17:41:39 x4 kernel: [drm] ib test on ring 3 succeeded in 0 usecs
Dec 17 17:41:39 x4 kernel: [drm] Radeon Display Connectors
Dec 17 17:41:39 x4 kernel: [drm] Connector 0:
Dec 17 17:41:39 x4 kernel: [drm] VGA-1
Dec 17 17:41:39 x4 kernel: [drm] DDC: 0x7e40 0x7e40 0x7e44 0x7e44 0x7e48 0x7e48 0x7e4c 0x7e4c
Dec 17 17:41:39 x4 kernel: [drm] Encoders:
Dec 17 17:41:39 x4 kernel: [drm] CRT1: INTERNAL_KLDSCP_DAC1
Dec 17 17:41:39 x4 kernel: [drm] Connector 1:
Dec 17 17:41:39 x4 kernel: [drm] DVI-D-1
Dec 17 17:41:39 x4 kernel: [drm] HPD3
Dec 17 17:41:39 x4 kernel: [drm] DDC: 0x7e50 0x7e50 0x7e54 0x7e54 0x7e58 0x7e58 0x7e5c 0x7e5c
Dec 17 17:41:39 x4 kernel: [drm] Encoders:
Dec 17 17:41:39 x4 kernel: [drm] DFP3: INTERNAL_KLDSCP_LVTMA
Dec 17 17:41:39 x4 kernel: [drm] radeon: power management initialized
Dec 17 17:41:39 x4 kernel: [drm] fb mappable at 0xF0142000
Dec 17 17:41:39 x4 kernel: [drm] vram apper at 0xF0000000
Dec 17 17:41:39 x4 kernel: [drm] size 7299072
Dec 17 17:41:39 x4 kernel: [drm] fb depth is 24
Dec 17 17:41:39 x4 kernel: [drm] pitch is 6912
Dec 17 17:41:39 x4 kernel: fbcon: radeondrmfb (fb0) is primary device
Dec 17 17:41:39 x4 kernel: Console: switching to colour frame buffer device 131x105
Dec 17 17:41:39 x4 kernel: radeon 0000:01:05.0: fb0: radeondrmfb frame buffer device
Dec 17 17:41:39 x4 kernel: radeon 0000:01:05.0: registered panic notifier
Dec 17 17:41:39 x4 kernel: [drm] Initialized radeon 2.27.0 20080528 for 0000:01:05.0 on minor 0
...
Dec 17 19:12:33 x4 kernel: radeon 0000:01:05.0: GPU lockup CP stall for more than 10000msec
Dec 17 19:12:33 x4 kernel: radeon 0000:01:05.0: GPU lockup (waiting for 0x0000000000022777 last fence id 0x0000000000022774)
after reboot:
Dec 17 19:14:32 x4 kernel: Adding 4194300k swap on /var/cache/swapfile.img. Priority:-1 extents:9 across:629080060k
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: GPU lockup CP stall for more than 10000msec
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: GPU lockup (waiting for 0x0000000000000954 last fence id 0x0000000000000952)
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: Saved 89 dwords of commands on ring 0.
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: GPU softreset
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: R_008010_GRBM_STATUS=0xA000B030
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: R_008014_GRBM_STATUS2=0x00000003
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: R_000E50_SRBM_STATUS=0x20005040
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: R_008674_CP_STALLED_STAT1 = 0x00000000
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: R_008678_CP_STALLED_STAT2 = 0x00000002
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: R_00867C_CP_BUSY_STAT = 0x0000D084
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: R_008680_CP_STAT = 0x80098645
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: R_008020_GRBM_SOFT_RESET=0x00007FEE
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: R_008020_GRBM_SOFT_RESET=0x00000001
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: R_008010_GRBM_STATUS=0xA000B030
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: R_008014_GRBM_STATUS2=0x00000003
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: R_000E50_SRBM_STATUS=0x2000C040
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: R_008674_CP_STALLED_STAT1 = 0x00000000
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: R_008678_CP_STALLED_STAT2 = 0x00000000
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: R_00867C_CP_BUSY_STAT = 0x00000000
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: R_008680_CP_STAT = 0x80100000
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: GPU reset succeeded, trying to resume
Dec 17 19:16:44 x4 kernel: [drm] PCIE GART of 512M enabled (table at 0x00000000C0040000).
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: WB enabled
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: fence driver on ring 0 use gpu addr 0x00000000a0000c00 and cpu addr 0xffff8802163acc00
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: fence driver on ring 3 use gpu addr 0x00000000a0000c0c and cpu addr 0xffff8802163acc0c
Dec 17 19:16:44 x4 kernel: radeon 0000:01:05.0: setting latency timer to 64
Dec 17 19:16:44 x4 kernel: [drm] ring test on 0 succeeded in 1 usecs
Dec 17 19:16:44 x4 kernel: [drm:r600_dma_ring_test] *ERROR* radeon: ring 3 test failed (0xCAFEDEAD)
Dec 17 19:16:44 x4 kernel: [drm:r600_resume] *ERROR* r600 startup failed on resume
Dec 17 19:17:03 x4 kernel: SysRq : Emergency Sync
--
Markus
next reply other threads:[~2012-12-17 18:34 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-12-17 18:27 Markus Trippelsdorf [this message]
2012-12-17 21:32 ` GPU lockup CP stall for more than 10000msec on latest vanilla git Alex Deucher
2012-12-17 21:48 ` Markus Trippelsdorf
2012-12-17 21:58 ` Markus Trippelsdorf
2012-12-17 22:00 ` Alex Deucher
2012-12-17 22:25 ` Markus Trippelsdorf
2012-12-17 22:55 ` Markus Trippelsdorf
2012-12-18 11:20 ` Michel Dänzer
2012-12-18 13:38 ` Markus Trippelsdorf
2012-12-18 13:51 ` Markus Trippelsdorf
2012-12-18 15:24 ` Maarten Lankhorst
2012-12-18 16:12 ` Markus Trippelsdorf
2012-12-18 18:10 ` Maarten Lankhorst
2012-12-19 13:57 ` Maarten Lankhorst
2012-12-19 14:20 ` Markus Trippelsdorf
2012-12-19 14:31 ` Maarten Lankhorst
2012-12-23 1:46 ` Alex Deucher
2012-12-23 8:43 ` Markus Trippelsdorf
2012-12-23 10:09 ` Andy Furniss
2012-12-23 10:21 ` Markus Trippelsdorf
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