From: Markus Trippelsdorf <markus@trippelsdorf.de>
To: Andy Furniss <andyqos@ukfsn.org>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: GPU lockup CP stall for more than 10000msec on latest vanilla git
Date: Sun, 23 Dec 2012 11:21:27 +0100 [thread overview]
Message-ID: <20121223102127.GA232@x4> (raw)
In-Reply-To: <50D6D855.1020609@ukfsn.org>
On 2012.12.23 at 10:09 +0000, Andy Furniss wrote:
> Markus Trippelsdorf wrote:
>
> >> Does booting with radeon.wb=0 fix the issue? Please make sure your
> >> kernel has this patch:
> >> http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=commitdiff;h=86a1881d08f65a42c17071a59c0088dbe2870246
> >
> > My kernel has this patch and radeon.wb=0 doesn't help.
>
> I think that should be no_wb=1
Yes, you're right. But even with radeon.no_wb=1 it still hangs:
...
Dec 23 11:15:02 x4 kernel: radeon 0000:01:05.0: WB disabled
Dec 23 11:15:02 x4 kernel: radeon 0000:01:05.0: fence driver on ring 0 use gpu addr 0x00000000a0000004 and cpu addr 0xffff8802163ad004
Dec 23 11:15:02 x4 kernel: radeon 0000:01:05.0: fence driver on ring 3 use gpu addr 0x00000000a0000c0c and cpu addr 0xffff8802163adc0c
Dec 23 11:15:02 x4 kernel: radeon 0000:01:05.0: setting latency timer to 64
...
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: GPU lockup CP stall for more than 10000msec
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: GPU lockup (waiting for 0x000000000000089c last fence id 0x000000000000089b)
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: Saved 217 dwords of commands on ring 0.
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: GPU softreset
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: R_008010_GRBM_STATUS=0xA000B030
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: R_008014_GRBM_STATUS2=0x00000003
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: R_000E50_SRBM_STATUS=0x20005040
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: R_008674_CP_STALLED_STAT1 = 0x00000000
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: R_008678_CP_STALLED_STAT2 = 0x00000002
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: R_00867C_CP_BUSY_STAT = 0x0000D086
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: R_008680_CP_STAT = 0x80098645
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: R_008020_GRBM_SOFT_RESET=0x00007FEE
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: R_008020_GRBM_SOFT_RESET=0x00000001
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: R_008010_GRBM_STATUS=0xA000B030
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: R_008014_GRBM_STATUS2=0x00000003
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: R_000E50_SRBM_STATUS=0x2000C040
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: R_008674_CP_STALLED_STAT1 = 0x00000000
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: R_008678_CP_STALLED_STAT2 = 0x00000000
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: R_00867C_CP_BUSY_STAT = 0x00000000
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: R_008680_CP_STAT = 0x80100000
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: GPU reset succeeded, trying to resume
Dec 23 11:16:04 x4 kernel: [drm] PCIE GART of 512M enabled (table at 0x00000000C0040000).
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: WB disabled
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: fence driver on ring 0 use gpu addr 0x00000000a0000004 and cpu addr 0xffff8802163ad004
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: fence driver on ring 3 use gpu addr 0x00000000a0000c0c and cpu addr 0xffff8802163adc0c
Dec 23 11:16:04 x4 kernel: radeon 0000:01:05.0: setting latency timer to 64
Dec 23 11:16:04 x4 kernel: [drm] ring test on 0 succeeded in 1 usecs
Dec 23 11:16:05 x4 kernel: [drm:r600_dma_ring_test] *ERROR* radeon: ring 3 test failed (0xCAFEDEAD)
Dec 23 11:16:05 x4 kernel: [drm:r600_resume] *ERROR* r600 startup failed on resume
Dec 23 11:16:09 x4 kernel: SysRq : Emergency Sync
Dec 23 11:16:09 x4 kernel: Emergency Sync complete
Dec 23 11:16:15 x4 kernel: SysRq : Emergency Remount R/O
Dec 23 11:16:15 x4 kernel: EXT4-fs (sdb2): re-mounted. Opts: (null)
--
Markus
prev parent reply other threads:[~2012-12-23 10:21 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-12-17 18:27 GPU lockup CP stall for more than 10000msec on latest vanilla git Markus Trippelsdorf
2012-12-17 21:32 ` Alex Deucher
2012-12-17 21:48 ` Markus Trippelsdorf
2012-12-17 21:58 ` Markus Trippelsdorf
2012-12-17 22:00 ` Alex Deucher
2012-12-17 22:25 ` Markus Trippelsdorf
2012-12-17 22:55 ` Markus Trippelsdorf
2012-12-18 11:20 ` Michel Dänzer
2012-12-18 13:38 ` Markus Trippelsdorf
2012-12-18 13:51 ` Markus Trippelsdorf
2012-12-18 15:24 ` Maarten Lankhorst
2012-12-18 16:12 ` Markus Trippelsdorf
2012-12-18 18:10 ` Maarten Lankhorst
2012-12-19 13:57 ` Maarten Lankhorst
2012-12-19 14:20 ` Markus Trippelsdorf
2012-12-19 14:31 ` Maarten Lankhorst
2012-12-23 1:46 ` Alex Deucher
2012-12-23 8:43 ` Markus Trippelsdorf
2012-12-23 10:09 ` Andy Furniss
2012-12-23 10:21 ` Markus Trippelsdorf [this message]
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