From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: cache: flush to LoUU instead of LoUIS on uniprocessor CPUs
Date: Tue, 18 Dec 2012 10:07:39 +0000 [thread overview]
Message-ID: <20121218100738.GA9072@mudshark.cambridge.arm.com> (raw)
In-Reply-To: <alpine.LFD.2.02.1212171517320.1263@xanadu.home>
On Mon, Dec 17, 2012 at 08:19:51PM +0000, Nicolas Pitre wrote:
> On Mon, 17 Dec 2012, Will Deacon wrote:
>
> > flush_cache_louis flushes the D-side caches to the point of unification
> > inner-shareable. On uniprocessor CPUs, this is defined as zero and
> > therefore no flushing will take place. Rather than invent a new interface
> > for UP systems, instead use our SMP_ON_UP patching code to read the
> > LoUU from the CLIDR instead.
> >
> > Cc: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
> > Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> > Signed-off-by: Will Deacon <will.deacon@arm.com>
>
> This should be a candidate for the stable tree.
Yup, the same also goes for the other fix I posted yesterday (RealView EB).
Cheers,
Will
next prev parent reply other threads:[~2012-12-18 10:07 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-12-17 16:10 [PATCH] ARM: cache: flush to LoUU instead of LoUIS on uniprocessor CPUs Will Deacon
2012-12-17 20:19 ` Nicolas Pitre
2012-12-18 10:07 ` Will Deacon [this message]
2012-12-20 7:06 ` Santosh Shilimkar
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