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From: Felipe Balbi <balbi-l0cyMroinI0@public.gmane.org>
To: Alan Stern <stern-nwvwT67g6+6dFdvTe/nMLpVzexx5G7lz@public.gmane.org>
Cc: Felipe Balbi <balbi-l0cyMroinI0@public.gmane.org>,
	Venu Byravarasu
	<vbyravarasu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	"gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org"
	<gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>,
	"linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org"
	<swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>,
	"linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH v2 4/4] usb: Add APIs to access host registers from Tegra PHY
Date: Thu, 17 Jan 2013 17:32:29 +0200	[thread overview]
Message-ID: <20130117153229.GA21904@arwen.pp.htv.fi> (raw)
In-Reply-To: <Pine.LNX.4.44L0.1301171016550.1339-100000-IYeN2dnnYyZXsRXLowluHWD2FQJk+8+b@public.gmane.org>

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On Thu, Jan 17, 2013 at 10:21:53AM -0500, Alan Stern wrote:
> On Thu, 17 Jan 2013, Felipe Balbi wrote:
> 
> > > Bits 31 & 30 from PORTSC register were allocated by our SOC designers
> > > to inform the host controller about the PHY type to be used. 
> > 
> > Wow, that's something you should never do. PORTSC register belongs to
> > the EHCI controller and those bits are reserved for future use and they
> > *MUST* return zero. I wouldn't be surprised if current EHCI driver
> > assumes those bits will be zero and/or makes sure they're set to zero
> > when writing to PORTSC register.
> 
> In fact, those bits _have_ been assigned an official purpose in the 
> EHCI-1.1 addendum.  Presumably the Tegra hardware only supports 
> EHCI-1.0.

I see, they're used for device addresses now.

How can we make sure on Tegra systems we won't use those top two bits ?

-- 
balbi

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WARNING: multiple messages have this Message-ID (diff)
From: Felipe Balbi <balbi@ti.com>
To: Alan Stern <stern@rowland.harvard.edu>
Cc: Felipe Balbi <balbi@ti.com>,
	Venu Byravarasu <vbyravarasu@nvidia.com>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	"linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"swarren@wwwdotorg.org" <swarren@wwwdotorg.org>,
	"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>
Subject: Re: [PATCH v2 4/4] usb: Add APIs to access host registers from Tegra PHY
Date: Thu, 17 Jan 2013 17:32:29 +0200	[thread overview]
Message-ID: <20130117153229.GA21904@arwen.pp.htv.fi> (raw)
In-Reply-To: <Pine.LNX.4.44L0.1301171016550.1339-100000@iolanthe.rowland.org>

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On Thu, Jan 17, 2013 at 10:21:53AM -0500, Alan Stern wrote:
> On Thu, 17 Jan 2013, Felipe Balbi wrote:
> 
> > > Bits 31 & 30 from PORTSC register were allocated by our SOC designers
> > > to inform the host controller about the PHY type to be used. 
> > 
> > Wow, that's something you should never do. PORTSC register belongs to
> > the EHCI controller and those bits are reserved for future use and they
> > *MUST* return zero. I wouldn't be surprised if current EHCI driver
> > assumes those bits will be zero and/or makes sure they're set to zero
> > when writing to PORTSC register.
> 
> In fact, those bits _have_ been assigned an official purpose in the 
> EHCI-1.1 addendum.  Presumably the Tegra hardware only supports 
> EHCI-1.0.

I see, they're used for device addresses now.

How can we make sure on Tegra systems we won't use those top two bits ?

-- 
balbi

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  parent reply	other threads:[~2013-01-17 15:32 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-01-17  8:28 [PATCH v2 4/4] usb: Add APIs to access host registers from Tegra PHY Venu Byravarasu
2013-01-17  8:28 ` Venu Byravarasu
     [not found] ` <1358411292-12288-1-git-send-email-vbyravarasu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-01-17  9:02   ` Felipe Balbi
2013-01-17  9:02     ` Felipe Balbi
     [not found]     ` <20130117090255.GD10814-S8G//mZuvNWo5Im9Ml3/Zg@public.gmane.org>
2013-01-17 12:37       ` Venu Byravarasu
2013-01-17 12:37         ` Venu Byravarasu
     [not found]         ` <D958900912E20642BCBC71664EFECE3E6E1A6F0F97-QZ+emBqkIFBDw2glCA4ptUEOCMrvLtNR@public.gmane.org>
2013-01-17 13:50           ` Felipe Balbi
2013-01-17 13:50             ` Felipe Balbi
     [not found]             ` <20130117135043.GU18978-S8G//mZuvNWo5Im9Ml3/Zg@public.gmane.org>
2013-01-17 15:21               ` Alan Stern
2013-01-17 15:21                 ` Alan Stern
     [not found]                 ` <Pine.LNX.4.44L0.1301171016550.1339-100000-IYeN2dnnYyZXsRXLowluHWD2FQJk+8+b@public.gmane.org>
2013-01-17 15:32                   ` Felipe Balbi [this message]
2013-01-17 15:32                     ` Felipe Balbi
     [not found]                     ` <20130117153229.GA21904-S8G//mZuvNWo5Im9Ml3/Zg@public.gmane.org>
2013-01-17 16:03                       ` Alan Stern
2013-01-17 16:03                         ` Alan Stern
     [not found]                         ` <Pine.LNX.4.44L0.1301171054220.1339-100000-IYeN2dnnYyZXsRXLowluHWD2FQJk+8+b@public.gmane.org>
2013-01-18  5:39                           ` Venu Byravarasu
2013-01-18  5:39                             ` Venu Byravarasu
2013-01-17 22:18     ` Stephen Warren
2013-01-17 15:15 ` Alan Stern
2013-01-17 15:15   ` Alan Stern
     [not found]   ` <Pine.LNX.4.44L0.1301171012500.1339-100000-IYeN2dnnYyZXsRXLowluHWD2FQJk+8+b@public.gmane.org>
2013-01-18  4:56     ` Venu Byravarasu
2013-01-18  4:56       ` Venu Byravarasu
2013-01-18  5:42   ` Venu Byravarasu
2013-01-18  5:42     ` Venu Byravarasu

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