All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH v2 1/9] ARM: clps711x: Rework lowlevel initialization code
@ 2013-02-13 11:41 Alexander Shiyan
  2013-02-13 11:41 ` [PATCH v2 2/9] ARM: clps711x: Move basic lowlevel initialization in common CLPS711X location Alexander Shiyan
                   ` (7 more replies)
  0 siblings, 8 replies; 17+ messages in thread
From: Alexander Shiyan @ 2013-02-13 11:41 UTC (permalink / raw)
  To: barebox

This is a rework of CLPS711X low level initialization code which includes:
- Prepare for changing CPU PLL multiplier from board lowlevel code.
- Decrease initial memory size to 8MB. It is minimal known size.
- Fix SDRAM initialization comment about size.
- Turn off all peripherals on startup.
- Skip PLL initialization if CPU is running from external 13 MHz clock.
- Use correct CPU speed for older CPUs without PLL.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 arch/arm/boards/clep7212/lowlevel.c |   53 +++++++++++++++++++++--------------
 1 files changed, 32 insertions(+), 21 deletions(-)

diff --git a/arch/arm/boards/clep7212/lowlevel.c b/arch/arm/boards/clep7212/lowlevel.c
index b4d1bf1..fcee5bf 100644
--- a/arch/arm/boards/clep7212/lowlevel.c
+++ b/arch/arm/boards/clep7212/lowlevel.c
@@ -17,41 +17,52 @@
 
 #include <mach/clps711x.h>
 
-#define MAIN_CLOCK		3686400
-#define CPU_SPEED		92160000
-#define BUS_SPEED		(CPU_SPEED / 2)
-
-#define PLL_VALUE		(((CPU_SPEED * 2) / MAIN_CLOCK) << 24)
-#define SDRAM_REFRESH_RATE	(64 * (BUS_SPEED / (8192 * 1000)))
-
 void __naked __bare_init barebox_arm_reset_vector(void)
 {
-	u32 tmp;
+	const u32 pllmult = 50;
+	u32 cpu, bus;
 
 	arm_cpu_lowlevel_init();
 
-	/* Setup base clock */
+	/* Setup base clocking, Enable SDQM pins  */
 	writel(SYSCON3_CLKCTL0 | SYSCON3_CLKCTL1, SYSCON3);
 	asm("nop");
 
-	/* Setup PLL */
-	writel(PLL_VALUE, PLLW);
-	asm("nop");
+	/* Check if we running from external 13 MHz clock */
+	if (!(readl(SYSFLG2) & SYSFLG2_CKMODE)) {
+		/* Setup PLL */
+		writel(pllmult << 24, PLLW);
+		asm("nop");
+
+		/* Check for old CPUs without PLL */
+		if ((readl(PLLR) >> 24) != pllmult)
+			cpu = 73728000;
+		else
+			cpu = pllmult * 3686400;
+
+		if (cpu >= 36864000)
+			bus = cpu /2;
+		else
+			bus = 36864000 / 2;
+	} else
+		bus = 13000000;
 
 	/* CLKEN select, SDRAM width=32 */
 	writel(SYSCON2_CLKENSL, SYSCON2);
 
-	/* Enable SDQM pins */
-	tmp = readl(SYSCON3);
-	tmp &= ~SYSCON3_ENPD67;
-	writel(tmp, SYSCON3);
+	/* Setup SDRAM params (64MB, 16Bit*2, CAS=3) */
+	writel(SDCONF_CASLAT_3 | SDCONF_SIZE_256 | SDCONF_WIDTH_16 |
+	       SDCONF_CLKCTL | SDCONF_ACTIVE, SDCONF);
 
 	/* Setup Refresh Rate (64ms 8K Blocks) */
-	writel(SDRAM_REFRESH_RATE, SDRFPR);
+	writel((64 * bus) / (8192 * 1000), SDRFPR);
 
-	/* Setup SDRAM (32MB, 16Bit*2, CAS=3) */
-	writel(SDCONF_CASLAT_3 | SDCONF_SIZE_256 | SDCONF_WIDTH_16 |
-	       SDCONF_CLKCTL | SDCONF_ACTIVE, SDCONF);
+	/* Disable UART, IrDa, LCD */
+	writel(0, SYSCON1);
+	/* Disable PWM */
+	writew(0, PMPCON);
+	/* Disable LED flasher */
+	writew(0, LEDFLSH);
 
-	barebox_arm_entry(SDRAM0_BASE, SZ_32M, 0);
+	barebox_arm_entry(SDRAM0_BASE, SZ_8M, 0);
 }
-- 
1.7.3.4


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

^ permalink raw reply related	[flat|nested] 17+ messages in thread
end of thread, other threads:[~2013-02-13 18:06 UTC | newest]

Thread overview: 17+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-02-13 11:41 [PATCH v2 1/9] ARM: clps711x: Rework lowlevel initialization code Alexander Shiyan
2013-02-13 11:41 ` [PATCH v2 2/9] ARM: clps711x: Move basic lowlevel initialization in common CLPS711X location Alexander Shiyan
2013-02-13 11:41 ` [PATCH v2 3/9] ARM: clps711x: Adds config option for CPU PLL multiplier Alexander Shiyan
2013-02-13 12:02   ` Jean-Christophe PLAGNIOL-VILLARD
2013-02-13 12:23     ` Re[2]: " Alexander Shiyan
2013-02-13 13:36       ` [SPAM] " Jean-Christophe PLAGNIOL-VILLARD
2013-02-13 17:06   ` Sascha Hauer
2013-02-13 17:20     ` Re[2]: " Alexander Shiyan
2013-02-13 17:40       ` Sascha Hauer
2013-02-13 18:01         ` Jean-Christophe PLAGNIOL-VILLARD
2013-02-13 18:06         ` Re[2]: " Alexander Shiyan
2013-02-13 11:41 ` [PATCH v2 4/9] ARM: clps711x: Remove unused "start" declaration from reset.c Alexander Shiyan
2013-02-13 11:41 ` [PATCH v2 5/9] ARM: clps711x: Mark private functions that not will be used outside as static Alexander Shiyan
2013-02-13 11:41 ` [PATCH v2 6/9] ARM: clep7212: Fix NULL pointer exception if MMU is enabled Alexander Shiyan
2013-02-13 11:41 ` [PATCH v2 7/9] ARM: clps711x: Move memory initialization in common CLPS711X location Alexander Shiyan
2013-02-13 11:41 ` [PATCH v2 8/9] ARM: clep7212: Update default environment Alexander Shiyan
2013-02-13 11:41 ` [PATCH v2 9/9] ARM: clps711x: Update defconfig Alexander Shiyan

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.