[PATCH v3 0/9] ARM: PRIMA2: bringup new CSR SiRFmarco SMP SoC

[PATCH v3 0/9] ARM: PRIMA2: bringup new CSR SiRFmarco SMP SoC

[Barry Song]

change list:
-v3:
handle feedbacks from Mark Rutland, thanks, Mark!
1. cleanup marco.dtsi and marco-evb.dts according to Mark Rutland's feedback
  - "sirf,marco-cb" come before "sirf,marco"; both compatible strings were
    documented
  - change lcd0 at N to lcd0_N -- ePAPR says the unit-address should match the
    reg property, and if there's no reg property the unit-address must be
    omitted.
  - and so on
2. used designated initializers and delete magic number in l2x0.c
3. Runaway commit message for "enable AUTO_ZRELADDR for SIRF in Kconfig"
4. use arm_dt_init_cpu_maps to get cpu mapping instead of reading scu
5. delete some repeated codes for timer0 and timer1 of marco

-v2:
1. cleanup marco.dtsi according to Mark Rutland's feedback
2. use of_device_id::data to handle the difference of l2x0 aux setting
   according to Mark Rutland's feedback
3. rebase to the newest timer/cleanup branch, removing sys_timer

-v1:
1. Marco has different OS timer hardware with Prima2, so add a new timer-marco
2. add platsmp.c, headsmp.S and hotplug.c for MPcore support
3. some hardwares have changed, like rstc, so use of_compatible to branch Prima2
   and Marco
4. add initial .dtsi for Marco SoC and initial .dts for the EVB
5. use GIC for Marco instead of Prima2's IRQ controller
6. add DEBUG_LL uart ports for Prima2 and Marco debug ports

Barry Song (9):
  ARM: PRIMA2: add CSR SiRFmarco device tree .dts
  ARM: PRIMA2: enable AUTO_ZRELADDR for SIRF in Kconfig
  ARM: PRIMA2: initialize l2x0 according to mach from DT
  ARM: PRIMA2: mv timer to timer-prima2 as we will add timer-marco
  ARM: PRIMA2: rstc: enable the support for Marco
  ARM: PRIMA2: rtciobg: it is also compatible with marco
  ARM: PRIMA2: irq: make prima2 irq can work even we enable GIC for
    Marco
  ARM: PRIMA2: add new SiRFmarco SMP SoC infrastructures
  ARM: PRIMA2: provide two DEBUG_LL ports for prima2 and marco

 Documentation/devicetree/bindings/arm/sirf.txt   |   10 +-
 arch/arm/Kconfig                                 |    1 +
 arch/arm/Kconfig.debug                           |   14 +
 arch/arm/boot/dts/Makefile                       |    1 +
 arch/arm/boot/dts/marco-evb.dts                  |   54 ++
 arch/arm/boot/dts/marco.dtsi                     |  756 ++++++++++++++++++++++
 arch/arm/configs/prima2_defconfig                |    3 +
 arch/arm/mach-prima2/Kconfig                     |   10 +
 arch/arm/mach-prima2/Makefile                    |    5 +-
 arch/arm/mach-prima2/common.c                    |   45 ++-
 arch/arm/mach-prima2/common.h                    |   15 +-
 arch/arm/mach-prima2/headsmp.S                   |   79 +++
 arch/arm/mach-prima2/hotplug.c                   |   41 ++
 arch/arm/mach-prima2/include/mach/irqs.h         |    4 +-
 arch/arm/mach-prima2/include/mach/uart.h         |    6 +
 arch/arm/mach-prima2/include/mach/uncompress.h   |    3 +
 arch/arm/mach-prima2/irq.c                       |   16 +-
 arch/arm/mach-prima2/l2x0.c                      |   29 +-
 arch/arm/mach-prima2/platsmp.c                   |  163 +++++
 arch/arm/mach-prima2/rstc.c                      |   45 +-
 arch/arm/mach-prima2/rtciobrg.c                  |    1 +
 arch/arm/mach-prima2/timer-marco.c               |  316 +++++++++
 arch/arm/mach-prima2/{timer.c => timer-prima2.c} |    6 +-
 23 files changed, 1588 insertions(+), 35 deletions(-)
 create mode 100644 arch/arm/boot/dts/marco-evb.dts
 create mode 100644 arch/arm/boot/dts/marco.dtsi
 create mode 100644 arch/arm/mach-prima2/headsmp.S
 create mode 100644 arch/arm/mach-prima2/hotplug.c
 create mode 100644 arch/arm/mach-prima2/platsmp.c
 create mode 100644 arch/arm/mach-prima2/timer-marco.c
 rename arch/arm/mach-prima2/{timer.c => timer-prima2.c} (98%)

-- 
1.7.5.4



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[PATCH v3 0/9] ARM: PRIMA2: bringup new CSR SiRFmarco SMP SoC

[Arnd Bergmann]

On Tuesday 22 January 2013, Barry Song wrote:
>   ARM: PRIMA2: add new SiRFmarco SMP SoC infrastructures

There was a conflict between this patch and another one from
Dinh Nguyen. This is just to let you know that I have added this
resolution to the next/soc branch.

	Arnd

8<------
>From 9cb0d1babfcb1b4ac248c09425f7d5de1e771133 Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Wed, 20 Feb 2013 18:21:58 +0100
Subject: [PATCH] ARM: prima2: remove duplicate v7_invalidate_l1

Patch c08e20d "arm: Add v7_invalidate_l1 to cache-v7.S" added
a generic version of this function and removed all platform
specific versions, while 4898de3 "ARM: PRIMA2: add new SiRFmarco
SMP SoC infrastructures" added another one, leading to a link
error. I verified that the two are identical, so we can
just remove the one in mach-prima2.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --git a/arch/arm/mach-prima2/headsmp.S b/arch/arm/mach-prima2/headsmp.S
index ada82d0..5b8a408d 100644
--- a/arch/arm/mach-prima2/headsmp.S
+++ b/arch/arm/mach-prima2/headsmp.S
@@ -12,46 +12,6 @@
 	__CPUINIT
 
 /*
- * Cold boot and hardware reset show different behaviour,
- * system will be always panic if we warm-reset the board
- * Here we invalidate L1 of CPU1 to make sure there isn't
- * uninitialized data written into memory later
- */
-ENTRY(v7_invalidate_l1)
-	mov	r0, #0
-	mcr	p15, 0, r0, c7, c5, 0	@ invalidate I cache
-	mcr	p15, 2, r0, c0, c0, 0
-	mrc	p15, 1, r0, c0, c0, 0
-
-	ldr	r1, =0x7fff
-	and	r2, r1, r0, lsr #13
-
-	ldr	r1, =0x3ff
-
-	and	r3, r1, r0, lsr #3	@ NumWays - 1
-	add	r2, r2, #1		@ NumSets
-
-	and	r0, r0, #0x7
-	add	r0, r0, #4	@ SetShift
-
-	clz	r1, r3		@ WayShift
-	add	r4, r3, #1	@ NumWays
-1:	sub	r2, r2, #1	@ NumSets--
-	mov	r3, r4		@ Temp = NumWays
-2:	subs	r3, r3, #1	@ Temp--
-	mov	r5, r3, lsl r1
-	mov	r6, r2, lsl r0
-	orr	r5, r5, r6	@ Reg = (Temp<<WayShift)|(NumSets<<SetShift)
-	mcr	p15, 0, r5, c7, c6, 2
-	bgt	2b
-	cmp	r2, #0
-	bgt	1b
-	dsb
-	isb
-	mov	pc, lr
-ENDPROC(v7_invalidate_l1)
-
-/*
  * SIRFSOC specific entry point for secondary CPUs.  This provides
  * a "holding pen" into which all secondary cores are held until we're
  * ready for them to initialise.