Re: [Qemu-devel] [PATCH v2 24/27] tcg-ppc64: Implement movcond

[Aurelien Jarno <aurelien@aurel32.net>]

On Mon, Mar 04, 2013 at 04:33:07PM -0800, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  tcg/ppc64/tcg-target.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++++++
>  tcg/ppc64/tcg-target.h |  4 ++--
>  2 files changed, 61 insertions(+), 2 deletions(-)
> 
> diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
> index bc29738..2acccf6 100644
> --- a/tcg/ppc64/tcg-target.c
> +++ b/tcg/ppc64/tcg-target.c
> @@ -1347,6 +1347,54 @@ static void tcg_out_brcond(TCGContext *s, TCGCond cond,
>      tcg_out_bc(s, tcg_to_bc[cond], label_index);
>  }
>  
> +static void tcg_out_movcond(TCGContext *s, TCGType type, TCGCond cond,
> +                            TCGArg dest, TCGArg c1, TCGArg c2, TCGArg v1,
> +                            TCGArg v2, bool const_c2)
> +{
> +    /* If for some reason both inputs are zero, don't produce bad code.  */
> +    if (v1 == 0 && v2 == 0) {
> +        tcg_out_movi(s, type, dest, 0);
> +        return;
> +    }
> +
> +    tcg_out_cmp(s, cond, c1, c2, const_c2, 7, type);
> +
> +    if (HAVE_ISEL) {
> +        int isel = tcg_to_isel[cond];
> +
> +        /* Swap the V operands if the operation indicates inversion.  */
> +        if (isel & 1) {
> +            int t = v1;
> +            v1 = v2;
> +            v2 = t;
> +            isel &= ~1;
> +        }
> +        /* V1 == 0 is handled by isel; V2 == 0 must be handled by hand.  */
> +        if (v2 == 0) {
> +            tcg_out_movi(s, type, 0, 0);
> +        }
> +        tcg_out32(s, isel | TAB(dest, v1, v2));
> +    } else {
> +        if (dest == v2) {
> +            cond = tcg_invert_cond(cond);
> +            v2 = v1;
> +        } else if (dest != v1) {
> +            if (v1 == 0) {
> +                tcg_out_movi(s, type, dest, 0);
> +            } else {
> +                tcg_out_mov(s, type, dest, v1);
> +            }
> +        }
> +        /* Branch forward over one insn */
> +        tcg_out32(s, tcg_to_bc[cond] | 8);
> +        if (v2 == 0) {
> +            tcg_out_movi(s, type, dest, 0);
> +        } else {
> +            tcg_out_mov(s, type, dest, v2);
> +        }
> +    }
> +}
> +
>  void ppc_tb_set_jmp_target (unsigned long jmp_addr, unsigned long addr)
>  {
>      TCGContext s;
> @@ -1895,6 +1943,15 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc, const TCGArg *args,
>                      64 - args[3] - args[4]);
>          break;
>  
> +    case INDEX_op_movcond_i32:
> +        tcg_out_movcond(s, TCG_TYPE_I32, args[5], args[0], args[1], args[2],
> +                        args[3], args[4], const_args[2]);
> +        break;
> +    case INDEX_op_movcond_i64:
> +        tcg_out_movcond(s, TCG_TYPE_I64, args[5], args[0], args[1], args[2],
> +                        args[3], args[4], const_args[2]);
> +        break;
> +
>      default:
>          tcg_dump_ops (s);
>          tcg_abort ();
> @@ -2010,6 +2067,8 @@ static const TCGTargetOpDef ppc_op_defs[] = {
>  
>      { INDEX_op_setcond_i32, { "r", "r", "ri" } },
>      { INDEX_op_setcond_i64, { "r", "r", "ri" } },
> +    { INDEX_op_movcond_i32, { "r", "r", "ri", "rZ", "rZ" } },
> +    { INDEX_op_movcond_i64, { "r", "r", "ri", "rZ", "rZ" } },
>  
>      { INDEX_op_bswap16_i32, { "r", "r" } },
>      { INDEX_op_bswap16_i64, { "r", "r" } },
> diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h
> index fed6740..c3a02bb 100644
> --- a/tcg/ppc64/tcg-target.h
> +++ b/tcg/ppc64/tcg-target.h
> @@ -88,7 +88,7 @@ typedef enum {
>  #define TCG_TARGET_HAS_nand_i32         1
>  #define TCG_TARGET_HAS_nor_i32          1
>  #define TCG_TARGET_HAS_deposit_i32      1
> -#define TCG_TARGET_HAS_movcond_i32      0
> +#define TCG_TARGET_HAS_movcond_i32      1
>  #define TCG_TARGET_HAS_add2_i32         0
>  #define TCG_TARGET_HAS_sub2_i32         0
>  #define TCG_TARGET_HAS_mulu2_i32        0
> @@ -111,7 +111,7 @@ typedef enum {
>  #define TCG_TARGET_HAS_nand_i64         1
>  #define TCG_TARGET_HAS_nor_i64          1
>  #define TCG_TARGET_HAS_deposit_i64      1
> -#define TCG_TARGET_HAS_movcond_i64      0
> +#define TCG_TARGET_HAS_movcond_i64      1
>  #define TCG_TARGET_HAS_add2_i64         0
>  #define TCG_TARGET_HAS_sub2_i64         0
>  #define TCG_TARGET_HAS_mulu2_i64        0

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net