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From: Aurelien Jarno <aurelien@aurel32.net>
To: Richard Henderson <rth@twiddle.net>
Cc: av1474@comtv.ru, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v2 09/27] tcg-ppc64: Rearrange integer constant constraints
Date: Mon, 1 Apr 2013 16:53:04 +0200	[thread overview]
Message-ID: <20130401145304.GI17634@hall.aurel32.net> (raw)
In-Reply-To: <1362443590-28191-10-git-send-email-rth@twiddle.net>

On Mon, Mar 04, 2013 at 04:32:52PM -0800, Richard Henderson wrote:
> We'll need a zero, and Z makes more sense for that.  Make sure we
> have a full compliment of signed and unsigned 16 and 32-bit tests.
> 
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  tcg/ppc64/tcg-target.c | 43 +++++++++++++++++++++++++++++++++----------
>  1 file changed, 33 insertions(+), 10 deletions(-)
> 
> diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
> index 31b0cb7..0e4826d 100644
> --- a/tcg/ppc64/tcg-target.c
> +++ b/tcg/ppc64/tcg-target.c
> @@ -22,7 +22,11 @@
>   * THE SOFTWARE.
>   */
>  
> -#define TCG_CT_CONST_U32 0x100
> +#define TCG_CT_CONST_S16  0x100
> +#define TCG_CT_CONST_U16  0x200
> +#define TCG_CT_CONST_S32  0x400
> +#define TCG_CT_CONST_U32  0x800
> +#define TCG_CT_CONST_ZERO 0x1000
>  
>  static uint8_t *tb_ret_addr;
>  
> @@ -242,9 +246,21 @@ static int target_parse_constraint (TCGArgConstraint *ct, const char **pct_str)
>          tcg_regset_reset_reg (ct->u.regs, TCG_REG_R6);
>  #endif
>          break;
> -    case 'Z':
> +    case 'I':
> +        ct->ct |= TCG_CT_CONST_S16;
> +        break;
> +    case 'J':
> +        ct->ct |= TCG_CT_CONST_U16;
> +        break;
> +    case 'T':
> +        ct->ct |= TCG_CT_CONST_S32;
> +        break;
> +    case 'U':
>          ct->ct |= TCG_CT_CONST_U32;
>          break;
> +    case 'Z':
> +        ct->ct |= TCG_CT_CONST_ZERO;
> +        break;
>      default:
>          return -1;
>      }
> @@ -257,13 +273,20 @@ static int target_parse_constraint (TCGArgConstraint *ct, const char **pct_str)
>  static int tcg_target_const_match (tcg_target_long val,
>                                     const TCGArgConstraint *arg_ct)
>  {
> -    int ct;
> -
> -    ct = arg_ct->ct;
> -    if (ct & TCG_CT_CONST)
> +    int ct = arg_ct->ct;
> +    if (ct & TCG_CT_CONST) {
> +        return 1;
> +    } else if ((ct & TCG_CT_CONST_S16) && val == (int16_t)val) {
> +        return 1;
> +    } else if ((ct & TCG_CT_CONST_U16) && val == (uint16_t)val) {
>          return 1;
> -    else if ((ct & TCG_CT_CONST_U32) && (val == (uint32_t) val))
> +    } else if ((ct & TCG_CT_CONST_S32) && val == (int32_t)val) {
>          return 1;
> +    } else if ((ct & TCG_CT_CONST_U32) && val == (uint32_t)val) {
> +        return 1;
> +    } else if ((ct & TCG_CT_CONST_ZERO) && val == 0) {
> +        return 1;
> +    }
>      return 0;
>  }
>  
> @@ -1607,9 +1630,9 @@ static const TCGTargetOpDef ppc_op_defs[] = {
>  
>      { INDEX_op_add_i64, { "r", "r", "ri" } },
>      { INDEX_op_sub_i64, { "r", "r", "ri" } },
> -    { INDEX_op_and_i64, { "r", "r", "rZ" } },
> -    { INDEX_op_or_i64, { "r", "r", "rZ" } },
> -    { INDEX_op_xor_i64, { "r", "r", "rZ" } },
> +    { INDEX_op_and_i64, { "r", "r", "rU" } },
> +    { INDEX_op_or_i64, { "r", "r", "rU" } },
> +    { INDEX_op_xor_i64, { "r", "r", "rU" } },
>  
>      { INDEX_op_shl_i64, { "r", "r", "ri" } },
>      { INDEX_op_shr_i64, { "r", "r", "ri" } },

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>

-- 
Aurelien Jarno	                        GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net

  reply	other threads:[~2013-04-01 14:53 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-05  0:32 [Qemu-devel] [PATCH v2 00/27] Modernize tcg/ppc64 Richard Henderson
2013-03-05  0:32 ` [Qemu-devel] [PATCH v2 01/27] disas: Disassemble all ppc insns for the host Richard Henderson
2013-04-01 14:51   ` Aurelien Jarno
2013-03-05  0:32 ` [Qemu-devel] [PATCH v2 02/27] tcg-ppc64: Use TCGReg everywhere Richard Henderson
2013-04-01 14:51   ` Aurelien Jarno
2013-03-05  0:32 ` [Qemu-devel] [PATCH v2 03/27] tcg-ppc64: Introduce and use tcg_out_rlw Richard Henderson
2013-04-01 14:51   ` Aurelien Jarno
2013-03-05  0:32 ` [Qemu-devel] [PATCH v2 04/27] tcg-ppc64: Introduce and use tcg_out_ext32u Richard Henderson
2013-04-01 14:51   ` Aurelien Jarno
2013-03-05  0:32 ` [Qemu-devel] [PATCH v2 05/27] tcg-ppc64: Introduce and use tcg_out_shli64 Richard Henderson
2013-04-01 14:52   ` Aurelien Jarno
2013-03-05  0:32 ` [Qemu-devel] [PATCH v2 06/27] tcg-ppc64: Introduce and use tcg_out_shri64 Richard Henderson
2013-04-01 14:52   ` Aurelien Jarno
2013-03-05  0:32 ` [Qemu-devel] [PATCH v2 07/27] tcg-ppc64: Cleanup tcg_out_movi Richard Henderson
2013-04-01 14:52   ` Aurelien Jarno
2013-03-05  0:32 ` [Qemu-devel] [PATCH v2 08/27] tcg-ppc64: Introduce and use TAI and SAI Richard Henderson
2013-04-01 14:52   ` Aurelien Jarno
2013-03-05  0:32 ` [Qemu-devel] [PATCH v2 09/27] tcg-ppc64: Rearrange integer constant constraints Richard Henderson
2013-04-01 14:53   ` Aurelien Jarno [this message]
2013-03-05  0:32 ` [Qemu-devel] [PATCH v2 10/27] tcg-ppc64: Improve constant add and sub ops Richard Henderson
2013-04-01 14:54   ` Aurelien Jarno
2013-03-05  0:32 ` [Qemu-devel] [PATCH v2 11/27] tcg-ppc64: Tidy or and xor patterns Richard Henderson
2013-04-01 14:55   ` Aurelien Jarno
2013-03-05  0:32 ` [Qemu-devel] [PATCH v2 12/27] tcg-ppc64: Improve and_i32 with constant Richard Henderson
2013-04-01 14:55   ` Aurelien Jarno
2013-04-01 15:43     ` Richard Henderson
2013-04-01 15:58       ` Aurelien Jarno
2013-03-05  0:32 ` [Qemu-devel] [PATCH v2 13/27] tcg-ppc64: Improve and_i64 " Richard Henderson
2013-04-01 14:56   ` Aurelien Jarno
2013-03-05  0:32 ` [Qemu-devel] [PATCH v2 14/27] tcg-ppc64: Streamline qemu_ld/st insn selection Richard Henderson
2013-04-01 14:56   ` Aurelien Jarno
2013-03-05  0:32 ` [Qemu-devel] [PATCH v2 15/27] tcg-ppc64: Implement rotates Richard Henderson
2013-04-01 14:58   ` Aurelien Jarno
2013-03-05  0:32 ` [Qemu-devel] [PATCH v2 16/27] tcg-ppc64: Implement bswap16 and bswap32 Richard Henderson
2013-04-01 14:57   ` Aurelien Jarno
2013-03-05  0:33 ` [Qemu-devel] [PATCH v2 17/27] tcg-ppc64: Implement bswap64 Richard Henderson
2013-04-01 14:58   ` Aurelien Jarno
2013-03-05  0:33 ` [Qemu-devel] [PATCH v2 18/27] tcg-ppc64: Implement compound logicals Richard Henderson
2013-04-01 14:58   ` Aurelien Jarno
2013-03-05  0:33 ` [Qemu-devel] [PATCH v2 19/27] tcg-ppc64: Handle constant inputs for some " Richard Henderson
2013-04-01 14:58   ` Aurelien Jarno
2013-03-05  0:33 ` [Qemu-devel] [PATCH v2 20/27] tcg-ppc64: Implement deposit Richard Henderson
2013-04-01 14:58   ` Aurelien Jarno
2013-03-05  0:33 ` [Qemu-devel] [PATCH v2 21/27] tcg-ppc64: Use I constraint for mul Richard Henderson
2013-04-01 14:59   ` Aurelien Jarno
2013-03-05  0:33 ` [Qemu-devel] [PATCH v2 22/27] tcg-ppc64: Use TCGType throughout compares Richard Henderson
2013-04-01 14:59   ` Aurelien Jarno
2013-03-05  0:33 ` [Qemu-devel] [PATCH v2 23/27] tcg-ppc64: Rewrite setcond Richard Henderson
2013-04-01 14:59   ` Aurelien Jarno
2013-03-05  0:33 ` [Qemu-devel] [PATCH v2 24/27] tcg-ppc64: Implement movcond Richard Henderson
2013-04-01 14:59   ` Aurelien Jarno
2013-03-05  0:33 ` [Qemu-devel] [PATCH v2 25/27] tcg-ppc64: Use getauxval for ISA detection Richard Henderson
2013-04-01 15:00   ` Aurelien Jarno
2013-04-01 16:07     ` Richard Henderson
2013-03-05  0:33 ` [Qemu-devel] [PATCH v2 26/27] tcg-ppc64: Implement add2/sub2_i64 Richard Henderson
2013-04-01 15:00   ` Aurelien Jarno
2013-03-05  0:33 ` [Qemu-devel] [PATCH v2 27/27] tcg-ppc64: Implement mulu2/muls2_i64 Richard Henderson
2013-04-01 15:00   ` Aurelien Jarno
2013-03-12  6:41 ` [Qemu-devel] [PATCH v2 00/27] Modernize tcg/ppc64 Richard Henderson
2013-03-20  0:17   ` Richard Henderson
2013-03-30 16:54     ` Richard Henderson

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